src/gallium/drivers/freedreno/freedreno_screen.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29
  30 #include "pipe/p_defines.h"
  31 #include "pipe/p_screen.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_memory.h"
  35 #include "util/u_inlines.h"
  36 #include "util/u_format.h"
  37 #include "util/u_format_s3tc.h"
  38 #include "util/u_string.h"
  39 #include "util/u_debug.h"
  40
  41 #include "os/os_time.h"
  42
  43 #include <stdio.h>
  44 #include <errno.h>
  45 #include <stdlib.h>
  46
  47 #include "freedreno_screen.h"
  48 #include "freedreno_resource.h"
  49 #include "freedreno_fence.h"
  50 #include "freedreno_query.h"
  51 #include "freedreno_util.h"
  52
  53 #include "a2xx/fd2_screen.h"
  54 #include "a3xx/fd3_screen.h"
  55 #include "a4xx/fd4_screen.h"
  56
  57 /* XXX this should go away */
  58 #include "state_tracker/drm_driver.h"
  59
  60 static const struct debug_named_value debug_options[] = {
  61                 {"msgs",      FD_DBG_MSGS,   "Print debug messages"},
  62                 {"disasm",    FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"},
  63                 {"dclear",    FD_DBG_DCLEAR, "Mark all state dirty after clear"},
  64                 {"flush",     FD_DBG_FLUSH,  "Force flush after every draw"},
  65                 {"noscis",    FD_DBG_NOSCIS, "Disable scissor optimization"},
  66                 {"direct",    FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"},
  67                 {"nobypass",  FD_DBG_NOBYPASS, "Disable GMEM bypass"},
  68                 {"fraghalf",  FD_DBG_FRAGHALF, "Use half-precision in fragment shader"},
  69                 {"nobin",     FD_DBG_NOBIN,  "Disable hw binning"},
  70                 {"noopt",     FD_DBG_NOOPT , "Disable optimization passes in compiler"},
  71                 {"optmsgs",   FD_DBG_OPTMSGS,"Enable optimizater debug messages"},
  72                 {"optdump",   FD_DBG_OPTDUMP,"Dump shader DAG to .dot files"},
  73                 {"glsl130",   FD_DBG_GLSL130,"Temporary flag to enable GLSL 130 on a3xx+"},
  74                 {"nocp",      FD_DBG_NOCP,   "Disable copy-propagation"},
  75                 DEBUG_NAMED_VALUE_END
  76 };
  77
  78 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
  79
  80 int fd_mesa_debug = 0;
  81 bool fd_binning_enabled = true;
  82 static bool glsl130 = false;
  83
  84 static const char *
  85 fd_screen_get_name(struct pipe_screen *pscreen)
  86 {
  87         static char buffer[128];
  88         util_snprintf(buffer, sizeof(buffer), "FD%03d",
  89                         fd_screen(pscreen)->device_id);
  90         return buffer;
  91 }
  92
  93 static const char *
  94 fd_screen_get_vendor(struct pipe_screen *pscreen)
  95 {
  96         return "freedreno";
  97 }
  98
  99 static uint64_t
 100 fd_screen_get_timestamp(struct pipe_screen *pscreen)
 101 {
 102         int64_t cpu_time = os_time_get() * 1000;
 103         return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta;
 104 }
 105
 106 static void
 107 fd_screen_fence_ref(struct pipe_screen *pscreen,
 108                 struct pipe_fence_handle **ptr,
 109                 struct pipe_fence_handle *pfence)
 110 {
 111         fd_fence_ref(fd_fence(pfence), (struct fd_fence **)ptr);
 112 }
 113
 114 static boolean
 115 fd_screen_fence_signalled(struct pipe_screen *screen,
 116                 struct pipe_fence_handle *pfence)
 117 {
 118         return fd_fence_signalled(fd_fence(pfence));
 119 }
 120
 121 static boolean
 122 fd_screen_fence_finish(struct pipe_screen *screen,
 123                 struct pipe_fence_handle *pfence,
 124                 uint64_t timeout)
 125 {
 126         return fd_fence_wait(fd_fence(pfence));
 127 }
 128
 129 static void
 130 fd_screen_destroy(struct pipe_screen *pscreen)
 131 {
 132         struct fd_screen *screen = fd_screen(pscreen);
 133
 134         if (screen->pipe)
 135                 fd_pipe_del(screen->pipe);
 136
 137         if (screen->dev)
 138                 fd_device_del(screen->dev);
 139
 140         free(screen);
 141 }
 142
 143 /*
 144 TODO either move caps to a2xx/a3xx specific code, or maybe have some
 145 tables for things that differ if the delta is not too much..
 146  */
 147 static int
 148 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 149 {
 150         struct fd_screen *screen = fd_screen(pscreen);
 151
 152         /* this is probably not totally correct.. but it's a start: */
 153         switch (param) {
 154         /* Supported features (boolean caps). */
 155         case PIPE_CAP_NPOT_TEXTURES:
 156         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 157         case PIPE_CAP_TWO_SIDED_STENCIL:
 158         case PIPE_CAP_ANISOTROPIC_FILTER:
 159         case PIPE_CAP_POINT_SPRITE:
 160         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 161         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 162         case PIPE_CAP_TEXTURE_SWIZZLE:
 163         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 164         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 165         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 166         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 167         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 168         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 169         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 170         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 171         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 172         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 173         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 174         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 175                 return 1;
 176
 177         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 178         case PIPE_CAP_TGSI_TEXCOORD:
 179         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 180         case PIPE_CAP_CONDITIONAL_RENDER:
 181         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 182         case PIPE_CAP_TEXTURE_BARRIER:
 183         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 184         case PIPE_CAP_CUBE_MAP_ARRAY:
 185         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 186         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 187         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 188         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 189         case PIPE_CAP_TGSI_INSTANCEID:
 190         case PIPE_CAP_START_INSTANCE:
 191         case PIPE_CAP_COMPUTE:
 192                 return 0;
 193
 194         case PIPE_CAP_SM3:
 195         case PIPE_CAP_PRIMITIVE_RESTART:
 196                 return is_a3xx(screen) || is_a4xx(screen);
 197
 198         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 199                 return 256;
 200
 201         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 202                 return ((is_a3xx(screen) || is_a4xx(screen)) && glsl130) ? 130 : 120;
 203
 204         /* Unsupported features. */
 205         case PIPE_CAP_INDEP_BLEND_ENABLE:
 206         case PIPE_CAP_INDEP_BLEND_FUNC:
 207         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 208         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 209         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 210         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 211         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 212         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 213         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 214         case PIPE_CAP_USER_VERTEX_BUFFERS:
 215         case PIPE_CAP_USER_INDEX_BUFFERS:
 216         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 217         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 218         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 219         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 220         case PIPE_CAP_TEXTURE_GATHER_SM5:
 221         case PIPE_CAP_FAKE_SW_MSAA:
 222         case PIPE_CAP_TEXTURE_QUERY_LOD:
 223         case PIPE_CAP_SAMPLE_SHADING:
 224         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 225         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 226         case PIPE_CAP_DRAW_INDIRECT:
 227         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 228         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 229         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 230         case PIPE_CAP_CLIP_HALFZ:
 231                 return 0;
 232
 233         case PIPE_CAP_MAX_VIEWPORTS:
 234                 return 1;
 235
 236         /* Stream output. */
 237         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 238         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 239         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 240         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 241                 return 0;
 242
 243         /* Geometry shader output, unsupported. */
 244         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 245         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 246         case PIPE_CAP_MAX_VERTEX_STREAMS:
 247                 return 0;
 248
 249         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 250                 return 2048;
 251
 252         /* Texturing. */
 253         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 254         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 255                 return MAX_MIP_LEVELS;
 256         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 257                 return 11;
 258
 259         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 260                 return (is_a3xx(screen) || is_a4xx(screen)) ? 256 : 0;
 261
 262         /* Render targets. */
 263         case PIPE_CAP_MAX_RENDER_TARGETS:
 264                 return 1;
 265
 266         /* Queries. */
 267         case PIPE_CAP_QUERY_TIME_ELAPSED:
 268         case PIPE_CAP_QUERY_TIMESTAMP:
 269                 return 0;
 270         case PIPE_CAP_OCCLUSION_QUERY:
 271                 /* TODO still missing on a4xx, but we lie to get gl2..
 272                  * it's not a feature, it's a bug!
 273                  */
 274                 return is_a3xx(screen) || is_a4xx(screen);
 275
 276         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 277         case PIPE_CAP_MIN_TEXEL_OFFSET:
 278                 return -8;
 279
 280         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 281         case PIPE_CAP_MAX_TEXEL_OFFSET:
 282                 return 7;
 283
 284         case PIPE_CAP_ENDIANNESS:
 285                 return PIPE_ENDIAN_LITTLE;
 286
 287         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 288                 return 64;
 289
 290         case PIPE_CAP_VENDOR_ID:
 291                 return 0x5143;
 292         case PIPE_CAP_DEVICE_ID:
 293                 return 0xFFFFFFFF;
 294         case PIPE_CAP_ACCELERATED:
 295                 return 1;
 296         case PIPE_CAP_VIDEO_MEMORY:
 297                 DBG("FINISHME: The value returned is incorrect\n");
 298                 return 10;
 299         case PIPE_CAP_UMA:
 300                 return 1;
 301         }
 302         debug_printf("unknown param %d\n", param);
 303         return 0;
 304 }
 305
 306 static float
 307 fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 308 {
 309         switch (param) {
 310         case PIPE_CAPF_MAX_LINE_WIDTH:
 311         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 312         case PIPE_CAPF_MAX_POINT_WIDTH:
 313         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 314                 return 8192.0f;
 315         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 316                 return 16.0f;
 317         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 318                 return 15.0f;
 319         case PIPE_CAPF_GUARD_BAND_LEFT:
 320         case PIPE_CAPF_GUARD_BAND_TOP:
 321         case PIPE_CAPF_GUARD_BAND_RIGHT:
 322         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 323                 return 0.0f;
 324         }
 325         debug_printf("unknown paramf %d\n", param);
 326         return 0;
 327 }
 328
 329 static int
 330 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 331                 enum pipe_shader_cap param)
 332 {
 333         struct fd_screen *screen = fd_screen(pscreen);
 334
 335         switch(shader)
 336         {
 337         case PIPE_SHADER_FRAGMENT:
 338         case PIPE_SHADER_VERTEX:
 339                 break;
 340         case PIPE_SHADER_COMPUTE:
 341         case PIPE_SHADER_GEOMETRY:
 342                 /* maye we could emulate.. */
 343                 return 0;
 344         default:
 345                 DBG("unknown shader type %d", shader);
 346                 return 0;
 347         }
 348
 349         /* this is probably not totally correct.. but it's a start: */
 350         switch (param) {
 351         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 352         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 353         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 354         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 355                 return 16384;
 356         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 357                 return 8; /* XXX */
 358         case PIPE_SHADER_CAP_MAX_INPUTS:
 359         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 360                 return 16;
 361         case PIPE_SHADER_CAP_MAX_TEMPS:
 362                 return 64; /* Max native temporaries. */
 363         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 364                 /* NOTE: seems to be limit for a3xx is actually 512 but
 365                  * split between VS and FS.  Use lower limit of 256 to
 366                  * avoid getting into impossible situations:
 367                  */
 368                 return ((is_a3xx(screen) || is_a4xx(screen)) ? 256 : 64) * sizeof(float[4]);
 369         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 370                 return 1;
 371         case PIPE_SHADER_CAP_MAX_PREDS:
 372                 return 0; /* nothing uses this */
 373         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 374                 return 1;
 375         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 376         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 377         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 378         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 379                 return 1;
 380         case PIPE_SHADER_CAP_SUBROUTINES:
 381         case PIPE_SHADER_CAP_DOUBLES:
 382                 return 0;
 383         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 384                 return 1;
 385         case PIPE_SHADER_CAP_INTEGERS:
 386                 /* we should be able to support this on a3xx, but not
 387                  * implemented yet:
 388                  *
 389                  * TODO looks like a4xx will require some additional
 390                  * work for integer varying fetch..
 391                  */
 392                 return (is_a3xx(screen) && glsl130) ? 1 : 0;
 393         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 394         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 395                 return 16;
 396         case PIPE_SHADER_CAP_PREFERRED_IR:
 397                 return PIPE_SHADER_IR_TGSI;
 398         }
 399         debug_printf("unknown shader param %d\n", param);
 400         return 0;
 401 }
 402
 403 boolean
 404 fd_screen_bo_get_handle(struct pipe_screen *pscreen,
 405                 struct fd_bo *bo,
 406                 unsigned stride,
 407                 struct winsys_handle *whandle)
 408 {
 409         whandle->stride = stride;
 410
 411         if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
 412                 return fd_bo_get_name(bo, &whandle->handle) == 0;
 413         } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
 414                 whandle->handle = fd_bo_handle(bo);
 415                 return TRUE;
 416         } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) {
 417                 whandle->handle = fd_bo_dmabuf(bo);
 418                 return TRUE;
 419         } else {
 420                 return FALSE;
 421         }
 422 }
 423
 424 struct fd_bo *
 425 fd_screen_bo_from_handle(struct pipe_screen *pscreen,
 426                 struct winsys_handle *whandle,
 427                 unsigned *out_stride)
 428 {
 429         struct fd_screen *screen = fd_screen(pscreen);
 430         struct fd_bo *bo;
 431
 432         if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
 433                 bo = fd_bo_from_name(screen->dev, whandle->handle);
 434         } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
 435                 bo = fd_bo_from_handle(screen->dev, whandle->handle, 0);
 436         } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) {
 437                 bo = fd_bo_from_dmabuf(screen->dev, whandle->handle);
 438         } else {
 439                 DBG("Attempt to import unsupported handle type %d", whandle->type);
 440                 return NULL;
 441         }
 442
 443         if (!bo) {
 444                 DBG("ref name 0x%08x failed", whandle->handle);
 445                 return NULL;
 446         }
 447
 448         *out_stride = whandle->stride;
 449
 450         return bo;
 451 }
 452
 453 struct pipe_screen *
 454 fd_screen_create(struct fd_device *dev)
 455 {
 456         struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
 457         struct pipe_screen *pscreen;
 458         uint64_t val;
 459
 460         fd_mesa_debug = debug_get_option_fd_mesa_debug();
 461
 462         if (fd_mesa_debug & FD_DBG_NOBIN)
 463                 fd_binning_enabled = false;
 464
 465         glsl130 = !!(fd_mesa_debug & FD_DBG_GLSL130);
 466
 467         if (!screen)
 468                 return NULL;
 469
 470         pscreen = &screen->base;
 471
 472         screen->dev = dev;
 473
 474         // maybe this should be in context?
 475         screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
 476         if (!screen->pipe) {
 477                 DBG("could not create 3d pipe");
 478                 goto fail;
 479         }
 480
 481         if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
 482                 DBG("could not get GMEM size");
 483                 goto fail;
 484         }
 485         screen->gmemsize_bytes = val;
 486
 487         if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
 488                 DBG("could not get device-id");
 489                 goto fail;
 490         }
 491         screen->device_id = val;
 492
 493         if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) {
 494                 DBG("could not get gpu-id");
 495                 goto fail;
 496         }
 497         screen->gpu_id = val;
 498
 499         if (fd_pipe_get_param(screen->pipe, FD_CHIP_ID, &val)) {
 500                 DBG("could not get chip-id");
 501                 /* older kernels may not have this property: */
 502                 unsigned core  = screen->gpu_id / 100;
 503                 unsigned major = (screen->gpu_id % 100) / 10;
 504                 unsigned minor = screen->gpu_id % 10;
 505                 unsigned patch = 0;  /* assume the worst */
 506                 val = (patch & 0xff) | ((minor & 0xff) << 8) |
 507                         ((major & 0xff) << 16) | ((core & 0xff) << 24);
 508         }
 509         screen->chip_id = val;
 510
 511         DBG("Pipe Info:");
 512         DBG(" GPU-id:          %d", screen->gpu_id);
 513         DBG(" Chip-id:         0x%08x", screen->chip_id);
 514         DBG(" GMEM size:       0x%08x", screen->gmemsize_bytes);
 515
 516         /* explicitly checking for GPU revisions that are known to work.  This
 517          * may be overly conservative for a3xx, where spoofing the gpu_id with
 518          * the blob driver seems to generate identical cmdstream dumps.  But
 519          * on a2xx, there seem to be small differences between the GPU revs
 520          * so it is probably better to actually test first on real hardware
 521          * before enabling:
 522          *
 523          * If you have a different adreno version, feel free to add it to one
 524          * of the cases below and see what happens.  And if it works, please
 525          * send a patch ;-)
 526          */
 527         switch (screen->gpu_id) {
 528         case 220:
 529                 fd2_screen_init(pscreen);
 530                 break;
 531         case 320:
 532         case 330:
 533                 fd3_screen_init(pscreen);
 534                 break;
 535         case 420:
 536                 fd4_screen_init(pscreen);
 537                 break;
 538         default:
 539                 debug_printf("unsupported GPU: a%03d\n", screen->gpu_id);
 540                 goto fail;
 541         }
 542
 543         pscreen->destroy = fd_screen_destroy;
 544         pscreen->get_param = fd_screen_get_param;
 545         pscreen->get_paramf = fd_screen_get_paramf;
 546         pscreen->get_shader_param = fd_screen_get_shader_param;
 547
 548         fd_resource_screen_init(pscreen);
 549         fd_query_screen_init(pscreen);
 550
 551         pscreen->get_name = fd_screen_get_name;
 552         pscreen->get_vendor = fd_screen_get_vendor;
 553
 554         pscreen->get_timestamp = fd_screen_get_timestamp;
 555
 556         pscreen->fence_reference = fd_screen_fence_ref;
 557         pscreen->fence_signalled = fd_screen_fence_signalled;
 558         pscreen->fence_finish = fd_screen_fence_finish;
 559
 560         util_format_s3tc_init();
 561
 562         return pscreen;
 563
 564 fail:
 565         fd_screen_destroy(pscreen);
 566         return NULL;
 567 }