src/gallium/drivers/freedreno/freedreno_screen.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29
  30 #include "pipe/p_defines.h"
  31 #include "pipe/p_screen.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_memory.h"
  35 #include "util/u_inlines.h"
  36 #include "util/u_format.h"
  37 #include "util/u_format_s3tc.h"
  38 #include "util/u_string.h"
  39 #include "util/u_debug.h"
  40
  41 #include "os/os_time.h"
  42
  43 #include <stdio.h>
  44 #include <errno.h>
  45 #include <stdlib.h>
  46
  47 #include "freedreno_screen.h"
  48 #include "freedreno_resource.h"
  49 #include "freedreno_fence.h"
  50 #include "freedreno_query.h"
  51 #include "freedreno_util.h"
  52
  53 #include "a2xx/fd2_screen.h"
  54 #include "a3xx/fd3_screen.h"
  55 #include "a4xx/fd4_screen.h"
  56
  57 /* XXX this should go away */
  58 #include "state_tracker/drm_driver.h"
  59
  60 static const struct debug_named_value debug_options[] = {
  61                 {"msgs",      FD_DBG_MSGS,   "Print debug messages"},
  62                 {"disasm",    FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"},
  63                 {"dclear",    FD_DBG_DCLEAR, "Mark all state dirty after clear"},
  64                 {"flush",     FD_DBG_FLUSH,  "Force flush after every draw"},
  65                 {"noscis",    FD_DBG_NOSCIS, "Disable scissor optimization"},
  66                 {"direct",    FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"},
  67                 {"nobypass",  FD_DBG_NOBYPASS, "Disable GMEM bypass"},
  68                 {"fraghalf",  FD_DBG_FRAGHALF, "Use half-precision in fragment shader"},
  69                 {"nobin",     FD_DBG_NOBIN,  "Disable hw binning"},
  70                 {"optmsgs",   FD_DBG_OPTMSGS,"Enable optimizer debug messages"},
  71                 {"optdump",   FD_DBG_OPTDUMP,"Dump shader DAG to .dot files"},
  72                 {"glsl120",   FD_DBG_GLSL120,"Temporary flag to force GLSL 120 (rather than 130) on a3xx+"},
  73                 {"nocp",      FD_DBG_NOCP,   "Disable copy-propagation"},
  74                 {"nir",       FD_DBG_NIR,    "Enable experimental NIR compiler"},
  75                 DEBUG_NAMED_VALUE_END
  76 };
  77
  78 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
  79
  80 int fd_mesa_debug = 0;
  81 bool fd_binning_enabled = true;
  82 static bool glsl120 = false;
  83
  84 static const char *
  85 fd_screen_get_name(struct pipe_screen *pscreen)
  86 {
  87         static char buffer[128];
  88         util_snprintf(buffer, sizeof(buffer), "FD%03d",
  89                         fd_screen(pscreen)->device_id);
  90         return buffer;
  91 }
  92
  93 static const char *
  94 fd_screen_get_vendor(struct pipe_screen *pscreen)
  95 {
  96         return "freedreno";
  97 }
  98
  99 static const char *
 100 fd_screen_get_device_vendor(struct pipe_screen *pscreen)
 101 {
 102         return "Qualcomm";
 103 }
 104
 105
 106 static uint64_t
 107 fd_screen_get_timestamp(struct pipe_screen *pscreen)
 108 {
 109         int64_t cpu_time = os_time_get() * 1000;
 110         return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta;
 111 }
 112
 113 static void
 114 fd_screen_destroy(struct pipe_screen *pscreen)
 115 {
 116         struct fd_screen *screen = fd_screen(pscreen);
 117
 118         if (screen->pipe)
 119                 fd_pipe_del(screen->pipe);
 120
 121         if (screen->dev)
 122                 fd_device_del(screen->dev);
 123
 124         free(screen);
 125 }
 126
 127 /*
 128 TODO either move caps to a2xx/a3xx specific code, or maybe have some
 129 tables for things that differ if the delta is not too much..
 130  */
 131 static int
 132 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 133 {
 134         struct fd_screen *screen = fd_screen(pscreen);
 135
 136         /* this is probably not totally correct.. but it's a start: */
 137         switch (param) {
 138         /* Supported features (boolean caps). */
 139         case PIPE_CAP_NPOT_TEXTURES:
 140         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 141         case PIPE_CAP_TWO_SIDED_STENCIL:
 142         case PIPE_CAP_ANISOTROPIC_FILTER:
 143         case PIPE_CAP_POINT_SPRITE:
 144         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 145         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 146         case PIPE_CAP_TEXTURE_SWIZZLE:
 147         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 148         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 149         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 150         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 151         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 152         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 153         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 154         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 155         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 156         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 157         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 158         case PIPE_CAP_VERTEXID_NOBASE:
 159                 return 1;
 160
 161         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 162         case PIPE_CAP_TGSI_TEXCOORD:
 163         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 164         case PIPE_CAP_CONDITIONAL_RENDER:
 165         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 166         case PIPE_CAP_TEXTURE_BARRIER:
 167         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 168         case PIPE_CAP_CUBE_MAP_ARRAY:
 169         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 170         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 171         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 172         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 173         case PIPE_CAP_START_INSTANCE:
 174         case PIPE_CAP_COMPUTE:
 175                 return 0;
 176
 177         case PIPE_CAP_SM3:
 178         case PIPE_CAP_PRIMITIVE_RESTART:
 179         case PIPE_CAP_TGSI_INSTANCEID:
 180         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 181                 return is_a3xx(screen) || is_a4xx(screen);
 182
 183         case PIPE_CAP_INDEP_BLEND_ENABLE:
 184         case PIPE_CAP_INDEP_BLEND_FUNC:
 185                 return is_a3xx(screen);
 186
 187         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 188                 return 256;
 189
 190         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 191                 if (glsl120)
 192                         return 120;
 193                 return (is_a3xx(screen) || is_a4xx(screen)) ? 130 : 120;
 194
 195         /* Unsupported features. */
 196         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 197         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 198         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 199         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 200         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 201         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 202         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 203         case PIPE_CAP_USER_VERTEX_BUFFERS:
 204         case PIPE_CAP_USER_INDEX_BUFFERS:
 205         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 206         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 207         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 208         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 209         case PIPE_CAP_TEXTURE_GATHER_SM5:
 210         case PIPE_CAP_FAKE_SW_MSAA:
 211         case PIPE_CAP_TEXTURE_QUERY_LOD:
 212         case PIPE_CAP_SAMPLE_SHADING:
 213         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 214         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 215         case PIPE_CAP_DRAW_INDIRECT:
 216         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 217         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 218         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 219         case PIPE_CAP_CLIP_HALFZ:
 220         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 221         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 222         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 223                 return 0;
 224
 225         case PIPE_CAP_MAX_VIEWPORTS:
 226                 return 1;
 227
 228         /* Stream output. */
 229         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 230         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 231         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 232         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 233                 return 0;
 234
 235         /* Geometry shader output, unsupported. */
 236         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 237         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 238         case PIPE_CAP_MAX_VERTEX_STREAMS:
 239                 return 0;
 240
 241         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 242                 return 2048;
 243
 244         /* Texturing. */
 245         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 246         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 247                 return MAX_MIP_LEVELS;
 248         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 249                 return 11;
 250
 251         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 252                 return (is_a3xx(screen) || is_a4xx(screen)) ? 256 : 0;
 253
 254         /* Render targets. */
 255         case PIPE_CAP_MAX_RENDER_TARGETS:
 256                 return screen->max_rts;
 257
 258         /* Queries. */
 259         case PIPE_CAP_QUERY_TIME_ELAPSED:
 260         case PIPE_CAP_QUERY_TIMESTAMP:
 261                 return 0;
 262         case PIPE_CAP_OCCLUSION_QUERY:
 263                 /* TODO still missing on a4xx, but we lie to get gl2..
 264                  * it's not a feature, it's a bug!
 265                  */
 266                 return is_a3xx(screen) || is_a4xx(screen);
 267
 268         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 269         case PIPE_CAP_MIN_TEXEL_OFFSET:
 270                 return -8;
 271
 272         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 273         case PIPE_CAP_MAX_TEXEL_OFFSET:
 274                 return 7;
 275
 276         case PIPE_CAP_ENDIANNESS:
 277                 return PIPE_ENDIAN_LITTLE;
 278
 279         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 280                 return 64;
 281
 282         case PIPE_CAP_VENDOR_ID:
 283                 return 0x5143;
 284         case PIPE_CAP_DEVICE_ID:
 285                 return 0xFFFFFFFF;
 286         case PIPE_CAP_ACCELERATED:
 287                 return 1;
 288         case PIPE_CAP_VIDEO_MEMORY:
 289                 DBG("FINISHME: The value returned is incorrect\n");
 290                 return 10;
 291         case PIPE_CAP_UMA:
 292                 return 1;
 293         }
 294         debug_printf("unknown param %d\n", param);
 295         return 0;
 296 }
 297
 298 static float
 299 fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 300 {
 301         switch (param) {
 302         case PIPE_CAPF_MAX_LINE_WIDTH:
 303         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 304         case PIPE_CAPF_MAX_POINT_WIDTH:
 305         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 306                 return 4092.0f;
 307         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 308                 return 16.0f;
 309         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 310                 return 15.0f;
 311         case PIPE_CAPF_GUARD_BAND_LEFT:
 312         case PIPE_CAPF_GUARD_BAND_TOP:
 313         case PIPE_CAPF_GUARD_BAND_RIGHT:
 314         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 315                 return 0.0f;
 316         }
 317         debug_printf("unknown paramf %d\n", param);
 318         return 0;
 319 }
 320
 321 static int
 322 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 323                 enum pipe_shader_cap param)
 324 {
 325         struct fd_screen *screen = fd_screen(pscreen);
 326
 327         switch(shader)
 328         {
 329         case PIPE_SHADER_FRAGMENT:
 330         case PIPE_SHADER_VERTEX:
 331                 break;
 332         case PIPE_SHADER_COMPUTE:
 333         case PIPE_SHADER_GEOMETRY:
 334                 /* maye we could emulate.. */
 335                 return 0;
 336         default:
 337                 DBG("unknown shader type %d", shader);
 338                 return 0;
 339         }
 340
 341         /* this is probably not totally correct.. but it's a start: */
 342         switch (param) {
 343         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 344         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 345         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 346         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 347                 return 16384;
 348         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 349                 /* for now, let someone else flatten if/else when using NIR: */
 350                 if ((fd_mesa_debug & FD_DBG_NIR) &&
 351                                 (is_a3xx(screen) || is_a4xx(screen)))
 352                         return 0;
 353                 return 8; /* XXX */
 354         case PIPE_SHADER_CAP_MAX_INPUTS:
 355         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 356                 return 16;
 357         case PIPE_SHADER_CAP_MAX_TEMPS:
 358                 return 64; /* Max native temporaries. */
 359         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 360                 /* NOTE: seems to be limit for a3xx is actually 512 but
 361                  * split between VS and FS.  Use lower limit of 256 to
 362                  * avoid getting into impossible situations:
 363                  */
 364                 return ((is_a3xx(screen) || is_a4xx(screen)) ? 4096 : 64) * sizeof(float[4]);
 365         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 366                 return is_a3xx(screen) ? 16 : 1;
 367         case PIPE_SHADER_CAP_MAX_PREDS:
 368                 return 0; /* nothing uses this */
 369         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 370                 return 1;
 371         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 372         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 373         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 374         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 375                 return 1;
 376         case PIPE_SHADER_CAP_SUBROUTINES:
 377         case PIPE_SHADER_CAP_DOUBLES:
 378         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 379         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 380         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 381                 return 0;
 382         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 383                 return 1;
 384         case PIPE_SHADER_CAP_INTEGERS:
 385                 if (glsl120)
 386                         return 0;
 387                 return (is_a3xx(screen) || is_a4xx(screen)) ? 1 : 0;
 388         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 389         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 390                 return 16;
 391         case PIPE_SHADER_CAP_PREFERRED_IR:
 392                 return PIPE_SHADER_IR_TGSI;
 393         }
 394         debug_printf("unknown shader param %d\n", param);
 395         return 0;
 396 }
 397
 398 boolean
 399 fd_screen_bo_get_handle(struct pipe_screen *pscreen,
 400                 struct fd_bo *bo,
 401                 unsigned stride,
 402                 struct winsys_handle *whandle)
 403 {
 404         whandle->stride = stride;
 405
 406         if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
 407                 return fd_bo_get_name(bo, &whandle->handle) == 0;
 408         } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
 409                 whandle->handle = fd_bo_handle(bo);
 410                 return TRUE;
 411         } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) {
 412                 whandle->handle = fd_bo_dmabuf(bo);
 413                 return TRUE;
 414         } else {
 415                 return FALSE;
 416         }
 417 }
 418
 419 struct fd_bo *
 420 fd_screen_bo_from_handle(struct pipe_screen *pscreen,
 421                 struct winsys_handle *whandle,
 422                 unsigned *out_stride)
 423 {
 424         struct fd_screen *screen = fd_screen(pscreen);
 425         struct fd_bo *bo;
 426
 427         if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
 428                 bo = fd_bo_from_name(screen->dev, whandle->handle);
 429         } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
 430                 bo = fd_bo_from_handle(screen->dev, whandle->handle, 0);
 431         } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) {
 432                 bo = fd_bo_from_dmabuf(screen->dev, whandle->handle);
 433         } else {
 434                 DBG("Attempt to import unsupported handle type %d", whandle->type);
 435                 return NULL;
 436         }
 437
 438         if (!bo) {
 439                 DBG("ref name 0x%08x failed", whandle->handle);
 440                 return NULL;
 441         }
 442
 443         *out_stride = whandle->stride;
 444
 445         return bo;
 446 }
 447
 448 struct pipe_screen *
 449 fd_screen_create(struct fd_device *dev)
 450 {
 451         struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
 452         struct pipe_screen *pscreen;
 453         uint64_t val;
 454
 455         fd_mesa_debug = debug_get_option_fd_mesa_debug();
 456
 457         if (fd_mesa_debug & FD_DBG_NOBIN)
 458                 fd_binning_enabled = false;
 459
 460         glsl120 = !!(fd_mesa_debug & FD_DBG_GLSL120);
 461
 462         if (!screen)
 463                 return NULL;
 464
 465         pscreen = &screen->base;
 466
 467         screen->dev = dev;
 468
 469         // maybe this should be in context?
 470         screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
 471         if (!screen->pipe) {
 472                 DBG("could not create 3d pipe");
 473                 goto fail;
 474         }
 475
 476         if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
 477                 DBG("could not get GMEM size");
 478                 goto fail;
 479         }
 480         screen->gmemsize_bytes = val;
 481
 482         if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
 483                 DBG("could not get device-id");
 484                 goto fail;
 485         }
 486         screen->device_id = val;
 487
 488         if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) {
 489                 DBG("could not get gpu-id");
 490                 goto fail;
 491         }
 492         screen->gpu_id = val;
 493
 494         if (fd_pipe_get_param(screen->pipe, FD_CHIP_ID, &val)) {
 495                 DBG("could not get chip-id");
 496                 /* older kernels may not have this property: */
 497                 unsigned core  = screen->gpu_id / 100;
 498                 unsigned major = (screen->gpu_id % 100) / 10;
 499                 unsigned minor = screen->gpu_id % 10;
 500                 unsigned patch = 0;  /* assume the worst */
 501                 val = (patch & 0xff) | ((minor & 0xff) << 8) |
 502                         ((major & 0xff) << 16) | ((core & 0xff) << 24);
 503         }
 504         screen->chip_id = val;
 505
 506         DBG("Pipe Info:");
 507         DBG(" GPU-id:          %d", screen->gpu_id);
 508         DBG(" Chip-id:         0x%08x", screen->chip_id);
 509         DBG(" GMEM size:       0x%08x", screen->gmemsize_bytes);
 510
 511         /* explicitly checking for GPU revisions that are known to work.  This
 512          * may be overly conservative for a3xx, where spoofing the gpu_id with
 513          * the blob driver seems to generate identical cmdstream dumps.  But
 514          * on a2xx, there seem to be small differences between the GPU revs
 515          * so it is probably better to actually test first on real hardware
 516          * before enabling:
 517          *
 518          * If you have a different adreno version, feel free to add it to one
 519          * of the cases below and see what happens.  And if it works, please
 520          * send a patch ;-)
 521          */
 522         switch (screen->gpu_id) {
 523         case 220:
 524                 fd2_screen_init(pscreen);
 525                 break;
 526         case 320:
 527         case 330:
 528                 fd3_screen_init(pscreen);
 529                 break;
 530         case 420:
 531                 fd4_screen_init(pscreen);
 532                 break;
 533         default:
 534                 debug_printf("unsupported GPU: a%03d\n", screen->gpu_id);
 535                 goto fail;
 536         }
 537
 538         pscreen->destroy = fd_screen_destroy;
 539         pscreen->get_param = fd_screen_get_param;
 540         pscreen->get_paramf = fd_screen_get_paramf;
 541         pscreen->get_shader_param = fd_screen_get_shader_param;
 542
 543         fd_resource_screen_init(pscreen);
 544         fd_query_screen_init(pscreen);
 545
 546         pscreen->get_name = fd_screen_get_name;
 547         pscreen->get_vendor = fd_screen_get_vendor;
 548         pscreen->get_device_vendor = fd_screen_get_device_vendor;
 549
 550         pscreen->get_timestamp = fd_screen_get_timestamp;
 551
 552         pscreen->fence_reference = fd_screen_fence_ref;
 553         pscreen->fence_signalled = fd_screen_fence_signalled;
 554         pscreen->fence_finish = fd_screen_fence_finish;
 555
 556         util_format_s3tc_init();
 557
 558         return pscreen;
 559
 560 fail:
 561         fd_screen_destroy(pscreen);
 562         return NULL;
 563 }