1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 * Rob Clark <robclark@freedesktop.org>
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_state.h"
34 #include "util/u_memory.h"
35 #include "util/u_inlines.h"
36 #include "util/u_format.h"
37 #include "util/u_format_s3tc.h"
38 #include "util/u_string.h"
40 #include "os/os_time.h"
46 #include "freedreno_context.h"
47 #include "freedreno_screen.h"
48 #include "freedreno_resource.h"
49 #include "freedreno_fence.h"
50 #include "freedreno_util.h"
52 /* XXX this should go away */
53 #include "state_tracker/drm_driver.h"
55 int fd_mesa_debug
= 0;
58 fd_screen_get_name(struct pipe_screen
*pscreen
)
60 static char buffer
[128];
61 util_snprintf(buffer
, sizeof(buffer
), "FD%03d",
62 fd_screen(pscreen
)->device_id
);
67 fd_screen_get_vendor(struct pipe_screen
*pscreen
)
73 fd_screen_get_timestamp(struct pipe_screen
*pscreen
)
75 int64_t cpu_time
= os_time_get() * 1000;
76 return cpu_time
+ fd_screen(pscreen
)->cpu_gpu_time_delta
;
80 fd_screen_fence_ref(struct pipe_screen
*pscreen
,
81 struct pipe_fence_handle
**ptr
,
82 struct pipe_fence_handle
*pfence
)
84 fd_fence_ref(fd_fence(pfence
), (struct fd_fence
**)ptr
);
88 fd_screen_fence_signalled(struct pipe_screen
*screen
,
89 struct pipe_fence_handle
*pfence
)
91 return fd_fence_signalled(fd_fence(pfence
));
95 fd_screen_fence_finish(struct pipe_screen
*screen
,
96 struct pipe_fence_handle
*pfence
,
99 return fd_fence_wait(fd_fence(pfence
));
103 fd_screen_destroy(struct pipe_screen
*pscreen
)
111 EGL Vendor Qualcomm, Inc
112 EGL Extensions EGL_QUALCOMM_shared_image EGL_KHR_image EGL_AMD_create_image EGL_KHR_lock_surface EGL_KHR_lock_surface2 EGL_KHR_fence_sync EGL_IMG_context_priorityEGL_ANDROID_image_native_buffer
113 GL extensions: GL_AMD_compressed_ATC_texture GL_AMD_performance_monitor GL_AMD_program_binary_Z400 GL_EXT_texture_filter_anisotropic GL_EXT_texture_format_BGRA8888 GL_EXT_texture_type_2_10_10_10_REV GL_NV_fence GL_OES_compressed_ETC1_RGB8_texture GL_OES_depth_texture GL_OES_depth24 GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_element_index_uint GL_OES_fbo_render_mipmap GL_OES_fragment_precision_high GL_OES_get_program_binary GL_OES_packed_depth_stencil GL_OES_rgb8_rgba8 GL_OES_standard_derivatives GL_OES_texture_3D GL_OES_texture_float GL_OES_texture_half_float GL_OES_texture_half_float_linear GL_OES_texture_npot GL_OES_vertex_half_float GL_OES_vertex_type_10_10_10_2 GL_QCOM_alpha_test GL_QCOM_binning_control GL_QCOM_driver_control GL_QCOM_perfmon_global_mode GL_QCOM_extended_get GL_QCOM_extended_get2 GL_QCOM_tiled_rendering GL_QCOM_writeonly_rendering GL_AMD_compressed_3DC_texture
114 GL_MAX_3D_TEXTURE_SIZE_OES: 1024 0 0 0
115 no GL_MAX_SAMPLES_ANGLE: GL_INVALID_ENUM
116 no GL_MAX_SAMPLES_APPLE: GL_INVALID_ENUM
117 GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT: 16 0 0 0
118 no GL_MAX_SAMPLES_IMG: GL_INVALID_ENUM
119 GL_MAX_TEXTURE_SIZE: 4096 0 0 0
120 GL_MAX_VIEWPORT_DIMS: 4096 4096 0 0
121 GL_MAX_VERTEX_ATTRIBS: 16 0 0 0
122 GL_MAX_VERTEX_UNIFORM_VECTORS: 251 0 0 0
123 GL_MAX_VARYING_VECTORS: 8 0 0 0
124 GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS: 20 0 0 0
125 GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS: 4 0 0 0
126 GL_MAX_TEXTURE_IMAGE_UNITS: 16 0 0 0
127 GL_MAX_FRAGMENT_UNIFORM_VECTORS: 221 0 0 0
128 GL_MAX_CUBE_MAP_TEXTURE_SIZE: 4096 0 0 0
129 GL_MAX_RENDERBUFFER_SIZE: 4096 0 0 0
130 no GL_TEXTURE_NUM_LEVELS_QCOM: GL_INVALID_ENUM
133 fd_screen_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
135 /* this is probably not totally correct.. but it's a start: */
137 /* Supported features (boolean caps). */
138 case PIPE_CAP_NPOT_TEXTURES
:
139 case PIPE_CAP_TWO_SIDED_STENCIL
:
140 case PIPE_CAP_ANISOTROPIC_FILTER
:
141 case PIPE_CAP_POINT_SPRITE
:
142 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
143 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
144 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
145 case PIPE_CAP_TEXTURE_SWIZZLE
:
146 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
147 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
148 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
149 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
150 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
152 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
153 case PIPE_CAP_PRIMITIVE_RESTART
:
154 case PIPE_CAP_CONDITIONAL_RENDER
:
155 case PIPE_CAP_TEXTURE_BARRIER
:
156 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
157 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION
:
158 case PIPE_CAP_TGSI_INSTANCEID
:
159 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY
:
160 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY
:
161 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY
:
162 case PIPE_CAP_COMPUTE
:
163 case PIPE_CAP_START_INSTANCE
:
164 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
165 case PIPE_CAP_TEXTURE_MULTISAMPLE
:
166 case PIPE_CAP_USER_CONSTANT_BUFFERS
:
168 case PIPE_CAP_TGSI_TEXCOORD
:
171 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
174 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
177 /* Unsupported features. */
178 case PIPE_CAP_INDEP_BLEND_ENABLE
:
179 case PIPE_CAP_INDEP_BLEND_FUNC
:
180 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
181 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
182 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
183 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
184 case PIPE_CAP_SCALED_RESOLVE
:
185 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS
:
186 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS
:
187 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED
:
188 case PIPE_CAP_VERTEX_COLOR_CLAMPED
:
189 case PIPE_CAP_USER_VERTEX_BUFFERS
:
190 case PIPE_CAP_USER_INDEX_BUFFERS
:
194 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
:
195 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME
:
196 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS
:
197 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS
:
201 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
202 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
203 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
205 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
207 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
210 /* Render targets. */
211 case PIPE_CAP_MAX_RENDER_TARGETS
:
215 case PIPE_CAP_QUERY_TIME_ELAPSED
:
216 case PIPE_CAP_OCCLUSION_QUERY
:
217 case PIPE_CAP_QUERY_TIMESTAMP
:
220 case PIPE_CAP_MIN_TEXEL_OFFSET
:
223 case PIPE_CAP_MAX_TEXEL_OFFSET
:
227 DBG("unknown param %d", param
);
233 fd_screen_get_paramf(struct pipe_screen
*pscreen
, enum pipe_capf param
)
236 case PIPE_CAPF_MAX_LINE_WIDTH
:
237 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
238 case PIPE_CAPF_MAX_POINT_WIDTH
:
239 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
241 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
243 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
245 case PIPE_CAPF_GUARD_BAND_LEFT
:
246 case PIPE_CAPF_GUARD_BAND_TOP
:
247 case PIPE_CAPF_GUARD_BAND_RIGHT
:
248 case PIPE_CAPF_GUARD_BAND_BOTTOM
:
251 DBG("unknown paramf %d", param
);
257 fd_screen_get_shader_param(struct pipe_screen
*pscreen
, unsigned shader
,
258 enum pipe_shader_cap param
)
262 case PIPE_SHADER_FRAGMENT
:
263 case PIPE_SHADER_VERTEX
:
265 case PIPE_SHADER_COMPUTE
:
266 case PIPE_SHADER_GEOMETRY
:
267 /* maye we could emulate.. */
270 DBG("unknown shader type %d", shader
);
274 /* this is probably not totally correct.. but it's a start: */
276 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
277 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
278 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
279 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
281 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
283 case PIPE_SHADER_CAP_MAX_INPUTS
:
285 case PIPE_SHADER_CAP_MAX_TEMPS
:
286 return 256; /* Max native temporaries. */
287 case PIPE_SHADER_CAP_MAX_ADDRS
:
288 /* XXX Isn't this equal to TEMPS? */
289 return 1; /* Max native address registers */
290 case PIPE_SHADER_CAP_MAX_CONSTS
:
291 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
293 case PIPE_SHADER_CAP_MAX_PREDS
:
294 return 0; /* nothing uses this */
295 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
297 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
298 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
299 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
300 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
302 case PIPE_SHADER_CAP_SUBROUTINES
:
304 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
305 case PIPE_SHADER_CAP_INTEGERS
:
307 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
309 case PIPE_SHADER_CAP_PREFERRED_IR
:
310 return PIPE_SHADER_IR_TGSI
;
312 DBG("unknown shader param %d", param
);
319 fd_screen_is_format_supported(struct pipe_screen
*pscreen
,
320 enum pipe_format format
,
321 enum pipe_texture_target target
,
322 unsigned sample_count
,
327 if ((target
>= PIPE_MAX_TEXTURE_TYPES
) ||
328 (sample_count
> 1) || /* TODO add MSAA */
329 !util_format_is_supported(format
, usage
)) {
330 DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x",
331 util_format_name(format
), target
, sample_count
, usage
);
335 /* TODO figure out how to render to other formats.. */
336 if ((usage
& PIPE_BIND_RENDER_TARGET
) &&
337 ((format
!= PIPE_FORMAT_B8G8R8A8_UNORM
) &&
338 (format
!= PIPE_FORMAT_B8G8R8X8_UNORM
))) {
339 DBG("not supported render target: format=%s, target=%d, sample_count=%d, usage=%x",
340 util_format_name(format
), target
, sample_count
, usage
);
344 if ((usage
& (PIPE_BIND_SAMPLER_VIEW
|
345 PIPE_BIND_VERTEX_BUFFER
)) &&
346 (fd_pipe2surface(format
) != FMT_INVALID
)) {
347 retval
|= usage
& (PIPE_BIND_SAMPLER_VIEW
|
348 PIPE_BIND_VERTEX_BUFFER
);
351 if ((usage
& (PIPE_BIND_RENDER_TARGET
|
352 PIPE_BIND_DISPLAY_TARGET
|
354 PIPE_BIND_SHARED
)) &&
355 (fd_pipe2color(format
) != COLORX_INVALID
)) {
356 retval
|= usage
& (PIPE_BIND_RENDER_TARGET
|
357 PIPE_BIND_DISPLAY_TARGET
|
362 if ((usage
& PIPE_BIND_DEPTH_STENCIL
) &&
363 (fd_pipe2depth(format
) != DEPTHX_INVALID
)) {
364 retval
|= PIPE_BIND_DEPTH_STENCIL
;
367 if ((usage
& PIPE_BIND_INDEX_BUFFER
) &&
368 (fd_pipe2index(format
) != INDEX_SIZE_INVALID
)) {
369 retval
|= PIPE_BIND_INDEX_BUFFER
;
372 if (usage
& PIPE_BIND_TRANSFER_READ
)
373 retval
|= PIPE_BIND_TRANSFER_READ
;
374 if (usage
& PIPE_BIND_TRANSFER_WRITE
)
375 retval
|= PIPE_BIND_TRANSFER_WRITE
;
377 if (retval
!= usage
) {
378 DBG("not supported: format=%s, target=%d, sample_count=%d, "
379 "usage=%x, retval=%x", util_format_name(format
),
380 target
, sample_count
, usage
, retval
);
383 return retval
== usage
;
387 fd_screen_bo_get_handle(struct pipe_screen
*pscreen
,
390 struct winsys_handle
*whandle
)
392 whandle
->stride
= stride
;
394 if (whandle
->type
== DRM_API_HANDLE_TYPE_SHARED
) {
395 return fd_bo_get_name(bo
, &whandle
->handle
) == 0;
396 } else if (whandle
->type
== DRM_API_HANDLE_TYPE_KMS
) {
397 whandle
->handle
= fd_bo_handle(bo
);
405 fd_screen_bo_from_handle(struct pipe_screen
*pscreen
,
406 struct winsys_handle
*whandle
,
407 unsigned *out_stride
)
409 struct fd_screen
*screen
= fd_screen(pscreen
);
412 bo
= fd_bo_from_name(screen
->dev
, whandle
->handle
);
414 DBG("ref name 0x%08x failed", whandle
->handle
);
418 *out_stride
= whandle
->stride
;
424 fd_screen_create(struct fd_device
*dev
)
426 struct fd_screen
*screen
= CALLOC_STRUCT(fd_screen
);
427 struct pipe_screen
*pscreen
;
430 char *fd_dbg
= getenv("FD_MESA_DEBUG");
432 fd_mesa_debug
= atoi(fd_dbg
);
441 // maybe this should be in context?
442 screen
->pipe
= fd_pipe_new(screen
->dev
, FD_PIPE_3D
);
444 fd_pipe_get_param(screen
->pipe
, FD_GMEM_SIZE
, &val
);
445 screen
->gmemsize_bytes
= val
;
447 fd_pipe_get_param(screen
->pipe
, FD_DEVICE_ID
, &val
);
448 screen
->device_id
= val
;
450 pscreen
= &screen
->base
;
452 pscreen
->destroy
= fd_screen_destroy
;
453 pscreen
->get_param
= fd_screen_get_param
;
454 pscreen
->get_paramf
= fd_screen_get_paramf
;
455 pscreen
->get_shader_param
= fd_screen_get_shader_param
;
456 pscreen
->context_create
= fd_context_create
;
457 pscreen
->is_format_supported
= fd_screen_is_format_supported
;
459 fd_resource_screen_init(pscreen
);
461 pscreen
->get_name
= fd_screen_get_name
;
462 pscreen
->get_vendor
= fd_screen_get_vendor
;
464 pscreen
->get_timestamp
= fd_screen_get_timestamp
;
466 pscreen
->fence_reference
= fd_screen_fence_ref
;
467 pscreen
->fence_signalled
= fd_screen_fence_signalled
;
468 pscreen
->fence_finish
= fd_screen_fence_finish
;
470 util_format_s3tc_init();