freedreno: prepare for a3xx
[mesa.git] / src / gallium / drivers / freedreno / freedreno_screen.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_memory.h"
35 #include "util/u_inlines.h"
36 #include "util/u_format.h"
37 #include "util/u_format_s3tc.h"
38 #include "util/u_string.h"
39 #include "util/u_debug.h"
40
41 #include "os/os_time.h"
42
43 #include <stdio.h>
44 #include <errno.h>
45 #include <stdlib.h>
46
47 #include "freedreno_screen.h"
48 #include "freedreno_resource.h"
49 #include "freedreno_fence.h"
50 #include "freedreno_util.h"
51
52 #include "fd2_screen.h"
53
54 /* XXX this should go away */
55 #include "state_tracker/drm_driver.h"
56
57 static const struct debug_named_value debug_options[] = {
58 {"msgs", FD_DBG_MSGS, "Print debug messages"},
59 {"disasm", FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"},
60 {"dclear", FD_DBG_DCLEAR, "Mark all state dirty after clear"},
61 {"dgmem", FD_DBG_DGMEM, "Mark all state dirty after GMEM tile pass"},
62 DEBUG_NAMED_VALUE_END
63 };
64
65 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
66
67 int fd_mesa_debug = 0;
68
69 static const char *
70 fd_screen_get_name(struct pipe_screen *pscreen)
71 {
72 static char buffer[128];
73 util_snprintf(buffer, sizeof(buffer), "FD%03d",
74 fd_screen(pscreen)->device_id);
75 return buffer;
76 }
77
78 static const char *
79 fd_screen_get_vendor(struct pipe_screen *pscreen)
80 {
81 return "freedreno";
82 }
83
84 static uint64_t
85 fd_screen_get_timestamp(struct pipe_screen *pscreen)
86 {
87 int64_t cpu_time = os_time_get() * 1000;
88 return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta;
89 }
90
91 static void
92 fd_screen_fence_ref(struct pipe_screen *pscreen,
93 struct pipe_fence_handle **ptr,
94 struct pipe_fence_handle *pfence)
95 {
96 fd_fence_ref(fd_fence(pfence), (struct fd_fence **)ptr);
97 }
98
99 static boolean
100 fd_screen_fence_signalled(struct pipe_screen *screen,
101 struct pipe_fence_handle *pfence)
102 {
103 return fd_fence_signalled(fd_fence(pfence));
104 }
105
106 static boolean
107 fd_screen_fence_finish(struct pipe_screen *screen,
108 struct pipe_fence_handle *pfence,
109 uint64_t timeout)
110 {
111 return fd_fence_wait(fd_fence(pfence));
112 }
113
114 static void
115 fd_screen_destroy(struct pipe_screen *pscreen)
116 {
117 struct fd_screen *screen = fd_screen(pscreen);
118
119 if (screen->pipe)
120 fd_pipe_del(screen->pipe);
121
122 if (screen->dev)
123 fd_device_del(screen->dev);
124
125 free(screen);
126 }
127
128 /*
129 TODO either move caps to a2xx/a3xx specific code, or maybe have some
130 tables for things that differ if the delta is not too much..
131 */
132 static int
133 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
134 {
135 /* this is probably not totally correct.. but it's a start: */
136 switch (param) {
137 /* Supported features (boolean caps). */
138 case PIPE_CAP_NPOT_TEXTURES:
139 case PIPE_CAP_TWO_SIDED_STENCIL:
140 case PIPE_CAP_ANISOTROPIC_FILTER:
141 case PIPE_CAP_POINT_SPRITE:
142 case PIPE_CAP_TEXTURE_SHADOW_MAP:
143 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
144 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
145 case PIPE_CAP_TEXTURE_SWIZZLE:
146 case PIPE_CAP_SHADER_STENCIL_EXPORT:
147 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
148 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
149 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
150 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
151 case PIPE_CAP_SM3:
152 case PIPE_CAP_SEAMLESS_CUBE_MAP:
153 case PIPE_CAP_PRIMITIVE_RESTART:
154 case PIPE_CAP_CONDITIONAL_RENDER:
155 case PIPE_CAP_TEXTURE_BARRIER:
156 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
157 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
158 case PIPE_CAP_TGSI_INSTANCEID:
159 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
160 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
161 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
162 case PIPE_CAP_COMPUTE:
163 case PIPE_CAP_START_INSTANCE:
164 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
165 case PIPE_CAP_TEXTURE_MULTISAMPLE:
166 case PIPE_CAP_USER_CONSTANT_BUFFERS:
167 return 1;
168
169 case PIPE_CAP_TGSI_TEXCOORD:
170 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
171 return 0;
172
173 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
174 return 256;
175
176 case PIPE_CAP_GLSL_FEATURE_LEVEL:
177 return 120;
178
179 /* Unsupported features. */
180 case PIPE_CAP_INDEP_BLEND_ENABLE:
181 case PIPE_CAP_INDEP_BLEND_FUNC:
182 case PIPE_CAP_DEPTH_CLIP_DISABLE:
183 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
184 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
185 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
186 case PIPE_CAP_SCALED_RESOLVE:
187 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
188 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
189 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
190 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
191 case PIPE_CAP_USER_VERTEX_BUFFERS:
192 case PIPE_CAP_USER_INDEX_BUFFERS:
193 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
194 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
195 return 0;
196
197 /* Stream output. */
198 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
199 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
200 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
201 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
202 return 0;
203
204 /* Texturing. */
205 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
206 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
207 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
208 return 14;
209 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
210 return 9192;
211 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
212 return 20;
213
214 /* Render targets. */
215 case PIPE_CAP_MAX_RENDER_TARGETS:
216 return 1;
217
218 /* Timer queries. */
219 case PIPE_CAP_QUERY_TIME_ELAPSED:
220 case PIPE_CAP_OCCLUSION_QUERY:
221 case PIPE_CAP_QUERY_TIMESTAMP:
222 return 0;
223
224 case PIPE_CAP_MIN_TEXEL_OFFSET:
225 return -8;
226
227 case PIPE_CAP_MAX_TEXEL_OFFSET:
228 return 7;
229
230 default:
231 DBG("unknown param %d", param);
232 return 0;
233 }
234 }
235
236 static float
237 fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
238 {
239 switch (param) {
240 case PIPE_CAPF_MAX_LINE_WIDTH:
241 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
242 case PIPE_CAPF_MAX_POINT_WIDTH:
243 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
244 return 8192.0f;
245 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
246 return 16.0f;
247 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
248 return 16.0f;
249 case PIPE_CAPF_GUARD_BAND_LEFT:
250 case PIPE_CAPF_GUARD_BAND_TOP:
251 case PIPE_CAPF_GUARD_BAND_RIGHT:
252 case PIPE_CAPF_GUARD_BAND_BOTTOM:
253 return 0.0f;
254 default:
255 DBG("unknown paramf %d", param);
256 return 0;
257 }
258 }
259
260 static int
261 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
262 enum pipe_shader_cap param)
263 {
264 switch(shader)
265 {
266 case PIPE_SHADER_FRAGMENT:
267 case PIPE_SHADER_VERTEX:
268 break;
269 case PIPE_SHADER_COMPUTE:
270 case PIPE_SHADER_GEOMETRY:
271 /* maye we could emulate.. */
272 return 0;
273 default:
274 DBG("unknown shader type %d", shader);
275 return 0;
276 }
277
278 /* this is probably not totally correct.. but it's a start: */
279 switch (param) {
280 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
281 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
282 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
283 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
284 return 16384;
285 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
286 return 8; /* XXX */
287 case PIPE_SHADER_CAP_MAX_INPUTS:
288 return 32;
289 case PIPE_SHADER_CAP_MAX_TEMPS:
290 return 256; /* Max native temporaries. */
291 case PIPE_SHADER_CAP_MAX_ADDRS:
292 /* XXX Isn't this equal to TEMPS? */
293 return 1; /* Max native address registers */
294 case PIPE_SHADER_CAP_MAX_CONSTS:
295 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
296 return 64;
297 case PIPE_SHADER_CAP_MAX_PREDS:
298 return 0; /* nothing uses this */
299 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
300 return 1;
301 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
302 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
303 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
304 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
305 return 1;
306 case PIPE_SHADER_CAP_SUBROUTINES:
307 return 0;
308 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
309 case PIPE_SHADER_CAP_INTEGERS:
310 return 0;
311 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
312 return 16;
313 case PIPE_SHADER_CAP_PREFERRED_IR:
314 return PIPE_SHADER_IR_TGSI;
315 default:
316 DBG("unknown shader param %d", param);
317 return 0;
318 }
319 return 0;
320 }
321
322 boolean
323 fd_screen_bo_get_handle(struct pipe_screen *pscreen,
324 struct fd_bo *bo,
325 unsigned stride,
326 struct winsys_handle *whandle)
327 {
328 whandle->stride = stride;
329
330 if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
331 return fd_bo_get_name(bo, &whandle->handle) == 0;
332 } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
333 whandle->handle = fd_bo_handle(bo);
334 return TRUE;
335 } else {
336 return FALSE;
337 }
338 }
339
340 struct fd_bo *
341 fd_screen_bo_from_handle(struct pipe_screen *pscreen,
342 struct winsys_handle *whandle,
343 unsigned *out_stride)
344 {
345 struct fd_screen *screen = fd_screen(pscreen);
346 struct fd_bo *bo;
347
348 bo = fd_bo_from_name(screen->dev, whandle->handle);
349 if (!bo) {
350 DBG("ref name 0x%08x failed", whandle->handle);
351 return NULL;
352 }
353
354 *out_stride = whandle->stride;
355
356 return bo;
357 }
358
359 struct pipe_screen *
360 fd_screen_create(struct fd_device *dev)
361 {
362 struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
363 struct pipe_screen *pscreen;
364 uint64_t val;
365
366 fd_mesa_debug = debug_get_option_fd_mesa_debug();
367
368 if (!screen)
369 return NULL;
370
371 pscreen = &screen->base;
372
373 screen->dev = dev;
374
375 // maybe this should be in context?
376 screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
377 if (!screen->pipe) {
378 DBG("could not create 3d pipe");
379 goto fail;
380 }
381
382 if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
383 DBG("could not get GMEM size");
384 goto fail;
385 }
386 screen->gmemsize_bytes = val;
387
388 if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
389 DBG("could not get device-id");
390 goto fail;
391 }
392 screen->device_id = val;
393
394 if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) {
395 DBG("could not get gpu-id");
396 goto fail;
397 }
398 screen->gpu_id = val;
399
400 /* explicitly checking for GPU revisions that are known to work. This
401 * may be overly conservative for a3xx, where spoofing the gpu_id with
402 * the blob driver seems to generate identical cmdstream dumps. But
403 * on a2xx, there seem to be small differences between the GPU revs
404 * so it is probably better to actually test first on real hardware
405 * before enabling:
406 *
407 * If you have a different adreno version, feel free to add it to one
408 * of the two cases below and see what happens. And if it works, please
409 * send a patch ;-)
410 */
411 switch (screen->gpu_id) {
412 case 220:
413 fd2_screen_init(pscreen);
414 break;
415 default:
416 debug_printf("unsupported GPU: a%03d\n", screen->gpu_id);
417 goto fail;
418 }
419
420 pscreen->destroy = fd_screen_destroy;
421 pscreen->get_param = fd_screen_get_param;
422 pscreen->get_paramf = fd_screen_get_paramf;
423 pscreen->get_shader_param = fd_screen_get_shader_param;
424
425 fd_resource_screen_init(pscreen);
426
427 pscreen->get_name = fd_screen_get_name;
428 pscreen->get_vendor = fd_screen_get_vendor;
429
430 pscreen->get_timestamp = fd_screen_get_timestamp;
431
432 pscreen->fence_reference = fd_screen_fence_ref;
433 pscreen->fence_signalled = fd_screen_fence_signalled;
434 pscreen->fence_finish = fd_screen_fence_finish;
435
436 util_format_s3tc_init();
437
438 return pscreen;
439
440 fail:
441 fd_screen_destroy(pscreen);
442 return NULL;
443 }