src/gallium/drivers/freedreno/freedreno_screen.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29
  30 #include "pipe/p_defines.h"
  31 #include "pipe/p_screen.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_memory.h"
  35 #include "util/u_inlines.h"
  36 #include "util/u_format.h"
  37 #include "util/u_format_s3tc.h"
  38 #include "util/u_string.h"
  39 #include "util/u_debug.h"
  40
  41 #include "os/os_time.h"
  42
  43 #include <stdio.h>
  44 #include <errno.h>
  45 #include <stdlib.h>
  46
  47 #include "freedreno_screen.h"
  48 #include "freedreno_resource.h"
  49 #include "freedreno_fence.h"
  50 #include "freedreno_util.h"
  51
  52 #include "fd2_screen.h"
  53 #include "fd3_screen.h"
  54
  55 /* XXX this should go away */
  56 #include "state_tracker/drm_driver.h"
  57
  58 static const struct debug_named_value debug_options[] = {
  59                 {"msgs",      FD_DBG_MSGS,   "Print debug messages"},
  60                 {"disasm",    FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"},
  61                 {"dclear",    FD_DBG_DCLEAR, "Mark all state dirty after clear"},
  62                 {"dgmem",     FD_DBG_DGMEM,  "Mark all state dirty after GMEM tile pass"},
  63                 {"dscis",     FD_DBG_DSCIS,  "Disable scissor optimization"},
  64                 {"direct",    FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"},
  65                 {"dbypass",   FD_DBG_DBYPASS,"Disable GMEM bypass"},
  66                 DEBUG_NAMED_VALUE_END
  67 };
  68
  69 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
  70
  71 int fd_mesa_debug = 0;
  72
  73 static const char *
  74 fd_screen_get_name(struct pipe_screen *pscreen)
  75 {
  76         static char buffer[128];
  77         util_snprintf(buffer, sizeof(buffer), "FD%03d",
  78                         fd_screen(pscreen)->device_id);
  79         return buffer;
  80 }
  81
  82 static const char *
  83 fd_screen_get_vendor(struct pipe_screen *pscreen)
  84 {
  85         return "freedreno";
  86 }
  87
  88 static uint64_t
  89 fd_screen_get_timestamp(struct pipe_screen *pscreen)
  90 {
  91         int64_t cpu_time = os_time_get() * 1000;
  92         return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta;
  93 }
  94
  95 static void
  96 fd_screen_fence_ref(struct pipe_screen *pscreen,
  97                 struct pipe_fence_handle **ptr,
  98                 struct pipe_fence_handle *pfence)
  99 {
 100         fd_fence_ref(fd_fence(pfence), (struct fd_fence **)ptr);
 101 }
 102
 103 static boolean
 104 fd_screen_fence_signalled(struct pipe_screen *screen,
 105                 struct pipe_fence_handle *pfence)
 106 {
 107         return fd_fence_signalled(fd_fence(pfence));
 108 }
 109
 110 static boolean
 111 fd_screen_fence_finish(struct pipe_screen *screen,
 112                 struct pipe_fence_handle *pfence,
 113                 uint64_t timeout)
 114 {
 115         return fd_fence_wait(fd_fence(pfence));
 116 }
 117
 118 static void
 119 fd_screen_destroy(struct pipe_screen *pscreen)
 120 {
 121         struct fd_screen *screen = fd_screen(pscreen);
 122
 123         if (screen->pipe)
 124                 fd_pipe_del(screen->pipe);
 125
 126         if (screen->dev)
 127                 fd_device_del(screen->dev);
 128
 129         free(screen);
 130 }
 131
 132 /*
 133 TODO either move caps to a2xx/a3xx specific code, or maybe have some
 134 tables for things that differ if the delta is not too much..
 135  */
 136 static int
 137 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 138 {
 139         /* this is probably not totally correct.. but it's a start: */
 140         switch (param) {
 141         /* Supported features (boolean caps). */
 142         case PIPE_CAP_NPOT_TEXTURES:
 143         case PIPE_CAP_TWO_SIDED_STENCIL:
 144         case PIPE_CAP_ANISOTROPIC_FILTER:
 145         case PIPE_CAP_POINT_SPRITE:
 146         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 147         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 148         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 149         case PIPE_CAP_TEXTURE_SWIZZLE:
 150         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 151         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 152         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 153         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 154         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 155         case PIPE_CAP_SM3:
 156         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 157         case PIPE_CAP_PRIMITIVE_RESTART:
 158         case PIPE_CAP_CONDITIONAL_RENDER:
 159         case PIPE_CAP_TEXTURE_BARRIER:
 160         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 161         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 162         case PIPE_CAP_TGSI_INSTANCEID:
 163         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 164         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 165         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 166         case PIPE_CAP_COMPUTE:
 167         case PIPE_CAP_START_INSTANCE:
 168         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 169         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 170         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 171                 return 1;
 172
 173         case PIPE_CAP_TGSI_TEXCOORD:
 174         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 175                 return 0;
 176
 177         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 178                 return 256;
 179
 180         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 181                 return 120;
 182
 183         /* Unsupported features. */
 184         case PIPE_CAP_INDEP_BLEND_ENABLE:
 185         case PIPE_CAP_INDEP_BLEND_FUNC:
 186         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 187         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 188         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 189         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 190         case PIPE_CAP_SCALED_RESOLVE:
 191         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 192         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 193         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 194         case PIPE_CAP_USER_VERTEX_BUFFERS:
 195         case PIPE_CAP_USER_INDEX_BUFFERS:
 196         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 197         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 198                 return 0;
 199
 200         /* Stream output. */
 201         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 202         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 203         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 204         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 205                 return 0;
 206
 207         /* Texturing. */
 208         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 209         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 210         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 211                 return MAX_MIP_LEVELS;
 212         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 213                 return 9192;
 214         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 215                 return 20;
 216
 217         /* Render targets. */
 218         case PIPE_CAP_MAX_RENDER_TARGETS:
 219                 return 1;
 220
 221         /* Timer queries. */
 222         case PIPE_CAP_QUERY_TIME_ELAPSED:
 223         case PIPE_CAP_OCCLUSION_QUERY:
 224         case PIPE_CAP_QUERY_TIMESTAMP:
 225                 return 0;
 226
 227         case PIPE_CAP_MIN_TEXEL_OFFSET:
 228                 return -8;
 229
 230         case PIPE_CAP_MAX_TEXEL_OFFSET:
 231                 return 7;
 232
 233         case PIPE_CAP_ENDIANNESS:
 234                 return PIPE_ENDIAN_LITTLE;
 235
 236         default:
 237                 DBG("unknown param %d", param);
 238                 return 0;
 239         }
 240 }
 241
 242 static float
 243 fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 244 {
 245         switch (param) {
 246         case PIPE_CAPF_MAX_LINE_WIDTH:
 247         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 248         case PIPE_CAPF_MAX_POINT_WIDTH:
 249         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 250                 return 8192.0f;
 251         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 252                 return 16.0f;
 253         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 254                 return 16.0f;
 255         case PIPE_CAPF_GUARD_BAND_LEFT:
 256         case PIPE_CAPF_GUARD_BAND_TOP:
 257         case PIPE_CAPF_GUARD_BAND_RIGHT:
 258         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 259                 return 0.0f;
 260         default:
 261                 DBG("unknown paramf %d", param);
 262                 return 0;
 263         }
 264 }
 265
 266 static int
 267 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 268                 enum pipe_shader_cap param)
 269 {
 270         switch(shader)
 271         {
 272         case PIPE_SHADER_FRAGMENT:
 273         case PIPE_SHADER_VERTEX:
 274                 break;
 275         case PIPE_SHADER_COMPUTE:
 276         case PIPE_SHADER_GEOMETRY:
 277                 /* maye we could emulate.. */
 278                 return 0;
 279         default:
 280                 DBG("unknown shader type %d", shader);
 281                 return 0;
 282         }
 283
 284         /* this is probably not totally correct.. but it's a start: */
 285         switch (param) {
 286         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 287         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 288         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 289         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 290                 return 16384;
 291         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 292                 return 8; /* XXX */
 293         case PIPE_SHADER_CAP_MAX_INPUTS:
 294                 return 32;
 295         case PIPE_SHADER_CAP_MAX_TEMPS:
 296                 return 256; /* Max native temporaries. */
 297         case PIPE_SHADER_CAP_MAX_ADDRS:
 298                 /* XXX Isn't this equal to TEMPS? */
 299                 return 1; /* Max native address registers */
 300         case PIPE_SHADER_CAP_MAX_CONSTS:
 301         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 302                 return 64;
 303         case PIPE_SHADER_CAP_MAX_PREDS:
 304                 return 0; /* nothing uses this */
 305         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 306                 return 1;
 307         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 308         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 309         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 310         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 311                 return 1;
 312         case PIPE_SHADER_CAP_SUBROUTINES:
 313                 return 0;
 314         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 315         case PIPE_SHADER_CAP_INTEGERS:
 316                 return 0;
 317         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 318                 return 16;
 319         case PIPE_SHADER_CAP_PREFERRED_IR:
 320                 return PIPE_SHADER_IR_TGSI;
 321         default:
 322                 DBG("unknown shader param %d", param);
 323                 return 0;
 324         }
 325         return 0;
 326 }
 327
 328 boolean
 329 fd_screen_bo_get_handle(struct pipe_screen *pscreen,
 330                 struct fd_bo *bo,
 331                 unsigned stride,
 332                 struct winsys_handle *whandle)
 333 {
 334         whandle->stride = stride;
 335
 336         if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
 337                 return fd_bo_get_name(bo, &whandle->handle) == 0;
 338         } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
 339                 whandle->handle = fd_bo_handle(bo);
 340                 return TRUE;
 341         } else {
 342                 return FALSE;
 343         }
 344 }
 345
 346 struct fd_bo *
 347 fd_screen_bo_from_handle(struct pipe_screen *pscreen,
 348                 struct winsys_handle *whandle,
 349                 unsigned *out_stride)
 350 {
 351         struct fd_screen *screen = fd_screen(pscreen);
 352         struct fd_bo *bo;
 353
 354         bo = fd_bo_from_name(screen->dev, whandle->handle);
 355         if (!bo) {
 356                 DBG("ref name 0x%08x failed", whandle->handle);
 357                 return NULL;
 358         }
 359
 360         *out_stride = whandle->stride;
 361
 362         return bo;
 363 }
 364
 365 struct pipe_screen *
 366 fd_screen_create(struct fd_device *dev)
 367 {
 368         struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
 369         struct pipe_screen *pscreen;
 370         uint64_t val;
 371
 372         fd_mesa_debug = debug_get_option_fd_mesa_debug();
 373
 374         if (!screen)
 375                 return NULL;
 376
 377         pscreen = &screen->base;
 378
 379         screen->dev = dev;
 380
 381         // maybe this should be in context?
 382         screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
 383         if (!screen->pipe) {
 384                 DBG("could not create 3d pipe");
 385                 goto fail;
 386         }
 387
 388         if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
 389                 DBG("could not get GMEM size");
 390                 goto fail;
 391         }
 392         screen->gmemsize_bytes = val;
 393
 394         if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
 395                 DBG("could not get device-id");
 396                 goto fail;
 397         }
 398         screen->device_id = val;
 399
 400         if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) {
 401                 DBG("could not get gpu-id");
 402                 goto fail;
 403         }
 404         screen->gpu_id = val;
 405
 406         /* explicitly checking for GPU revisions that are known to work.  This
 407          * may be overly conservative for a3xx, where spoofing the gpu_id with
 408          * the blob driver seems to generate identical cmdstream dumps.  But
 409          * on a2xx, there seem to be small differences between the GPU revs
 410          * so it is probably better to actually test first on real hardware
 411          * before enabling:
 412          *
 413          * If you have a different adreno version, feel free to add it to one
 414          * of the two cases below and see what happens.  And if it works, please
 415          * send a patch ;-)
 416          */
 417         switch (screen->gpu_id) {
 418         case 220:
 419                 fd2_screen_init(pscreen);
 420                 break;
 421         case 320:
 422                 fd3_screen_init(pscreen);
 423                 break;
 424         default:
 425                 debug_printf("unsupported GPU: a%03d\n", screen->gpu_id);
 426                 goto fail;
 427         }
 428
 429         pscreen->destroy = fd_screen_destroy;
 430         pscreen->get_param = fd_screen_get_param;
 431         pscreen->get_paramf = fd_screen_get_paramf;
 432         pscreen->get_shader_param = fd_screen_get_shader_param;
 433
 434         fd_resource_screen_init(pscreen);
 435
 436         pscreen->get_name = fd_screen_get_name;
 437         pscreen->get_vendor = fd_screen_get_vendor;
 438
 439         pscreen->get_timestamp = fd_screen_get_timestamp;
 440
 441         pscreen->fence_reference = fd_screen_fence_ref;
 442         pscreen->fence_signalled = fd_screen_fence_signalled;
 443         pscreen->fence_finish = fd_screen_fence_finish;
 444
 445         util_format_s3tc_init();
 446
 447         return pscreen;
 448
 449 fail:
 450         fd_screen_destroy(pscreen);
 451         return NULL;
 452 }