src/gallium/drivers/freedreno/freedreno_screen.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29
  30 #include "pipe/p_defines.h"
  31 #include "pipe/p_screen.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_memory.h"
  35 #include "util/u_inlines.h"
  36 #include "util/u_format.h"
  37 #include "util/u_format_s3tc.h"
  38 #include "util/u_string.h"
  39 #include "util/u_debug.h"
  40
  41 #include "os/os_time.h"
  42
  43 #include <stdio.h>
  44 #include <errno.h>
  45 #include <stdlib.h>
  46
  47 #include "freedreno_screen.h"
  48 #include "freedreno_resource.h"
  49 #include "freedreno_fence.h"
  50 #include "freedreno_query.h"
  51 #include "freedreno_util.h"
  52
  53 #include "a2xx/fd2_screen.h"
  54 #include "a3xx/fd3_screen.h"
  55 #include "a4xx/fd4_screen.h"
  56
  57 /* XXX this should go away */
  58 #include "state_tracker/drm_driver.h"
  59
  60 static const struct debug_named_value debug_options[] = {
  61                 {"msgs",      FD_DBG_MSGS,   "Print debug messages"},
  62                 {"disasm",    FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"},
  63                 {"dclear",    FD_DBG_DCLEAR, "Mark all state dirty after clear"},
  64                 {"flush",     FD_DBG_FLUSH,  "Force flush after every draw"},
  65                 {"noscis",    FD_DBG_NOSCIS, "Disable scissor optimization"},
  66                 {"direct",    FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"},
  67                 {"nobypass",  FD_DBG_NOBYPASS, "Disable GMEM bypass"},
  68                 {"fraghalf",  FD_DBG_FRAGHALF, "Use half-precision in fragment shader"},
  69                 {"nobin",     FD_DBG_NOBIN,  "Disable hw binning"},
  70                 {"optmsgs",   FD_DBG_OPTMSGS,"Enable optimizater debug messages"},
  71                 {"optdump",   FD_DBG_OPTDUMP,"Dump shader DAG to .dot files"},
  72                 {"glsl120",   FD_DBG_GLSL120,"Temporary flag to force GLSL 120 (rather than 130) on a3xx+"},
  73                 {"nocp",      FD_DBG_NOCP,   "Disable copy-propagation"},
  74                 DEBUG_NAMED_VALUE_END
  75 };
  76
  77 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
  78
  79 int fd_mesa_debug = 0;
  80 bool fd_binning_enabled = true;
  81 static bool glsl120 = false;
  82
  83 static const char *
  84 fd_screen_get_name(struct pipe_screen *pscreen)
  85 {
  86         static char buffer[128];
  87         util_snprintf(buffer, sizeof(buffer), "FD%03d",
  88                         fd_screen(pscreen)->device_id);
  89         return buffer;
  90 }
  91
  92 static const char *
  93 fd_screen_get_vendor(struct pipe_screen *pscreen)
  94 {
  95         return "freedreno";
  96 }
  97
  98 static uint64_t
  99 fd_screen_get_timestamp(struct pipe_screen *pscreen)
 100 {
 101         int64_t cpu_time = os_time_get() * 1000;
 102         return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta;
 103 }
 104
 105 static void
 106 fd_screen_destroy(struct pipe_screen *pscreen)
 107 {
 108         struct fd_screen *screen = fd_screen(pscreen);
 109
 110         if (screen->pipe)
 111                 fd_pipe_del(screen->pipe);
 112
 113         if (screen->dev)
 114                 fd_device_del(screen->dev);
 115
 116         free(screen);
 117 }
 118
 119 /*
 120 TODO either move caps to a2xx/a3xx specific code, or maybe have some
 121 tables for things that differ if the delta is not too much..
 122  */
 123 static int
 124 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 125 {
 126         struct fd_screen *screen = fd_screen(pscreen);
 127
 128         /* this is probably not totally correct.. but it's a start: */
 129         switch (param) {
 130         /* Supported features (boolean caps). */
 131         case PIPE_CAP_NPOT_TEXTURES:
 132         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 133         case PIPE_CAP_TWO_SIDED_STENCIL:
 134         case PIPE_CAP_ANISOTROPIC_FILTER:
 135         case PIPE_CAP_POINT_SPRITE:
 136         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 137         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 138         case PIPE_CAP_TEXTURE_SWIZZLE:
 139         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 140         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 141         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 142         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 143         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 144         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 145         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 146         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 147         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 148         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 149         case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 150         case PIPE_CAP_VERTEXID_NOBASE:
 151                 return 1;
 152
 153         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 154         case PIPE_CAP_TGSI_TEXCOORD:
 155         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 156         case PIPE_CAP_CONDITIONAL_RENDER:
 157         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 158         case PIPE_CAP_TEXTURE_BARRIER:
 159         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 160         case PIPE_CAP_CUBE_MAP_ARRAY:
 161         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 162         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 163         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 164         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 165         case PIPE_CAP_START_INSTANCE:
 166         case PIPE_CAP_COMPUTE:
 167                 return 0;
 168
 169         case PIPE_CAP_SM3:
 170         case PIPE_CAP_PRIMITIVE_RESTART:
 171         case PIPE_CAP_TGSI_INSTANCEID:
 172         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 173                 return is_a3xx(screen) || is_a4xx(screen);
 174
 175         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 176                 return 256;
 177
 178         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 179                 if (glsl120)
 180                         return 120;
 181                 return (is_a3xx(screen) || is_a4xx(screen)) ? 130 : 120;
 182
 183         /* Unsupported features. */
 184         case PIPE_CAP_INDEP_BLEND_ENABLE:
 185         case PIPE_CAP_INDEP_BLEND_FUNC:
 186         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 187         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 188         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 189         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 190         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 191         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 192         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 193         case PIPE_CAP_USER_VERTEX_BUFFERS:
 194         case PIPE_CAP_USER_INDEX_BUFFERS:
 195         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 196         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 197         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 198         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 199         case PIPE_CAP_TEXTURE_GATHER_SM5:
 200         case PIPE_CAP_FAKE_SW_MSAA:
 201         case PIPE_CAP_TEXTURE_QUERY_LOD:
 202         case PIPE_CAP_SAMPLE_SHADING:
 203         case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 204         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 205         case PIPE_CAP_DRAW_INDIRECT:
 206         case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 207         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 208         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 209         case PIPE_CAP_CLIP_HALFZ:
 210         case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 211         case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 212         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 213                 return 0;
 214
 215         case PIPE_CAP_MAX_VIEWPORTS:
 216                 return 1;
 217
 218         /* Stream output. */
 219         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 220         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 221         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 222         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 223                 return 0;
 224
 225         /* Geometry shader output, unsupported. */
 226         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 227         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 228         case PIPE_CAP_MAX_VERTEX_STREAMS:
 229                 return 0;
 230
 231         case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 232                 return 2048;
 233
 234         /* Texturing. */
 235         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 236         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 237                 return MAX_MIP_LEVELS;
 238         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 239                 return 11;
 240
 241         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 242                 return (is_a3xx(screen) || is_a4xx(screen)) ? 256 : 0;
 243
 244         /* Render targets. */
 245         case PIPE_CAP_MAX_RENDER_TARGETS:
 246                 return 1;
 247
 248         /* Queries. */
 249         case PIPE_CAP_QUERY_TIME_ELAPSED:
 250         case PIPE_CAP_QUERY_TIMESTAMP:
 251                 return 0;
 252         case PIPE_CAP_OCCLUSION_QUERY:
 253                 /* TODO still missing on a4xx, but we lie to get gl2..
 254                  * it's not a feature, it's a bug!
 255                  */
 256                 return is_a3xx(screen) || is_a4xx(screen);
 257
 258         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 259         case PIPE_CAP_MIN_TEXEL_OFFSET:
 260                 return -8;
 261
 262         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 263         case PIPE_CAP_MAX_TEXEL_OFFSET:
 264                 return 7;
 265
 266         case PIPE_CAP_ENDIANNESS:
 267                 return PIPE_ENDIAN_LITTLE;
 268
 269         case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 270                 return 64;
 271
 272         case PIPE_CAP_VENDOR_ID:
 273                 return 0x5143;
 274         case PIPE_CAP_DEVICE_ID:
 275                 return 0xFFFFFFFF;
 276         case PIPE_CAP_ACCELERATED:
 277                 return 1;
 278         case PIPE_CAP_VIDEO_MEMORY:
 279                 DBG("FINISHME: The value returned is incorrect\n");
 280                 return 10;
 281         case PIPE_CAP_UMA:
 282                 return 1;
 283         }
 284         debug_printf("unknown param %d\n", param);
 285         return 0;
 286 }
 287
 288 static float
 289 fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 290 {
 291         switch (param) {
 292         case PIPE_CAPF_MAX_LINE_WIDTH:
 293         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 294         case PIPE_CAPF_MAX_POINT_WIDTH:
 295         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 296                 return 8192.0f;
 297         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 298                 return 16.0f;
 299         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 300                 return 15.0f;
 301         case PIPE_CAPF_GUARD_BAND_LEFT:
 302         case PIPE_CAPF_GUARD_BAND_TOP:
 303         case PIPE_CAPF_GUARD_BAND_RIGHT:
 304         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 305                 return 0.0f;
 306         }
 307         debug_printf("unknown paramf %d\n", param);
 308         return 0;
 309 }
 310
 311 static int
 312 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 313                 enum pipe_shader_cap param)
 314 {
 315         struct fd_screen *screen = fd_screen(pscreen);
 316
 317         switch(shader)
 318         {
 319         case PIPE_SHADER_FRAGMENT:
 320         case PIPE_SHADER_VERTEX:
 321                 break;
 322         case PIPE_SHADER_COMPUTE:
 323         case PIPE_SHADER_GEOMETRY:
 324                 /* maye we could emulate.. */
 325                 return 0;
 326         default:
 327                 DBG("unknown shader type %d", shader);
 328                 return 0;
 329         }
 330
 331         /* this is probably not totally correct.. but it's a start: */
 332         switch (param) {
 333         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 334         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 335         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 336         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 337                 return 16384;
 338         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 339                 return 8; /* XXX */
 340         case PIPE_SHADER_CAP_MAX_INPUTS:
 341         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 342                 return 16;
 343         case PIPE_SHADER_CAP_MAX_TEMPS:
 344                 return 64; /* Max native temporaries. */
 345         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 346                 /* NOTE: seems to be limit for a3xx is actually 512 but
 347                  * split between VS and FS.  Use lower limit of 256 to
 348                  * avoid getting into impossible situations:
 349                  */
 350                 return ((is_a3xx(screen) || is_a4xx(screen)) ? 256 : 64) * sizeof(float[4]);
 351         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 352                 return 1;
 353         case PIPE_SHADER_CAP_MAX_PREDS:
 354                 return 0; /* nothing uses this */
 355         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 356                 return 1;
 357         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 358         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 359         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 360         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 361                 return 1;
 362         case PIPE_SHADER_CAP_SUBROUTINES:
 363         case PIPE_SHADER_CAP_DOUBLES:
 364         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 365         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 366                 return 0;
 367         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 368                 return 1;
 369         case PIPE_SHADER_CAP_INTEGERS:
 370                 if (glsl120)
 371                         return 0;
 372                 return (is_a3xx(screen) || is_a4xx(screen)) ? 1 : 0;
 373         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 374         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 375                 return 16;
 376         case PIPE_SHADER_CAP_PREFERRED_IR:
 377                 return PIPE_SHADER_IR_TGSI;
 378         }
 379         debug_printf("unknown shader param %d\n", param);
 380         return 0;
 381 }
 382
 383 boolean
 384 fd_screen_bo_get_handle(struct pipe_screen *pscreen,
 385                 struct fd_bo *bo,
 386                 unsigned stride,
 387                 struct winsys_handle *whandle)
 388 {
 389         whandle->stride = stride;
 390
 391         if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
 392                 return fd_bo_get_name(bo, &whandle->handle) == 0;
 393         } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
 394                 whandle->handle = fd_bo_handle(bo);
 395                 return TRUE;
 396         } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) {
 397                 whandle->handle = fd_bo_dmabuf(bo);
 398                 return TRUE;
 399         } else {
 400                 return FALSE;
 401         }
 402 }
 403
 404 struct fd_bo *
 405 fd_screen_bo_from_handle(struct pipe_screen *pscreen,
 406                 struct winsys_handle *whandle,
 407                 unsigned *out_stride)
 408 {
 409         struct fd_screen *screen = fd_screen(pscreen);
 410         struct fd_bo *bo;
 411
 412         if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
 413                 bo = fd_bo_from_name(screen->dev, whandle->handle);
 414         } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
 415                 bo = fd_bo_from_handle(screen->dev, whandle->handle, 0);
 416         } else if (whandle->type == DRM_API_HANDLE_TYPE_FD) {
 417                 bo = fd_bo_from_dmabuf(screen->dev, whandle->handle);
 418         } else {
 419                 DBG("Attempt to import unsupported handle type %d", whandle->type);
 420                 return NULL;
 421         }
 422
 423         if (!bo) {
 424                 DBG("ref name 0x%08x failed", whandle->handle);
 425                 return NULL;
 426         }
 427
 428         *out_stride = whandle->stride;
 429
 430         return bo;
 431 }
 432
 433 struct pipe_screen *
 434 fd_screen_create(struct fd_device *dev)
 435 {
 436         struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
 437         struct pipe_screen *pscreen;
 438         uint64_t val;
 439
 440         fd_mesa_debug = debug_get_option_fd_mesa_debug();
 441
 442         if (fd_mesa_debug & FD_DBG_NOBIN)
 443                 fd_binning_enabled = false;
 444
 445         glsl120 = !!(fd_mesa_debug & FD_DBG_GLSL120);
 446
 447         if (!screen)
 448                 return NULL;
 449
 450         pscreen = &screen->base;
 451
 452         screen->dev = dev;
 453
 454         // maybe this should be in context?
 455         screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
 456         if (!screen->pipe) {
 457                 DBG("could not create 3d pipe");
 458                 goto fail;
 459         }
 460
 461         if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
 462                 DBG("could not get GMEM size");
 463                 goto fail;
 464         }
 465         screen->gmemsize_bytes = val;
 466
 467         if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
 468                 DBG("could not get device-id");
 469                 goto fail;
 470         }
 471         screen->device_id = val;
 472
 473         if (fd_pipe_get_param(screen->pipe, FD_GPU_ID, &val)) {
 474                 DBG("could not get gpu-id");
 475                 goto fail;
 476         }
 477         screen->gpu_id = val;
 478
 479         if (fd_pipe_get_param(screen->pipe, FD_CHIP_ID, &val)) {
 480                 DBG("could not get chip-id");
 481                 /* older kernels may not have this property: */
 482                 unsigned core  = screen->gpu_id / 100;
 483                 unsigned major = (screen->gpu_id % 100) / 10;
 484                 unsigned minor = screen->gpu_id % 10;
 485                 unsigned patch = 0;  /* assume the worst */
 486                 val = (patch & 0xff) | ((minor & 0xff) << 8) |
 487                         ((major & 0xff) << 16) | ((core & 0xff) << 24);
 488         }
 489         screen->chip_id = val;
 490
 491         DBG("Pipe Info:");
 492         DBG(" GPU-id:          %d", screen->gpu_id);
 493         DBG(" Chip-id:         0x%08x", screen->chip_id);
 494         DBG(" GMEM size:       0x%08x", screen->gmemsize_bytes);
 495
 496         /* explicitly checking for GPU revisions that are known to work.  This
 497          * may be overly conservative for a3xx, where spoofing the gpu_id with
 498          * the blob driver seems to generate identical cmdstream dumps.  But
 499          * on a2xx, there seem to be small differences between the GPU revs
 500          * so it is probably better to actually test first on real hardware
 501          * before enabling:
 502          *
 503          * If you have a different adreno version, feel free to add it to one
 504          * of the cases below and see what happens.  And if it works, please
 505          * send a patch ;-)
 506          */
 507         switch (screen->gpu_id) {
 508         case 220:
 509                 fd2_screen_init(pscreen);
 510                 break;
 511         case 320:
 512         case 330:
 513                 fd3_screen_init(pscreen);
 514                 break;
 515         case 420:
 516                 fd4_screen_init(pscreen);
 517                 break;
 518         default:
 519                 debug_printf("unsupported GPU: a%03d\n", screen->gpu_id);
 520                 goto fail;
 521         }
 522
 523         pscreen->destroy = fd_screen_destroy;
 524         pscreen->get_param = fd_screen_get_param;
 525         pscreen->get_paramf = fd_screen_get_paramf;
 526         pscreen->get_shader_param = fd_screen_get_shader_param;
 527
 528         fd_resource_screen_init(pscreen);
 529         fd_query_screen_init(pscreen);
 530
 531         pscreen->get_name = fd_screen_get_name;
 532         pscreen->get_vendor = fd_screen_get_vendor;
 533
 534         pscreen->get_timestamp = fd_screen_get_timestamp;
 535
 536         pscreen->fence_reference = fd_screen_fence_ref;
 537         pscreen->fence_signalled = fd_screen_fence_signalled;
 538         pscreen->fence_finish = fd_screen_fence_finish;
 539
 540         util_format_s3tc_init();
 541
 542         return pscreen;
 543
 544 fail:
 545         fd_screen_destroy(pscreen);
 546         return NULL;
 547 }