ilo: hook up pipe context blit functions
[mesa.git] / src / gallium / drivers / freedreno / freedreno_screen.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_memory.h"
35 #include "util/u_inlines.h"
36 #include "util/u_format.h"
37 #include "util/u_format_s3tc.h"
38 #include "util/u_string.h"
39 #include "util/u_debug.h"
40
41 #include "os/os_time.h"
42
43 #include <stdio.h>
44 #include <errno.h>
45 #include <stdlib.h>
46
47 #include "freedreno_context.h"
48 #include "freedreno_screen.h"
49 #include "freedreno_resource.h"
50 #include "freedreno_fence.h"
51 #include "freedreno_util.h"
52
53 /* XXX this should go away */
54 #include "state_tracker/drm_driver.h"
55
56 static const struct debug_named_value debug_options[] = {
57 {"msgs", FD_DBG_MSGS, "Print debug messages"},
58 {"disasm", FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"},
59 {"dclear", FD_DBG_DCLEAR, "Mark all state dirty after clear"},
60 {"dgmem", FD_DBG_DGMEM, "Mark all state dirty after GMEM tile pass"},
61 DEBUG_NAMED_VALUE_END
62 };
63
64 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
65
66 int fd_mesa_debug = 0;
67
68 static const char *
69 fd_screen_get_name(struct pipe_screen *pscreen)
70 {
71 static char buffer[128];
72 util_snprintf(buffer, sizeof(buffer), "FD%03d",
73 fd_screen(pscreen)->device_id);
74 return buffer;
75 }
76
77 static const char *
78 fd_screen_get_vendor(struct pipe_screen *pscreen)
79 {
80 return "freedreno";
81 }
82
83 static uint64_t
84 fd_screen_get_timestamp(struct pipe_screen *pscreen)
85 {
86 int64_t cpu_time = os_time_get() * 1000;
87 return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta;
88 }
89
90 static void
91 fd_screen_fence_ref(struct pipe_screen *pscreen,
92 struct pipe_fence_handle **ptr,
93 struct pipe_fence_handle *pfence)
94 {
95 fd_fence_ref(fd_fence(pfence), (struct fd_fence **)ptr);
96 }
97
98 static boolean
99 fd_screen_fence_signalled(struct pipe_screen *screen,
100 struct pipe_fence_handle *pfence)
101 {
102 return fd_fence_signalled(fd_fence(pfence));
103 }
104
105 static boolean
106 fd_screen_fence_finish(struct pipe_screen *screen,
107 struct pipe_fence_handle *pfence,
108 uint64_t timeout)
109 {
110 return fd_fence_wait(fd_fence(pfence));
111 }
112
113 static void
114 fd_screen_destroy(struct pipe_screen *pscreen)
115 {
116 struct fd_screen *screen = fd_screen(pscreen);
117
118 if (screen->pipe)
119 fd_pipe_del(screen->pipe);
120
121 if (screen->dev)
122 fd_device_del(screen->dev);
123
124 free(screen);
125 }
126
127 /*
128 EGL Version 1.4
129 EGL Vendor Qualcomm, Inc
130 EGL Extensions EGL_QUALCOMM_shared_image EGL_KHR_image EGL_AMD_create_image EGL_KHR_lock_surface EGL_KHR_lock_surface2 EGL_KHR_fence_sync EGL_IMG_context_priorityEGL_ANDROID_image_native_buffer
131 GL extensions: GL_AMD_compressed_ATC_texture GL_AMD_performance_monitor GL_AMD_program_binary_Z400 GL_EXT_texture_filter_anisotropic GL_EXT_texture_format_BGRA8888 GL_EXT_texture_type_2_10_10_10_REV GL_NV_fence GL_OES_compressed_ETC1_RGB8_texture GL_OES_depth_texture GL_OES_depth24 GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_element_index_uint GL_OES_fbo_render_mipmap GL_OES_fragment_precision_high GL_OES_get_program_binary GL_OES_packed_depth_stencil GL_OES_rgb8_rgba8 GL_OES_standard_derivatives GL_OES_texture_3D GL_OES_texture_float GL_OES_texture_half_float GL_OES_texture_half_float_linear GL_OES_texture_npot GL_OES_vertex_half_float GL_OES_vertex_type_10_10_10_2 GL_QCOM_alpha_test GL_QCOM_binning_control GL_QCOM_driver_control GL_QCOM_perfmon_global_mode GL_QCOM_extended_get GL_QCOM_extended_get2 GL_QCOM_tiled_rendering GL_QCOM_writeonly_rendering GL_AMD_compressed_3DC_texture
132 GL_MAX_3D_TEXTURE_SIZE_OES: 1024 0 0 0
133 no GL_MAX_SAMPLES_ANGLE: GL_INVALID_ENUM
134 no GL_MAX_SAMPLES_APPLE: GL_INVALID_ENUM
135 GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT: 16 0 0 0
136 no GL_MAX_SAMPLES_IMG: GL_INVALID_ENUM
137 GL_MAX_TEXTURE_SIZE: 4096 0 0 0
138 GL_MAX_VIEWPORT_DIMS: 4096 4096 0 0
139 GL_MAX_VERTEX_ATTRIBS: 16 0 0 0
140 GL_MAX_VERTEX_UNIFORM_VECTORS: 251 0 0 0
141 GL_MAX_VARYING_VECTORS: 8 0 0 0
142 GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS: 20 0 0 0
143 GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS: 4 0 0 0
144 GL_MAX_TEXTURE_IMAGE_UNITS: 16 0 0 0
145 GL_MAX_FRAGMENT_UNIFORM_VECTORS: 221 0 0 0
146 GL_MAX_CUBE_MAP_TEXTURE_SIZE: 4096 0 0 0
147 GL_MAX_RENDERBUFFER_SIZE: 4096 0 0 0
148 no GL_TEXTURE_NUM_LEVELS_QCOM: GL_INVALID_ENUM
149 */
150 static int
151 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
152 {
153 /* this is probably not totally correct.. but it's a start: */
154 switch (param) {
155 /* Supported features (boolean caps). */
156 case PIPE_CAP_NPOT_TEXTURES:
157 case PIPE_CAP_TWO_SIDED_STENCIL:
158 case PIPE_CAP_ANISOTROPIC_FILTER:
159 case PIPE_CAP_POINT_SPRITE:
160 case PIPE_CAP_TEXTURE_SHADOW_MAP:
161 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
162 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
163 case PIPE_CAP_TEXTURE_SWIZZLE:
164 case PIPE_CAP_SHADER_STENCIL_EXPORT:
165 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
166 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
167 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
168 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
169 case PIPE_CAP_SM3:
170 case PIPE_CAP_SEAMLESS_CUBE_MAP:
171 case PIPE_CAP_PRIMITIVE_RESTART:
172 case PIPE_CAP_CONDITIONAL_RENDER:
173 case PIPE_CAP_TEXTURE_BARRIER:
174 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
175 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
176 case PIPE_CAP_TGSI_INSTANCEID:
177 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
178 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
179 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
180 case PIPE_CAP_COMPUTE:
181 case PIPE_CAP_START_INSTANCE:
182 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
183 case PIPE_CAP_TEXTURE_MULTISAMPLE:
184 case PIPE_CAP_USER_CONSTANT_BUFFERS:
185 return 1;
186
187 case PIPE_CAP_TGSI_TEXCOORD:
188 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
189 return 0;
190
191 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
192 return 256;
193
194 case PIPE_CAP_GLSL_FEATURE_LEVEL:
195 return 120;
196
197 /* Unsupported features. */
198 case PIPE_CAP_INDEP_BLEND_ENABLE:
199 case PIPE_CAP_INDEP_BLEND_FUNC:
200 case PIPE_CAP_DEPTH_CLIP_DISABLE:
201 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
202 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
203 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
204 case PIPE_CAP_SCALED_RESOLVE:
205 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
206 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
207 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
208 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
209 case PIPE_CAP_USER_VERTEX_BUFFERS:
210 case PIPE_CAP_USER_INDEX_BUFFERS:
211 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
212 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
213 return 0;
214
215 /* Stream output. */
216 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
217 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
218 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
219 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
220 return 0;
221
222 /* Texturing. */
223 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
224 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
225 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
226 return 14;
227 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
228 return 9192;
229 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
230 return 20;
231
232 /* Render targets. */
233 case PIPE_CAP_MAX_RENDER_TARGETS:
234 return 1;
235
236 /* Timer queries. */
237 case PIPE_CAP_QUERY_TIME_ELAPSED:
238 case PIPE_CAP_OCCLUSION_QUERY:
239 case PIPE_CAP_QUERY_TIMESTAMP:
240 return 0;
241
242 case PIPE_CAP_MIN_TEXEL_OFFSET:
243 return -8;
244
245 case PIPE_CAP_MAX_TEXEL_OFFSET:
246 return 7;
247
248 default:
249 DBG("unknown param %d", param);
250 return 0;
251 }
252 }
253
254 static float
255 fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
256 {
257 switch (param) {
258 case PIPE_CAPF_MAX_LINE_WIDTH:
259 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
260 case PIPE_CAPF_MAX_POINT_WIDTH:
261 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
262 return 8192.0f;
263 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
264 return 16.0f;
265 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
266 return 16.0f;
267 case PIPE_CAPF_GUARD_BAND_LEFT:
268 case PIPE_CAPF_GUARD_BAND_TOP:
269 case PIPE_CAPF_GUARD_BAND_RIGHT:
270 case PIPE_CAPF_GUARD_BAND_BOTTOM:
271 return 0.0f;
272 default:
273 DBG("unknown paramf %d", param);
274 return 0;
275 }
276 }
277
278 static int
279 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
280 enum pipe_shader_cap param)
281 {
282 switch(shader)
283 {
284 case PIPE_SHADER_FRAGMENT:
285 case PIPE_SHADER_VERTEX:
286 break;
287 case PIPE_SHADER_COMPUTE:
288 case PIPE_SHADER_GEOMETRY:
289 /* maye we could emulate.. */
290 return 0;
291 default:
292 DBG("unknown shader type %d", shader);
293 return 0;
294 }
295
296 /* this is probably not totally correct.. but it's a start: */
297 switch (param) {
298 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
299 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
300 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
301 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
302 return 16384;
303 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
304 return 8; /* XXX */
305 case PIPE_SHADER_CAP_MAX_INPUTS:
306 return 32;
307 case PIPE_SHADER_CAP_MAX_TEMPS:
308 return 256; /* Max native temporaries. */
309 case PIPE_SHADER_CAP_MAX_ADDRS:
310 /* XXX Isn't this equal to TEMPS? */
311 return 1; /* Max native address registers */
312 case PIPE_SHADER_CAP_MAX_CONSTS:
313 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
314 return 64;
315 case PIPE_SHADER_CAP_MAX_PREDS:
316 return 0; /* nothing uses this */
317 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
318 return 1;
319 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
320 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
321 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
322 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
323 return 1;
324 case PIPE_SHADER_CAP_SUBROUTINES:
325 return 0;
326 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
327 case PIPE_SHADER_CAP_INTEGERS:
328 return 0;
329 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
330 return 16;
331 case PIPE_SHADER_CAP_PREFERRED_IR:
332 return PIPE_SHADER_IR_TGSI;
333 default:
334 DBG("unknown shader param %d", param);
335 return 0;
336 }
337 return 0;
338 }
339
340 static boolean
341 fd_screen_is_format_supported(struct pipe_screen *pscreen,
342 enum pipe_format format,
343 enum pipe_texture_target target,
344 unsigned sample_count,
345 unsigned usage)
346 {
347 unsigned retval = 0;
348
349 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
350 (sample_count > 1) || /* TODO add MSAA */
351 !util_format_is_supported(format, usage)) {
352 DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x",
353 util_format_name(format), target, sample_count, usage);
354 return FALSE;
355 }
356
357 /* TODO figure out how to render to other formats.. */
358 if ((usage & PIPE_BIND_RENDER_TARGET) &&
359 ((format != PIPE_FORMAT_B8G8R8A8_UNORM) &&
360 (format != PIPE_FORMAT_B8G8R8X8_UNORM))) {
361 DBG("not supported render target: format=%s, target=%d, sample_count=%d, usage=%x",
362 util_format_name(format), target, sample_count, usage);
363 return FALSE;
364 }
365
366 if ((usage & (PIPE_BIND_SAMPLER_VIEW |
367 PIPE_BIND_VERTEX_BUFFER)) &&
368 (fd_pipe2surface(format) != FMT_INVALID)) {
369 retval |= usage & (PIPE_BIND_SAMPLER_VIEW |
370 PIPE_BIND_VERTEX_BUFFER);
371 }
372
373 if ((usage & (PIPE_BIND_RENDER_TARGET |
374 PIPE_BIND_DISPLAY_TARGET |
375 PIPE_BIND_SCANOUT |
376 PIPE_BIND_SHARED)) &&
377 (fd_pipe2color(format) != COLORX_INVALID)) {
378 retval |= usage & (PIPE_BIND_RENDER_TARGET |
379 PIPE_BIND_DISPLAY_TARGET |
380 PIPE_BIND_SCANOUT |
381 PIPE_BIND_SHARED);
382 }
383
384 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
385 (fd_pipe2depth(format) != DEPTHX_INVALID)) {
386 retval |= PIPE_BIND_DEPTH_STENCIL;
387 }
388
389 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
390 (fd_pipe2index(format) != INDEX_SIZE_INVALID)) {
391 retval |= PIPE_BIND_INDEX_BUFFER;
392 }
393
394 if (usage & PIPE_BIND_TRANSFER_READ)
395 retval |= PIPE_BIND_TRANSFER_READ;
396 if (usage & PIPE_BIND_TRANSFER_WRITE)
397 retval |= PIPE_BIND_TRANSFER_WRITE;
398
399 if (retval != usage) {
400 DBG("not supported: format=%s, target=%d, sample_count=%d, "
401 "usage=%x, retval=%x", util_format_name(format),
402 target, sample_count, usage, retval);
403 }
404
405 return retval == usage;
406 }
407
408 boolean
409 fd_screen_bo_get_handle(struct pipe_screen *pscreen,
410 struct fd_bo *bo,
411 unsigned stride,
412 struct winsys_handle *whandle)
413 {
414 whandle->stride = stride;
415
416 if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
417 return fd_bo_get_name(bo, &whandle->handle) == 0;
418 } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
419 whandle->handle = fd_bo_handle(bo);
420 return TRUE;
421 } else {
422 return FALSE;
423 }
424 }
425
426 struct fd_bo *
427 fd_screen_bo_from_handle(struct pipe_screen *pscreen,
428 struct winsys_handle *whandle,
429 unsigned *out_stride)
430 {
431 struct fd_screen *screen = fd_screen(pscreen);
432 struct fd_bo *bo;
433
434 bo = fd_bo_from_name(screen->dev, whandle->handle);
435 if (!bo) {
436 DBG("ref name 0x%08x failed", whandle->handle);
437 return NULL;
438 }
439
440 *out_stride = whandle->stride;
441
442 return bo;
443 }
444
445 struct pipe_screen *
446 fd_screen_create(struct fd_device *dev)
447 {
448 struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
449 struct pipe_screen *pscreen;
450 uint64_t val;
451
452 fd_mesa_debug = debug_get_option_fd_mesa_debug();
453
454 if (!screen)
455 return NULL;
456
457 pscreen = &screen->base;
458
459 screen->dev = dev;
460
461 // maybe this should be in context?
462 screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
463 if (!screen->pipe) {
464 DBG("could not create 3d pipe");
465 goto fail;
466 }
467
468 if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
469 DBG("could not get GMEM size");
470 goto fail;
471 }
472 screen->gmemsize_bytes = val;
473
474 if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
475 DBG("could not get device-id");
476 goto fail;
477 }
478 screen->device_id = val;
479
480
481 pscreen->destroy = fd_screen_destroy;
482 pscreen->get_param = fd_screen_get_param;
483 pscreen->get_paramf = fd_screen_get_paramf;
484 pscreen->get_shader_param = fd_screen_get_shader_param;
485 pscreen->context_create = fd_context_create;
486 pscreen->is_format_supported = fd_screen_is_format_supported;
487
488 fd_resource_screen_init(pscreen);
489
490 pscreen->get_name = fd_screen_get_name;
491 pscreen->get_vendor = fd_screen_get_vendor;
492
493 pscreen->get_timestamp = fd_screen_get_timestamp;
494
495 pscreen->fence_reference = fd_screen_fence_ref;
496 pscreen->fence_signalled = fd_screen_fence_signalled;
497 pscreen->fence_finish = fd_screen_fence_finish;
498
499 util_format_s3tc_init();
500
501 return pscreen;
502
503 fail:
504 fd_screen_destroy(pscreen);
505 return NULL;
506 }