src/gallium/drivers/freedreno/freedreno_screen.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29
  30 #include "pipe/p_defines.h"
  31 #include "pipe/p_screen.h"
  32 #include "pipe/p_state.h"
  33
  34 #include "util/u_memory.h"
  35 #include "util/u_inlines.h"
  36 #include "util/u_format.h"
  37 #include "util/u_format_s3tc.h"
  38 #include "util/u_string.h"
  39 #include "util/u_debug.h"
  40
  41 #include "os/os_time.h"
  42
  43 #include <stdio.h>
  44 #include <errno.h>
  45 #include <stdlib.h>
  46
  47 #include "freedreno_context.h"
  48 #include "freedreno_screen.h"
  49 #include "freedreno_resource.h"
  50 #include "freedreno_fence.h"
  51 #include "freedreno_util.h"
  52
  53 /* XXX this should go away */
  54 #include "state_tracker/drm_driver.h"
  55
  56 static const struct debug_named_value debug_options[] = {
  57                 {"msgs",      FD_DBG_MSGS,   "Print debug messages"},
  58                 {"disasm",    FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"},
  59                 DEBUG_NAMED_VALUE_END
  60 };
  61
  62 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
  63
  64 int fd_mesa_debug = 0;
  65
  66 static const char *
  67 fd_screen_get_name(struct pipe_screen *pscreen)
  68 {
  69         static char buffer[128];
  70         util_snprintf(buffer, sizeof(buffer), "FD%03d",
  71                         fd_screen(pscreen)->device_id);
  72         return buffer;
  73 }
  74
  75 static const char *
  76 fd_screen_get_vendor(struct pipe_screen *pscreen)
  77 {
  78         return "freedreno";
  79 }
  80
  81 static uint64_t
  82 fd_screen_get_timestamp(struct pipe_screen *pscreen)
  83 {
  84         int64_t cpu_time = os_time_get() * 1000;
  85         return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta;
  86 }
  87
  88 static void
  89 fd_screen_fence_ref(struct pipe_screen *pscreen,
  90                 struct pipe_fence_handle **ptr,
  91                 struct pipe_fence_handle *pfence)
  92 {
  93         fd_fence_ref(fd_fence(pfence), (struct fd_fence **)ptr);
  94 }
  95
  96 static boolean
  97 fd_screen_fence_signalled(struct pipe_screen *screen,
  98                 struct pipe_fence_handle *pfence)
  99 {
 100         return fd_fence_signalled(fd_fence(pfence));
 101 }
 102
 103 static boolean
 104 fd_screen_fence_finish(struct pipe_screen *screen,
 105                 struct pipe_fence_handle *pfence,
 106                 uint64_t timeout)
 107 {
 108         return fd_fence_wait(fd_fence(pfence));
 109 }
 110
 111 static void
 112 fd_screen_destroy(struct pipe_screen *pscreen)
 113 {
 114         struct fd_screen *screen = fd_screen(pscreen);
 115
 116         if (screen->pipe)
 117                 fd_pipe_del(screen->pipe);
 118
 119         if (screen->dev)
 120                 fd_device_del(screen->dev);
 121
 122         free(screen);
 123 }
 124
 125 /*
 126 EGL Version 1.4
 127 EGL Vendor Qualcomm, Inc
 128 EGL Extensions EGL_QUALCOMM_shared_image EGL_KHR_image EGL_AMD_create_image EGL_KHR_lock_surface EGL_KHR_lock_surface2 EGL_KHR_fence_sync EGL_IMG_context_priorityEGL_ANDROID_image_native_buffer
 129 GL extensions: GL_AMD_compressed_ATC_texture GL_AMD_performance_monitor GL_AMD_program_binary_Z400 GL_EXT_texture_filter_anisotropic GL_EXT_texture_format_BGRA8888 GL_EXT_texture_type_2_10_10_10_REV GL_NV_fence GL_OES_compressed_ETC1_RGB8_texture GL_OES_depth_texture GL_OES_depth24 GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_element_index_uint GL_OES_fbo_render_mipmap GL_OES_fragment_precision_high GL_OES_get_program_binary GL_OES_packed_depth_stencil GL_OES_rgb8_rgba8 GL_OES_standard_derivatives GL_OES_texture_3D GL_OES_texture_float GL_OES_texture_half_float GL_OES_texture_half_float_linear GL_OES_texture_npot GL_OES_vertex_half_float GL_OES_vertex_type_10_10_10_2 GL_QCOM_alpha_test GL_QCOM_binning_control GL_QCOM_driver_control GL_QCOM_perfmon_global_mode GL_QCOM_extended_get GL_QCOM_extended_get2 GL_QCOM_tiled_rendering GL_QCOM_writeonly_rendering GL_AMD_compressed_3DC_texture
 130 GL_MAX_3D_TEXTURE_SIZE_OES: 1024 0 0 0
 131 no GL_MAX_SAMPLES_ANGLE: GL_INVALID_ENUM
 132 no GL_MAX_SAMPLES_APPLE: GL_INVALID_ENUM
 133 GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT: 16 0 0 0
 134 no GL_MAX_SAMPLES_IMG: GL_INVALID_ENUM
 135 GL_MAX_TEXTURE_SIZE: 4096 0 0 0
 136 GL_MAX_VIEWPORT_DIMS: 4096 4096 0 0
 137 GL_MAX_VERTEX_ATTRIBS: 16 0 0 0
 138 GL_MAX_VERTEX_UNIFORM_VECTORS: 251 0 0 0
 139 GL_MAX_VARYING_VECTORS: 8 0 0 0
 140 GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS: 20 0 0 0
 141 GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS: 4 0 0 0
 142 GL_MAX_TEXTURE_IMAGE_UNITS: 16 0 0 0
 143 GL_MAX_FRAGMENT_UNIFORM_VECTORS: 221 0 0 0
 144 GL_MAX_CUBE_MAP_TEXTURE_SIZE: 4096 0 0 0
 145 GL_MAX_RENDERBUFFER_SIZE: 4096 0 0 0
 146 no GL_TEXTURE_NUM_LEVELS_QCOM: GL_INVALID_ENUM
 147  */
 148 static int
 149 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 150 {
 151         /* this is probably not totally correct.. but it's a start: */
 152         switch (param) {
 153         /* Supported features (boolean caps). */
 154         case PIPE_CAP_NPOT_TEXTURES:
 155         case PIPE_CAP_TWO_SIDED_STENCIL:
 156         case PIPE_CAP_ANISOTROPIC_FILTER:
 157         case PIPE_CAP_POINT_SPRITE:
 158         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 159         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 160         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 161         case PIPE_CAP_TEXTURE_SWIZZLE:
 162         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 163         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 164         case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 165         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 166         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 167         case PIPE_CAP_SM3:
 168         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 169         case PIPE_CAP_PRIMITIVE_RESTART:
 170         case PIPE_CAP_CONDITIONAL_RENDER:
 171         case PIPE_CAP_TEXTURE_BARRIER:
 172         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 173         case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 174         case PIPE_CAP_TGSI_INSTANCEID:
 175         case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 176         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 177         case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 178         case PIPE_CAP_COMPUTE:
 179         case PIPE_CAP_START_INSTANCE:
 180         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 181         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 182         case PIPE_CAP_USER_CONSTANT_BUFFERS:
 183                 return 1;
 184
 185         case PIPE_CAP_TGSI_TEXCOORD:
 186         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 187                 return 0;
 188
 189         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 190                 return 256;
 191
 192         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 193                 return 120;
 194
 195         /* Unsupported features. */
 196         case PIPE_CAP_INDEP_BLEND_ENABLE:
 197         case PIPE_CAP_INDEP_BLEND_FUNC:
 198         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 199         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 200         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 201         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 202         case PIPE_CAP_SCALED_RESOLVE:
 203         case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
 204         case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 205         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 206         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 207         case PIPE_CAP_USER_VERTEX_BUFFERS:
 208         case PIPE_CAP_USER_INDEX_BUFFERS:
 209         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 210         case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 211                 return 0;
 212
 213         /* Stream output. */
 214         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 215         case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 216         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 217         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 218                 return 0;
 219
 220         /* Texturing. */
 221         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 222         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 223         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 224                 return 14;
 225         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 226                 return 9192;
 227         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 228                 return 20;
 229
 230         /* Render targets. */
 231         case PIPE_CAP_MAX_RENDER_TARGETS:
 232                 return 1;
 233
 234         /* Timer queries. */
 235         case PIPE_CAP_QUERY_TIME_ELAPSED:
 236         case PIPE_CAP_OCCLUSION_QUERY:
 237         case PIPE_CAP_QUERY_TIMESTAMP:
 238                 return 0;
 239
 240         case PIPE_CAP_MIN_TEXEL_OFFSET:
 241                 return -8;
 242
 243         case PIPE_CAP_MAX_TEXEL_OFFSET:
 244                 return 7;
 245
 246         default:
 247                 DBG("unknown param %d", param);
 248                 return 0;
 249         }
 250 }
 251
 252 static float
 253 fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 254 {
 255         switch (param) {
 256         case PIPE_CAPF_MAX_LINE_WIDTH:
 257         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 258         case PIPE_CAPF_MAX_POINT_WIDTH:
 259         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 260                 return 8192.0f;
 261         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 262                 return 16.0f;
 263         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 264                 return 16.0f;
 265         case PIPE_CAPF_GUARD_BAND_LEFT:
 266         case PIPE_CAPF_GUARD_BAND_TOP:
 267         case PIPE_CAPF_GUARD_BAND_RIGHT:
 268         case PIPE_CAPF_GUARD_BAND_BOTTOM:
 269                 return 0.0f;
 270         default:
 271                 DBG("unknown paramf %d", param);
 272                 return 0;
 273         }
 274 }
 275
 276 static int
 277 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
 278                 enum pipe_shader_cap param)
 279 {
 280         switch(shader)
 281         {
 282         case PIPE_SHADER_FRAGMENT:
 283         case PIPE_SHADER_VERTEX:
 284                 break;
 285         case PIPE_SHADER_COMPUTE:
 286         case PIPE_SHADER_GEOMETRY:
 287                 /* maye we could emulate.. */
 288                 return 0;
 289         default:
 290                 DBG("unknown shader type %d", shader);
 291                 return 0;
 292         }
 293
 294         /* this is probably not totally correct.. but it's a start: */
 295         switch (param) {
 296         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 297         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 298         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 299         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 300                 return 16384;
 301         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 302                 return 8; /* XXX */
 303         case PIPE_SHADER_CAP_MAX_INPUTS:
 304                 return 32;
 305         case PIPE_SHADER_CAP_MAX_TEMPS:
 306                 return 256; /* Max native temporaries. */
 307         case PIPE_SHADER_CAP_MAX_ADDRS:
 308                 /* XXX Isn't this equal to TEMPS? */
 309                 return 1; /* Max native address registers */
 310         case PIPE_SHADER_CAP_MAX_CONSTS:
 311         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 312                 return 64;
 313         case PIPE_SHADER_CAP_MAX_PREDS:
 314                 return 0; /* nothing uses this */
 315         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 316                 return 1;
 317         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 318         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 319         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 320         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 321                 return 1;
 322         case PIPE_SHADER_CAP_SUBROUTINES:
 323                 return 0;
 324         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 325         case PIPE_SHADER_CAP_INTEGERS:
 326                 return 0;
 327         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 328                 return 16;
 329         case PIPE_SHADER_CAP_PREFERRED_IR:
 330                 return PIPE_SHADER_IR_TGSI;
 331         default:
 332                 DBG("unknown shader param %d", param);
 333                 return 0;
 334         }
 335         return 0;
 336 }
 337
 338 static boolean
 339 fd_screen_is_format_supported(struct pipe_screen *pscreen,
 340                 enum pipe_format format,
 341                 enum pipe_texture_target target,
 342                 unsigned sample_count,
 343                 unsigned usage)
 344 {
 345         unsigned retval = 0;
 346
 347         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
 348                         (sample_count > 1) || /* TODO add MSAA */
 349                         !util_format_is_supported(format, usage)) {
 350                 DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x",
 351                                 util_format_name(format), target, sample_count, usage);
 352                 return FALSE;
 353         }
 354
 355         /* TODO figure out how to render to other formats.. */
 356         if ((usage & PIPE_BIND_RENDER_TARGET) &&
 357                         ((format != PIPE_FORMAT_B8G8R8A8_UNORM) &&
 358                          (format != PIPE_FORMAT_B8G8R8X8_UNORM))) {
 359                 DBG("not supported render target: format=%s, target=%d, sample_count=%d, usage=%x",
 360                                 util_format_name(format), target, sample_count, usage);
 361                 return FALSE;
 362         }
 363
 364         if ((usage & (PIPE_BIND_SAMPLER_VIEW |
 365                                 PIPE_BIND_VERTEX_BUFFER)) &&
 366                         (fd_pipe2surface(format) != FMT_INVALID)) {
 367                 retval |= usage & (PIPE_BIND_SAMPLER_VIEW |
 368                                 PIPE_BIND_VERTEX_BUFFER);
 369         }
 370
 371         if ((usage & (PIPE_BIND_RENDER_TARGET |
 372                                 PIPE_BIND_DISPLAY_TARGET |
 373                                 PIPE_BIND_SCANOUT |
 374                                 PIPE_BIND_SHARED)) &&
 375                         (fd_pipe2color(format) != COLORX_INVALID)) {
 376                 retval |= usage & (PIPE_BIND_RENDER_TARGET |
 377                                 PIPE_BIND_DISPLAY_TARGET |
 378                                 PIPE_BIND_SCANOUT |
 379                                 PIPE_BIND_SHARED);
 380         }
 381
 382         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 383                         (fd_pipe2depth(format) != DEPTHX_INVALID)) {
 384                 retval |= PIPE_BIND_DEPTH_STENCIL;
 385         }
 386
 387         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 388                         (fd_pipe2index(format) != INDEX_SIZE_INVALID)) {
 389                 retval |= PIPE_BIND_INDEX_BUFFER;
 390         }
 391
 392         if (usage & PIPE_BIND_TRANSFER_READ)
 393                 retval |= PIPE_BIND_TRANSFER_READ;
 394         if (usage & PIPE_BIND_TRANSFER_WRITE)
 395                 retval |= PIPE_BIND_TRANSFER_WRITE;
 396
 397         if (retval != usage) {
 398                 DBG("not supported: format=%s, target=%d, sample_count=%d, "
 399                                 "usage=%x, retval=%x", util_format_name(format),
 400                                 target, sample_count, usage, retval);
 401         }
 402
 403         return retval == usage;
 404 }
 405
 406 boolean
 407 fd_screen_bo_get_handle(struct pipe_screen *pscreen,
 408                 struct fd_bo *bo,
 409                 unsigned stride,
 410                 struct winsys_handle *whandle)
 411 {
 412         whandle->stride = stride;
 413
 414         if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
 415                 return fd_bo_get_name(bo, &whandle->handle) == 0;
 416         } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
 417                 whandle->handle = fd_bo_handle(bo);
 418                 return TRUE;
 419         } else {
 420                 return FALSE;
 421         }
 422 }
 423
 424 struct fd_bo *
 425 fd_screen_bo_from_handle(struct pipe_screen *pscreen,
 426                 struct winsys_handle *whandle,
 427                 unsigned *out_stride)
 428 {
 429         struct fd_screen *screen = fd_screen(pscreen);
 430         struct fd_bo *bo;
 431
 432         bo = fd_bo_from_name(screen->dev, whandle->handle);
 433         if (!bo) {
 434                 DBG("ref name 0x%08x failed", whandle->handle);
 435                 return NULL;
 436         }
 437
 438         *out_stride = whandle->stride;
 439
 440         return bo;
 441 }
 442
 443 struct pipe_screen *
 444 fd_screen_create(struct fd_device *dev)
 445 {
 446         struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
 447         struct pipe_screen *pscreen;
 448         uint64_t val;
 449
 450         fd_mesa_debug = debug_get_option_fd_mesa_debug();
 451
 452         if (!screen)
 453                 return NULL;
 454
 455         pscreen = &screen->base;
 456
 457         screen->dev = dev;
 458
 459         // maybe this should be in context?
 460         screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
 461         if (!screen->pipe) {
 462                 DBG("could not create 3d pipe");
 463                 goto fail;
 464         }
 465
 466         if (fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val)) {
 467                 DBG("could not get GMEM size");
 468                 goto fail;
 469         }
 470         screen->gmemsize_bytes = val;
 471
 472         if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
 473                 DBG("could not get device-id");
 474                 goto fail;
 475         }
 476         screen->device_id = val;
 477
 478
 479         pscreen->destroy = fd_screen_destroy;
 480         pscreen->get_param = fd_screen_get_param;
 481         pscreen->get_paramf = fd_screen_get_paramf;
 482         pscreen->get_shader_param = fd_screen_get_shader_param;
 483         pscreen->context_create = fd_context_create;
 484         pscreen->is_format_supported = fd_screen_is_format_supported;
 485
 486         fd_resource_screen_init(pscreen);
 487
 488         pscreen->get_name = fd_screen_get_name;
 489         pscreen->get_vendor = fd_screen_get_vendor;
 490
 491         pscreen->get_timestamp = fd_screen_get_timestamp;
 492
 493         pscreen->fence_reference = fd_screen_fence_ref;
 494         pscreen->fence_signalled = fd_screen_fence_signalled;
 495         pscreen->fence_finish = fd_screen_fence_finish;
 496
 497         util_format_s3tc_init();
 498
 499         return pscreen;
 500
 501 fail:
 502         fd_screen_destroy(pscreen);
 503         return NULL;
 504 }