android: freedreno: move a2xx disasm out of gallium
[mesa.git] / src / gallium / drivers / freedreno / freedreno_screen.h
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FREEDRENO_SCREEN_H_
28 #define FREEDRENO_SCREEN_H_
29
30 #include "drm/freedreno_drmif.h"
31 #include "drm/freedreno_ringbuffer.h"
32 #include "perfcntrs/freedreno_perfcntr.h"
33
34 #include "pipe/p_screen.h"
35 #include "util/u_memory.h"
36 #include "util/slab.h"
37 #include "util/simple_mtx.h"
38 #include "renderonly/renderonly.h"
39
40 #include "freedreno_batch_cache.h"
41 #include "freedreno_gmem.h"
42 #include "freedreno_util.h"
43
44 struct fd_bo;
45
46 struct fd_screen {
47 struct pipe_screen base;
48
49 struct list_head context_list;
50
51 simple_mtx_t lock;
52
53 /* it would be tempting to use pipe_reference here, but that
54 * really doesn't work well if it isn't the first member of
55 * the struct, so not quite so awesome to be adding refcnting
56 * further down the inheritance hierarchy:
57 */
58 int refcnt;
59
60 /* place for winsys to stash it's own stuff: */
61 void *winsys_priv;
62
63 struct slab_parent_pool transfer_pool;
64
65 uint64_t gmem_base;
66 uint32_t gmemsize_bytes;
67 uint32_t device_id;
68 uint32_t gpu_id; /* 220, 305, etc */
69 uint32_t chip_id; /* coreid:8 majorrev:8 minorrev:8 patch:8 */
70 uint32_t max_freq;
71 uint32_t ram_size;
72 uint32_t max_rts; /* max # of render targets */
73 uint32_t gmem_alignw, gmem_alignh; /* gmem load/store granularity */
74 uint32_t tile_alignw, tile_alignh; /* alignment for tile sizes */
75 uint32_t num_vsc_pipes;
76 uint32_t priority_mask;
77 bool has_timestamp;
78 bool has_robustness;
79
80 unsigned num_perfcntr_groups;
81 const struct fd_perfcntr_group *perfcntr_groups;
82
83 /* generated at startup from the perfcntr groups: */
84 unsigned num_perfcntr_queries;
85 struct pipe_driver_query_info *perfcntr_queries;
86
87 void *compiler; /* currently unused for a2xx */
88
89 struct fd_device *dev;
90
91 /* NOTE: we still need a pipe associated with the screen in a few
92 * places, like screen->get_timestamp(). For anything context
93 * related, use ctx->pipe instead.
94 */
95 struct fd_pipe *pipe;
96
97 uint32_t (*setup_slices)(struct fd_resource *rsc);
98 unsigned (*tile_mode)(const struct pipe_resource *prsc);
99 int (*layout_resource_for_modifier)(struct fd_resource *rsc, uint64_t modifier);
100
101 /* indirect-branch emit: */
102 void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringbuffer *target);
103
104 /* simple gpu "memcpy": */
105 void (*mem_to_mem)(struct fd_ringbuffer *ring, struct pipe_resource *dst,
106 unsigned dst_off, struct pipe_resource *src, unsigned src_off,
107 unsigned sizedwords);
108
109 int64_t cpu_gpu_time_delta;
110
111 struct fd_batch_cache batch_cache;
112 struct fd_gmem_cache gmem_cache;
113
114 bool reorder;
115
116 uint16_t rsc_seqno;
117
118 unsigned num_supported_modifiers;
119 const uint64_t *supported_modifiers;
120
121 struct renderonly *ro;
122
123 /* when BATCH_DEBUG is enabled, tracking for fd_batch's which are not yet
124 * freed:
125 */
126 struct set *live_batches;
127 };
128
129 static inline struct fd_screen *
130 fd_screen(struct pipe_screen *pscreen)
131 {
132 return (struct fd_screen *)pscreen;
133 }
134
135 static inline void
136 fd_screen_lock(struct fd_screen *screen)
137 {
138 simple_mtx_lock(&screen->lock);
139 }
140
141 static inline void
142 fd_screen_unlock(struct fd_screen *screen)
143 {
144 simple_mtx_unlock(&screen->lock);
145 }
146
147 static inline void
148 fd_screen_assert_locked(struct fd_screen *screen)
149 {
150 simple_mtx_assert_locked(&screen->lock);
151 }
152
153 bool fd_screen_bo_get_handle(struct pipe_screen *pscreen,
154 struct fd_bo *bo,
155 struct renderonly_scanout *scanout,
156 unsigned stride,
157 struct winsys_handle *whandle);
158 struct fd_bo * fd_screen_bo_from_handle(struct pipe_screen *pscreen,
159 struct winsys_handle *whandle);
160
161 struct pipe_screen *
162 fd_screen_create(struct fd_device *dev, struct renderonly *ro);
163
164 static inline boolean
165 is_a20x(struct fd_screen *screen)
166 {
167 return (screen->gpu_id >= 200) && (screen->gpu_id < 210);
168 }
169
170 static inline boolean
171 is_a2xx(struct fd_screen *screen)
172 {
173 return (screen->gpu_id >= 200) && (screen->gpu_id < 300);
174 }
175
176 /* is a3xx patch revision 0? */
177 /* TODO a306.0 probably doesn't need this.. be more clever?? */
178 static inline boolean
179 is_a3xx_p0(struct fd_screen *screen)
180 {
181 return (screen->chip_id & 0xff0000ff) == 0x03000000;
182 }
183
184 static inline boolean
185 is_a3xx(struct fd_screen *screen)
186 {
187 return (screen->gpu_id >= 300) && (screen->gpu_id < 400);
188 }
189
190 static inline boolean
191 is_a4xx(struct fd_screen *screen)
192 {
193 return (screen->gpu_id >= 400) && (screen->gpu_id < 500);
194 }
195
196 static inline boolean
197 is_a5xx(struct fd_screen *screen)
198 {
199 return (screen->gpu_id >= 500) && (screen->gpu_id < 600);
200 }
201
202 static inline boolean
203 is_a6xx(struct fd_screen *screen)
204 {
205 return (screen->gpu_id >= 600) && (screen->gpu_id < 700);
206 }
207
208 static inline boolean
209 is_a650(struct fd_screen *screen)
210 {
211 return screen->gpu_id == 650;
212 }
213
214 /* is it using the ir3 compiler (shader isa introduced with a3xx)? */
215 static inline boolean
216 is_ir3(struct fd_screen *screen)
217 {
218 return is_a3xx(screen) || is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen);
219 }
220
221 static inline bool
222 has_compute(struct fd_screen *screen)
223 {
224 return is_a5xx(screen) || is_a6xx(screen);
225 }
226
227 #endif /* FREEDRENO_SCREEN_H_ */