src/gallium/drivers/freedreno/freedreno_util.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_UTIL_H_
  30 #define FREEDRENO_UTIL_H_
  31
  32 #include <freedreno_drmif.h>
  33 #include <freedreno_ringbuffer.h>
  34
  35 #include "pipe/p_format.h"
  36 #include "pipe/p_state.h"
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_half.h"
  40 #include "util/u_dynarray.h"
  41 #include "util/u_pack_color.h"
  42
  43 #include "disasm.h"
  44 #include "adreno_common.xml.h"
  45 #include "adreno_pm4.xml.h"
  46
  47 enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format);
  48 enum pc_di_index_size fd_pipe2index(enum pipe_format format);
  49 enum adreno_rb_blend_factor fd_blend_factor(unsigned factor);
  50 enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
  51 enum adreno_stencil_op fd_stencil_op(unsigned op);
  52
  53 #define A3XX_MAX_MIP_LEVELS 14
  54 /* TBD if it is same on a2xx, but for now: */
  55 #define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
  56
  57 #define A2XX_MAX_RENDER_TARGETS 1
  58 #define A3XX_MAX_RENDER_TARGETS 4
  59 #define A4XX_MAX_RENDER_TARGETS 8
  60
  61 #define MAX_RENDER_TARGETS A4XX_MAX_RENDER_TARGETS
  62
  63 #define FD_DBG_MSGS     0x0001
  64 #define FD_DBG_DISASM   0x0002
  65 #define FD_DBG_DCLEAR   0x0004
  66 #define FD_DBG_DDRAW    0x0008
  67 #define FD_DBG_NOSCIS   0x0010
  68 #define FD_DBG_DIRECT   0x0020
  69 #define FD_DBG_NOBYPASS 0x0040
  70 #define FD_DBG_FRAGHALF 0x0080
  71 #define FD_DBG_NOBIN    0x0100
  72 #define FD_DBG_OPTMSGS  0x0200
  73 #define FD_DBG_GLSL120  0x0400
  74 #define FD_DBG_SHADERDB 0x0800
  75 #define FD_DBG_FLUSH    0x1000
  76
  77 extern int fd_mesa_debug;
  78 extern bool fd_binning_enabled;
  79
  80 #define DBG(fmt, ...) \
  81                 do { if (fd_mesa_debug & FD_DBG_MSGS) \
  82                         debug_printf("%s:%d: "fmt "\n", \
  83                                 __FUNCTION__, __LINE__, ##__VA_ARGS__); } while (0)
  84
  85 /* for conditionally setting boolean flag(s): */
  86 #define COND(bool, val) ((bool) ? (val) : 0)
  87
  88 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000))))
  89
  90 static inline uint32_t DRAW(enum pc_di_primtype prim_type,
  91                 enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
  92                 enum pc_di_vis_cull_mode vis_cull_mode,
  93                 uint8_t instances)
  94 {
  95         return (prim_type         << 0) |
  96                         (source_select     << 6) |
  97                         ((index_size & 1)  << 11) |
  98                         ((index_size >> 1) << 13) |
  99                         (vis_cull_mode     << 9) |
 100                         (1                 << 14) |
 101                         (instances         << 24);
 102 }
 103
 104 /* for tracking cmdstream positions that need to be patched: */
 105 struct fd_cs_patch {
 106         uint32_t *cs;
 107         uint32_t val;
 108 };
 109 #define fd_patch_num_elements(buf) ((buf)->size / sizeof(struct fd_cs_patch))
 110 #define fd_patch_element(buf, i)   util_dynarray_element(buf, struct fd_cs_patch, i)
 111
 112 static inline enum pipe_format
 113 pipe_surface_format(struct pipe_surface *psurf)
 114 {
 115         if (!psurf)
 116                 return PIPE_FORMAT_NONE;
 117         return psurf->format;
 118 }
 119
 120 static inline bool
 121 fd_surface_half_precision(const struct pipe_surface *psurf)
 122 {
 123         enum pipe_format format;
 124
 125         if (!psurf)
 126                 return true;
 127
 128         format = psurf->format;
 129
 130         /* colors are provided in consts, which go through cov.f32f16, which will
 131          * break these values
 132          */
 133         if (util_format_is_pure_integer(format))
 134                 return false;
 135
 136         /* avoid losing precision on 32-bit float formats */
 137         if (util_format_is_float(format) &&
 138                 util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0) == 32)
 139                 return false;
 140
 141         return true;
 142 }
 143
 144 static inline unsigned
 145 fd_sampler_first_level(const struct pipe_sampler_view *view)
 146 {
 147         if (view->target == PIPE_BUFFER)
 148                 return 0;
 149         return view->u.tex.first_level;
 150 }
 151
 152 static inline unsigned
 153 fd_sampler_last_level(const struct pipe_sampler_view *view)
 154 {
 155         if (view->target == PIPE_BUFFER)
 156                 return 0;
 157         return view->u.tex.last_level;
 158 }
 159
 160 static inline bool
 161 fd_half_precision(struct pipe_framebuffer_state *pfb)
 162 {
 163         unsigned i;
 164
 165         for (i = 0; i < pfb->nr_cbufs; i++)
 166                 if (!fd_surface_half_precision(pfb->cbufs[i]))
 167                         return false;
 168
 169         return true;
 170 }
 171
 172 #define LOG_DWORDS 0
 173
 174 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
 175
 176 static inline void
 177 OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
 178 {
 179         if (LOG_DWORDS) {
 180                 DBG("ring[%p]: OUT_RING   %04x:  %08x", ring,
 181                                 (uint32_t)(ring->cur - ring->last_start), data);
 182         }
 183         *(ring->cur++) = data;
 184 }
 185
 186 /* like OUT_RING() but appends a cmdstream patch point to 'buf' */
 187 static inline void
 188 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data,
 189                 struct util_dynarray *buf)
 190 {
 191         if (LOG_DWORDS) {
 192                 DBG("ring[%p]: OUT_RINGP  %04x:  %08x", ring,
 193                                 (uint32_t)(ring->cur - ring->last_start), data);
 194         }
 195         util_dynarray_append(buf, struct fd_cs_patch, ((struct fd_cs_patch){
 196                 .cs  = ring->cur++,
 197                 .val = data,
 198         }));
 199 }
 200
 201 static inline void
 202 OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
 203                 uint32_t offset, uint32_t or, int32_t shift)
 204 {
 205         if (LOG_DWORDS) {
 206                 DBG("ring[%p]: OUT_RELOC   %04x:  %p+%u << %d", ring,
 207                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 208         }
 209         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 210                 .bo = bo,
 211                 .flags = FD_RELOC_READ,
 212                 .offset = offset,
 213                 .or = or,
 214                 .shift = shift,
 215         });
 216 }
 217
 218 static inline void
 219 OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo,
 220                 uint32_t offset, uint32_t or, int32_t shift)
 221 {
 222         if (LOG_DWORDS) {
 223                 DBG("ring[%p]: OUT_RELOCW  %04x:  %p+%u << %d", ring,
 224                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 225         }
 226         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 227                 .bo = bo,
 228                 .flags = FD_RELOC_READ | FD_RELOC_WRITE,
 229                 .offset = offset,
 230                 .or = or,
 231                 .shift = shift,
 232         });
 233 }
 234
 235 static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
 236 {
 237         if ((ring->cur + ndwords) >= ring->end) {
 238                 /* this probably won't really work if we have multiple tiles..
 239                  * but it is ok for 2d..  we might need different behavior
 240                  * depending on 2d or 3d pipe.
 241                  */
 242                 DBG("uh oh..");
 243         }
 244 }
 245
 246 static inline void
 247 OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
 248 {
 249         BEGIN_RING(ring, cnt+1);
 250         OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
 251 }
 252
 253 static inline void
 254 OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
 255 {
 256         BEGIN_RING(ring, cnt+1);
 257         OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
 258 }
 259
 260 static inline void
 261 OUT_WFI(struct fd_ringbuffer *ring)
 262 {
 263         OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
 264         OUT_RING(ring, 0x00000000);
 265 }
 266
 267 static inline void
 268 OUT_IB(struct fd_ringbuffer *ring, struct fd_ringmarker *start,
 269                 struct fd_ringmarker *end)
 270 {
 271         uint32_t dwords = fd_ringmarker_dwords(start, end);
 272
 273         assert(dwords > 0);
 274
 275         /* for debug after a lock up, write a unique counter value
 276          * to scratch6 for each IB, to make it easier to match up
 277          * register dumps to cmdstream.  The combination of IB and
 278          * DRAW (scratch7) is enough to "triangulate" the particular
 279          * draw that caused lockup.
 280          */
 281         emit_marker(ring, 6);
 282
 283         OUT_PKT3(ring, CP_INDIRECT_BUFFER_PFD, 2);
 284         fd_ringbuffer_emit_reloc_ring(ring, start, end);
 285         OUT_RING(ring, dwords);
 286
 287         emit_marker(ring, 6);
 288 }
 289
 290 /* CP_SCRATCH_REG4 is used to hold base address for query results: */
 291 #define HW_QUERY_BASE_REG REG_AXXX_CP_SCRATCH_REG4
 292
 293 static inline void
 294 emit_marker(struct fd_ringbuffer *ring, int scratch_idx)
 295 {
 296         extern unsigned marker_cnt;
 297         unsigned reg = REG_AXXX_CP_SCRATCH_REG0 + scratch_idx;
 298         assert(reg != HW_QUERY_BASE_REG);
 299         if (reg == HW_QUERY_BASE_REG)
 300                 return;
 301         OUT_PKT0(ring, reg, 1);
 302         OUT_RING(ring, ++marker_cnt);
 303 }
 304
 305 /* helper to get numeric value from environment variable..  mostly
 306  * just leaving this here because it is helpful to brute-force figure
 307  * out unknown formats, etc, which blob driver does not support:
 308  */
 309 static inline uint32_t env2u(const char *envvar)
 310 {
 311         char *str = getenv(envvar);
 312         if (str)
 313                 return strtoul(str, NULL, 0);
 314         return 0;
 315 }
 316
 317 static inline uint32_t
 318 pack_rgba(enum pipe_format format, const float *rgba)
 319 {
 320         union util_color uc;
 321         util_pack_color(rgba, format, &uc);
 322         return uc.ui[0];
 323 }
 324
 325 #endif /* FREEDRENO_UTIL_H_ */