freedreno/a3xx: format fixes
[mesa.git] / src / gallium / drivers / freedreno / freedreno_util.h
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #ifndef FREEDRENO_UTIL_H_
30 #define FREEDRENO_UTIL_H_
31
32 #include <freedreno_drmif.h>
33 #include <freedreno_ringbuffer.h>
34
35 #include "pipe/p_format.h"
36 #include "pipe/p_state.h"
37 #include "util/u_debug.h"
38 #include "util/u_math.h"
39 #include "util/u_half.h"
40 #include "util/u_dynarray.h"
41
42 #include "adreno_common.xml.h"
43 #include "adreno_pm4.xml.h"
44
45 enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format);
46 enum pc_di_index_size fd_pipe2index(enum pipe_format format);
47 enum adreno_rb_blend_factor fd_blend_factor(unsigned factor);
48 enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
49 enum adreno_stencil_op fd_stencil_op(unsigned op);
50
51 #define A3XX_MAX_MIP_LEVELS 14
52 /* TBD if it is same on a2xx, but for now: */
53 #define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
54
55 #define FD_DBG_MSGS 0x0001
56 #define FD_DBG_DISASM 0x0002
57 #define FD_DBG_DCLEAR 0x0004
58 #define FD_DBG_DGMEM 0x0008
59 #define FD_DBG_DSCIS 0x0010
60 #define FD_DBG_DIRECT 0x0020
61 #define FD_DBG_DBYPASS 0x0040
62 #define FD_DBG_FRAGHALF 0x0080
63 #define FD_DBG_NOBIN 0x0100
64 #define FD_DBG_NOOPT 0x0200
65 #define FD_DBG_OPTMSGS 0x0400
66 #define FD_DBG_OPTDUMP 0x0800
67 #define FD_DBG_GLSL130 0x1000
68
69 extern int fd_mesa_debug;
70 extern bool fd_binning_enabled;
71
72 #define DBG(fmt, ...) \
73 do { if (fd_mesa_debug & FD_DBG_MSGS) \
74 debug_printf("%s:%d: "fmt "\n", \
75 __FUNCTION__, __LINE__, ##__VA_ARGS__); } while (0)
76
77 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
78
79 /* for conditionally setting boolean flag(s): */
80 #define COND(bool, val) ((bool) ? (val) : 0)
81
82 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000))))
83
84 static inline uint32_t DRAW(enum pc_di_primtype prim_type,
85 enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
86 enum pc_di_vis_cull_mode vis_cull_mode)
87 {
88 return (prim_type << 0) |
89 (source_select << 6) |
90 ((index_size & 1) << 11) |
91 ((index_size >> 1) << 13) |
92 (vis_cull_mode << 9) |
93 (1 << 14);
94 }
95
96 /* for tracking cmdstream positions that need to be patched: */
97 struct fd_cs_patch {
98 uint32_t *cs;
99 uint32_t val;
100 };
101 #define fd_patch_num_elements(buf) ((buf)->size / sizeof(struct fd_cs_patch))
102 #define fd_patch_element(buf, i) util_dynarray_element(buf, struct fd_cs_patch, i)
103
104 static inline enum pipe_format
105 pipe_surface_format(struct pipe_surface *psurf)
106 {
107 if (!psurf)
108 return PIPE_FORMAT_NONE;
109 return psurf->format;
110 }
111
112 #define LOG_DWORDS 0
113
114 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
115
116 static inline void
117 OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
118 {
119 if (LOG_DWORDS) {
120 DBG("ring[%p]: OUT_RING %04x: %08x", ring,
121 (uint32_t)(ring->cur - ring->last_start), data);
122 }
123 *(ring->cur++) = data;
124 }
125
126 /* like OUT_RING() but appends a cmdstream patch point to 'buf' */
127 static inline void
128 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data,
129 struct util_dynarray *buf)
130 {
131 if (LOG_DWORDS) {
132 DBG("ring[%p]: OUT_RINGP %04x: %08x", ring,
133 (uint32_t)(ring->cur - ring->last_start), data);
134 }
135 util_dynarray_append(buf, struct fd_cs_patch, ((struct fd_cs_patch){
136 .cs = ring->cur++,
137 .val = data,
138 }));
139 }
140
141 static inline void
142 OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
143 uint32_t offset, uint32_t or, int32_t shift)
144 {
145 if (LOG_DWORDS) {
146 DBG("ring[%p]: OUT_RELOC %04x: %p+%u << %d", ring,
147 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
148 }
149 fd_ringbuffer_reloc(ring, &(struct fd_reloc){
150 .bo = bo,
151 .flags = FD_RELOC_READ,
152 .offset = offset,
153 .or = or,
154 .shift = shift,
155 });
156 }
157
158 static inline void
159 OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo,
160 uint32_t offset, uint32_t or, int32_t shift)
161 {
162 if (LOG_DWORDS) {
163 DBG("ring[%p]: OUT_RELOCW %04x: %p+%u << %d", ring,
164 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
165 }
166 fd_ringbuffer_reloc(ring, &(struct fd_reloc){
167 .bo = bo,
168 .flags = FD_RELOC_READ | FD_RELOC_WRITE,
169 .offset = offset,
170 .or = or,
171 .shift = shift,
172 });
173 }
174
175 static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
176 {
177 if ((ring->cur + ndwords) >= ring->end) {
178 /* this probably won't really work if we have multiple tiles..
179 * but it is ok for 2d.. we might need different behavior
180 * depending on 2d or 3d pipe.
181 */
182 DBG("uh oh..");
183 }
184 }
185
186 static inline void
187 OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
188 {
189 BEGIN_RING(ring, cnt+1);
190 OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
191 }
192
193 static inline void
194 OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
195 {
196 BEGIN_RING(ring, cnt+1);
197 OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
198 }
199
200 static inline void
201 OUT_WFI(struct fd_ringbuffer *ring)
202 {
203 OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
204 OUT_RING(ring, 0x00000000);
205 }
206
207 static inline void
208 OUT_IB(struct fd_ringbuffer *ring, struct fd_ringmarker *start,
209 struct fd_ringmarker *end)
210 {
211 /* for debug after a lock up, write a unique counter value
212 * to scratch6 for each IB, to make it easier to match up
213 * register dumps to cmdstream. The combination of IB and
214 * DRAW (scratch7) is enough to "triangulate" the particular
215 * draw that caused lockup.
216 */
217 emit_marker(ring, 6);
218
219 OUT_PKT3(ring, CP_INDIRECT_BUFFER_PFD, 2);
220 fd_ringbuffer_emit_reloc_ring(ring, start, end);
221 OUT_RING(ring, fd_ringmarker_dwords(start, end));
222
223 emit_marker(ring, 6);
224 }
225
226 /* CP_SCRATCH_REG4 is used to hold base address for query results: */
227 #define HW_QUERY_BASE_REG REG_AXXX_CP_SCRATCH_REG4
228
229 static inline void
230 emit_marker(struct fd_ringbuffer *ring, int scratch_idx)
231 {
232 extern unsigned marker_cnt;
233 unsigned reg = REG_AXXX_CP_SCRATCH_REG0 + scratch_idx;
234 assert(reg != HW_QUERY_BASE_REG);
235 if (reg == HW_QUERY_BASE_REG)
236 return;
237 OUT_PKT0(ring, reg, 1);
238 OUT_RING(ring, ++marker_cnt);
239 }
240
241 /* helper to get numeric value from environment variable.. mostly
242 * just leaving this here because it is helpful to brute-force figure
243 * out unknown formats, etc, which blob driver does not support:
244 */
245 static inline uint32_t env2u(const char *envvar)
246 {
247 char *str = getenv(envvar);
248 if (str)
249 return strtol(str, NULL, 0);
250 return 0;
251 }
252
253 #endif /* FREEDRENO_UTIL_H_ */