src/gallium/drivers/freedreno/freedreno_util.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_UTIL_H_
  30 #define FREEDRENO_UTIL_H_
  31
  32 #include <freedreno_drmif.h>
  33 #include <freedreno_ringbuffer.h>
  34
  35 #include "pipe/p_format.h"
  36 #include "pipe/p_state.h"
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_half.h"
  40 #include "util/u_dynarray.h"
  41 #include "util/u_pack_color.h"
  42
  43 #include "disasm.h"
  44 #include "adreno_common.xml.h"
  45 #include "adreno_pm4.xml.h"
  46
  47 enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format);
  48 enum pc_di_index_size fd_pipe2index(enum pipe_format format);
  49 enum adreno_rb_blend_factor fd_blend_factor(unsigned factor);
  50 enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
  51 enum adreno_stencil_op fd_stencil_op(unsigned op);
  52
  53 #define A3XX_MAX_MIP_LEVELS 14
  54 /* TBD if it is same on a2xx, but for now: */
  55 #define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
  56
  57 #define A2XX_MAX_RENDER_TARGETS 1
  58 #define A3XX_MAX_RENDER_TARGETS 4
  59 #define A4XX_MAX_RENDER_TARGETS 8
  60
  61 #define MAX_RENDER_TARGETS A4XX_MAX_RENDER_TARGETS
  62
  63 #define FD_DBG_MSGS     0x0001
  64 #define FD_DBG_DISASM   0x0002
  65 #define FD_DBG_DCLEAR   0x0004
  66 #define FD_DBG_FLUSH    0x0008
  67 #define FD_DBG_NOSCIS   0x0010
  68 #define FD_DBG_DIRECT   0x0020
  69 #define FD_DBG_NOBYPASS 0x0040
  70 #define FD_DBG_FRAGHALF 0x0080
  71 #define FD_DBG_NOBIN    0x0100
  72 #define FD_DBG_OPTMSGS  0x0200
  73 #define FD_DBG_GLSL120  0x0400
  74 #define FD_DBG_SHADERDB 0x0800
  75
  76 extern int fd_mesa_debug;
  77 extern bool fd_binning_enabled;
  78
  79 #define DBG(fmt, ...) \
  80                 do { if (fd_mesa_debug & FD_DBG_MSGS) \
  81                         debug_printf("%s:%d: "fmt "\n", \
  82                                 __FUNCTION__, __LINE__, ##__VA_ARGS__); } while (0)
  83
  84 /* for conditionally setting boolean flag(s): */
  85 #define COND(bool, val) ((bool) ? (val) : 0)
  86
  87 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000))))
  88
  89 static inline uint32_t DRAW(enum pc_di_primtype prim_type,
  90                 enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
  91                 enum pc_di_vis_cull_mode vis_cull_mode,
  92                 uint8_t instances)
  93 {
  94         return (prim_type         << 0) |
  95                         (source_select     << 6) |
  96                         ((index_size & 1)  << 11) |
  97                         ((index_size >> 1) << 13) |
  98                         (vis_cull_mode     << 9) |
  99                         (1                 << 14) |
 100                         (instances         << 24);
 101 }
 102
 103 /* for tracking cmdstream positions that need to be patched: */
 104 struct fd_cs_patch {
 105         uint32_t *cs;
 106         uint32_t val;
 107 };
 108 #define fd_patch_num_elements(buf) ((buf)->size / sizeof(struct fd_cs_patch))
 109 #define fd_patch_element(buf, i)   util_dynarray_element(buf, struct fd_cs_patch, i)
 110
 111 static inline enum pipe_format
 112 pipe_surface_format(struct pipe_surface *psurf)
 113 {
 114         if (!psurf)
 115                 return PIPE_FORMAT_NONE;
 116         return psurf->format;
 117 }
 118
 119 static inline bool
 120 fd_surface_half_precision(const struct pipe_surface *psurf)
 121 {
 122         enum pipe_format format;
 123
 124         if (!psurf)
 125                 return true;
 126
 127         format = psurf->format;
 128
 129         /* colors are provided in consts, which go through cov.f32f16, which will
 130          * break these values
 131          */
 132         if (util_format_is_pure_integer(format))
 133                 return false;
 134
 135         /* avoid losing precision on 32-bit float formats */
 136         if (util_format_is_float(format) &&
 137                 util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0) == 32)
 138                 return false;
 139
 140         return true;
 141 }
 142
 143 static inline unsigned
 144 fd_sampler_first_level(const struct pipe_sampler_view *view)
 145 {
 146         if (view->target == PIPE_BUFFER)
 147                 return 0;
 148         return view->u.tex.first_level;
 149 }
 150
 151 static inline unsigned
 152 fd_sampler_last_level(const struct pipe_sampler_view *view)
 153 {
 154         if (view->target == PIPE_BUFFER)
 155                 return 0;
 156         return view->u.tex.last_level;
 157 }
 158
 159 static inline bool
 160 fd_half_precision(struct pipe_framebuffer_state *pfb)
 161 {
 162         unsigned i;
 163
 164         for (i = 0; i < pfb->nr_cbufs; i++)
 165                 if (!fd_surface_half_precision(pfb->cbufs[i]))
 166                         return false;
 167
 168         return true;
 169 }
 170
 171 #define LOG_DWORDS 0
 172
 173 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
 174
 175 static inline void
 176 OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
 177 {
 178         if (LOG_DWORDS) {
 179                 DBG("ring[%p]: OUT_RING   %04x:  %08x", ring,
 180                                 (uint32_t)(ring->cur - ring->last_start), data);
 181         }
 182         *(ring->cur++) = data;
 183 }
 184
 185 /* like OUT_RING() but appends a cmdstream patch point to 'buf' */
 186 static inline void
 187 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data,
 188                 struct util_dynarray *buf)
 189 {
 190         if (LOG_DWORDS) {
 191                 DBG("ring[%p]: OUT_RINGP  %04x:  %08x", ring,
 192                                 (uint32_t)(ring->cur - ring->last_start), data);
 193         }
 194         util_dynarray_append(buf, struct fd_cs_patch, ((struct fd_cs_patch){
 195                 .cs  = ring->cur++,
 196                 .val = data,
 197         }));
 198 }
 199
 200 static inline void
 201 OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
 202                 uint32_t offset, uint32_t or, int32_t shift)
 203 {
 204         if (LOG_DWORDS) {
 205                 DBG("ring[%p]: OUT_RELOC   %04x:  %p+%u << %d", ring,
 206                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 207         }
 208         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 209                 .bo = bo,
 210                 .flags = FD_RELOC_READ,
 211                 .offset = offset,
 212                 .or = or,
 213                 .shift = shift,
 214         });
 215 }
 216
 217 static inline void
 218 OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo,
 219                 uint32_t offset, uint32_t or, int32_t shift)
 220 {
 221         if (LOG_DWORDS) {
 222                 DBG("ring[%p]: OUT_RELOCW  %04x:  %p+%u << %d", ring,
 223                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 224         }
 225         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 226                 .bo = bo,
 227                 .flags = FD_RELOC_READ | FD_RELOC_WRITE,
 228                 .offset = offset,
 229                 .or = or,
 230                 .shift = shift,
 231         });
 232 }
 233
 234 static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
 235 {
 236         if ((ring->cur + ndwords) >= ring->end) {
 237                 /* this probably won't really work if we have multiple tiles..
 238                  * but it is ok for 2d..  we might need different behavior
 239                  * depending on 2d or 3d pipe.
 240                  */
 241                 DBG("uh oh..");
 242         }
 243 }
 244
 245 static inline void
 246 OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
 247 {
 248         BEGIN_RING(ring, cnt+1);
 249         OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
 250 }
 251
 252 static inline void
 253 OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
 254 {
 255         BEGIN_RING(ring, cnt+1);
 256         OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
 257 }
 258
 259 static inline void
 260 OUT_WFI(struct fd_ringbuffer *ring)
 261 {
 262         OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
 263         OUT_RING(ring, 0x00000000);
 264 }
 265
 266 static inline void
 267 OUT_IB(struct fd_ringbuffer *ring, struct fd_ringmarker *start,
 268                 struct fd_ringmarker *end)
 269 {
 270         uint32_t dwords = fd_ringmarker_dwords(start, end);
 271
 272         assert(dwords > 0);
 273
 274         /* for debug after a lock up, write a unique counter value
 275          * to scratch6 for each IB, to make it easier to match up
 276          * register dumps to cmdstream.  The combination of IB and
 277          * DRAW (scratch7) is enough to "triangulate" the particular
 278          * draw that caused lockup.
 279          */
 280         emit_marker(ring, 6);
 281
 282         OUT_PKT3(ring, CP_INDIRECT_BUFFER_PFD, 2);
 283         fd_ringbuffer_emit_reloc_ring(ring, start, end);
 284         OUT_RING(ring, dwords);
 285
 286         emit_marker(ring, 6);
 287 }
 288
 289 /* CP_SCRATCH_REG4 is used to hold base address for query results: */
 290 #define HW_QUERY_BASE_REG REG_AXXX_CP_SCRATCH_REG4
 291
 292 static inline void
 293 emit_marker(struct fd_ringbuffer *ring, int scratch_idx)
 294 {
 295         extern unsigned marker_cnt;
 296         unsigned reg = REG_AXXX_CP_SCRATCH_REG0 + scratch_idx;
 297         assert(reg != HW_QUERY_BASE_REG);
 298         if (reg == HW_QUERY_BASE_REG)
 299                 return;
 300         OUT_PKT0(ring, reg, 1);
 301         OUT_RING(ring, ++marker_cnt);
 302 }
 303
 304 /* helper to get numeric value from environment variable..  mostly
 305  * just leaving this here because it is helpful to brute-force figure
 306  * out unknown formats, etc, which blob driver does not support:
 307  */
 308 static inline uint32_t env2u(const char *envvar)
 309 {
 310         char *str = getenv(envvar);
 311         if (str)
 312                 return strtoul(str, NULL, 0);
 313         return 0;
 314 }
 315
 316 static inline uint32_t
 317 pack_rgba(enum pipe_format format, const float *rgba)
 318 {
 319         union util_color uc;
 320         util_pack_color(rgba, format, &uc);
 321         return uc.ui[0];
 322 }
 323
 324 #endif /* FREEDRENO_UTIL_H_ */