src/gallium/drivers/freedreno/freedreno_util.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_UTIL_H_
  30 #define FREEDRENO_UTIL_H_
  31
  32 #include <freedreno_drmif.h>
  33 #include <freedreno_ringbuffer.h>
  34
  35 #include "pipe/p_format.h"
  36 #include "pipe/p_state.h"
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_half.h"
  40 #include "util/u_dynarray.h"
  41 #include "util/u_pack_color.h"
  42
  43 #include "disasm.h"
  44 #include "adreno_common.xml.h"
  45 #include "adreno_pm4.xml.h"
  46
  47 enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format);
  48 enum pc_di_index_size fd_pipe2index(enum pipe_format format);
  49 enum adreno_rb_blend_factor fd_blend_factor(unsigned factor);
  50 enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
  51 enum adreno_stencil_op fd_stencil_op(unsigned op);
  52
  53 #define A3XX_MAX_MIP_LEVELS 14
  54 /* TBD if it is same on a2xx, but for now: */
  55 #define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
  56
  57 #define A2XX_MAX_RENDER_TARGETS 1
  58 #define A3XX_MAX_RENDER_TARGETS 4
  59 #define A4XX_MAX_RENDER_TARGETS 8
  60
  61 #define MAX_RENDER_TARGETS A4XX_MAX_RENDER_TARGETS
  62
  63 #define FD_DBG_MSGS     0x0001
  64 #define FD_DBG_DISASM   0x0002
  65 #define FD_DBG_DCLEAR   0x0004
  66 #define FD_DBG_DDRAW    0x0008
  67 #define FD_DBG_NOSCIS   0x0010
  68 #define FD_DBG_DIRECT   0x0020
  69 #define FD_DBG_NOBYPASS 0x0040
  70 #define FD_DBG_FRAGHALF 0x0080
  71 #define FD_DBG_NOBIN    0x0100
  72 #define FD_DBG_OPTMSGS  0x0200
  73 #define FD_DBG_GLSL120  0x0400
  74 #define FD_DBG_SHADERDB 0x0800
  75 #define FD_DBG_FLUSH    0x1000
  76 #define FD_DBG_DEQP     0x2000
  77
  78 extern int fd_mesa_debug;
  79 extern bool fd_binning_enabled;
  80
  81 #define DBG(fmt, ...) \
  82                 do { if (fd_mesa_debug & FD_DBG_MSGS) \
  83                         debug_printf("%s:%d: "fmt "\n", \
  84                                 __FUNCTION__, __LINE__, ##__VA_ARGS__); } while (0)
  85
  86 /* for conditionally setting boolean flag(s): */
  87 #define COND(bool, val) ((bool) ? (val) : 0)
  88
  89 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000))))
  90
  91 static inline uint32_t DRAW(enum pc_di_primtype prim_type,
  92                 enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
  93                 enum pc_di_vis_cull_mode vis_cull_mode,
  94                 uint8_t instances)
  95 {
  96         return (prim_type         << 0) |
  97                         (source_select     << 6) |
  98                         ((index_size & 1)  << 11) |
  99                         ((index_size >> 1) << 13) |
 100                         (vis_cull_mode     << 9) |
 101                         (1                 << 14) |
 102                         (instances         << 24);
 103 }
 104
 105 /* for tracking cmdstream positions that need to be patched: */
 106 struct fd_cs_patch {
 107         uint32_t *cs;
 108         uint32_t val;
 109 };
 110 #define fd_patch_num_elements(buf) ((buf)->size / sizeof(struct fd_cs_patch))
 111 #define fd_patch_element(buf, i)   util_dynarray_element(buf, struct fd_cs_patch, i)
 112
 113 static inline enum pipe_format
 114 pipe_surface_format(struct pipe_surface *psurf)
 115 {
 116         if (!psurf)
 117                 return PIPE_FORMAT_NONE;
 118         return psurf->format;
 119 }
 120
 121 static inline bool
 122 fd_surface_half_precision(const struct pipe_surface *psurf)
 123 {
 124         enum pipe_format format;
 125
 126         if (!psurf)
 127                 return true;
 128
 129         format = psurf->format;
 130
 131         /* colors are provided in consts, which go through cov.f32f16, which will
 132          * break these values
 133          */
 134         if (util_format_is_pure_integer(format))
 135                 return false;
 136
 137         /* avoid losing precision on 32-bit float formats */
 138         if (util_format_is_float(format) &&
 139                 util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0) == 32)
 140                 return false;
 141
 142         return true;
 143 }
 144
 145 static inline unsigned
 146 fd_sampler_first_level(const struct pipe_sampler_view *view)
 147 {
 148         if (view->target == PIPE_BUFFER)
 149                 return 0;
 150         return view->u.tex.first_level;
 151 }
 152
 153 static inline unsigned
 154 fd_sampler_last_level(const struct pipe_sampler_view *view)
 155 {
 156         if (view->target == PIPE_BUFFER)
 157                 return 0;
 158         return view->u.tex.last_level;
 159 }
 160
 161 static inline bool
 162 fd_half_precision(struct pipe_framebuffer_state *pfb)
 163 {
 164         unsigned i;
 165
 166         for (i = 0; i < pfb->nr_cbufs; i++)
 167                 if (!fd_surface_half_precision(pfb->cbufs[i]))
 168                         return false;
 169
 170         return true;
 171 }
 172
 173 #define LOG_DWORDS 0
 174
 175 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
 176
 177 static inline void
 178 OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
 179 {
 180         if (LOG_DWORDS) {
 181                 DBG("ring[%p]: OUT_RING   %04x:  %08x", ring,
 182                                 (uint32_t)(ring->cur - ring->last_start), data);
 183         }
 184         *(ring->cur++) = data;
 185 }
 186
 187 /* like OUT_RING() but appends a cmdstream patch point to 'buf' */
 188 static inline void
 189 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data,
 190                 struct util_dynarray *buf)
 191 {
 192         if (LOG_DWORDS) {
 193                 DBG("ring[%p]: OUT_RINGP  %04x:  %08x", ring,
 194                                 (uint32_t)(ring->cur - ring->last_start), data);
 195         }
 196         util_dynarray_append(buf, struct fd_cs_patch, ((struct fd_cs_patch){
 197                 .cs  = ring->cur++,
 198                 .val = data,
 199         }));
 200 }
 201
 202 static inline void
 203 OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
 204                 uint32_t offset, uint32_t or, int32_t shift)
 205 {
 206         if (LOG_DWORDS) {
 207                 DBG("ring[%p]: OUT_RELOC   %04x:  %p+%u << %d", ring,
 208                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 209         }
 210         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 211                 .bo = bo,
 212                 .flags = FD_RELOC_READ,
 213                 .offset = offset,
 214                 .or = or,
 215                 .shift = shift,
 216         });
 217 }
 218
 219 static inline void
 220 OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo,
 221                 uint32_t offset, uint32_t or, int32_t shift)
 222 {
 223         if (LOG_DWORDS) {
 224                 DBG("ring[%p]: OUT_RELOCW  %04x:  %p+%u << %d", ring,
 225                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 226         }
 227         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 228                 .bo = bo,
 229                 .flags = FD_RELOC_READ | FD_RELOC_WRITE,
 230                 .offset = offset,
 231                 .or = or,
 232                 .shift = shift,
 233         });
 234 }
 235
 236 static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
 237 {
 238         if ((ring->cur + ndwords) >= ring->end) {
 239                 /* this probably won't really work if we have multiple tiles..
 240                  * but it is ok for 2d..  we might need different behavior
 241                  * depending on 2d or 3d pipe.
 242                  */
 243                 DBG("uh oh..");
 244         }
 245 }
 246
 247 static inline void
 248 OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
 249 {
 250         BEGIN_RING(ring, cnt+1);
 251         OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
 252 }
 253
 254 static inline void
 255 OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
 256 {
 257         BEGIN_RING(ring, cnt+1);
 258         OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
 259 }
 260
 261 static inline void
 262 OUT_WFI(struct fd_ringbuffer *ring)
 263 {
 264         OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
 265         OUT_RING(ring, 0x00000000);
 266 }
 267
 268 static inline void
 269 __OUT_IB(struct fd_ringbuffer *ring, bool prefetch,
 270                 struct fd_ringmarker *start, struct fd_ringmarker *end)
 271 {
 272         uint32_t dwords = fd_ringmarker_dwords(start, end);
 273
 274         assert(dwords > 0);
 275
 276         /* for debug after a lock up, write a unique counter value
 277          * to scratch6 for each IB, to make it easier to match up
 278          * register dumps to cmdstream.  The combination of IB and
 279          * DRAW (scratch7) is enough to "triangulate" the particular
 280          * draw that caused lockup.
 281          */
 282         emit_marker(ring, 6);
 283
 284         OUT_PKT3(ring, prefetch ? CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2);
 285         fd_ringbuffer_emit_reloc_ring(ring, start, end);
 286         OUT_RING(ring, dwords);
 287
 288         emit_marker(ring, 6);
 289 }
 290
 291 /* CP_SCRATCH_REG4 is used to hold base address for query results: */
 292 #define HW_QUERY_BASE_REG REG_AXXX_CP_SCRATCH_REG4
 293
 294 static inline void
 295 emit_marker(struct fd_ringbuffer *ring, int scratch_idx)
 296 {
 297         extern unsigned marker_cnt;
 298         unsigned reg = REG_AXXX_CP_SCRATCH_REG0 + scratch_idx;
 299         assert(reg != HW_QUERY_BASE_REG);
 300         if (reg == HW_QUERY_BASE_REG)
 301                 return;
 302         OUT_PKT0(ring, reg, 1);
 303         OUT_RING(ring, ++marker_cnt);
 304 }
 305
 306 /* helper to get numeric value from environment variable..  mostly
 307  * just leaving this here because it is helpful to brute-force figure
 308  * out unknown formats, etc, which blob driver does not support:
 309  */
 310 static inline uint32_t env2u(const char *envvar)
 311 {
 312         char *str = getenv(envvar);
 313         if (str)
 314                 return strtoul(str, NULL, 0);
 315         return 0;
 316 }
 317
 318 static inline uint32_t
 319 pack_rgba(enum pipe_format format, const float *rgba)
 320 {
 321         union util_color uc;
 322         util_pack_color(rgba, format, &uc);
 323         return uc.ui[0];
 324 }
 325
 326 #endif /* FREEDRENO_UTIL_H_ */