src/gallium/drivers/freedreno/freedreno_util.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_UTIL_H_
  30 #define FREEDRENO_UTIL_H_
  31
  32 #include <freedreno_drmif.h>
  33 #include <freedreno_ringbuffer.h>
  34
  35 #include "pipe/p_format.h"
  36 #include "pipe/p_state.h"
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_half.h"
  40 #include "util/u_dynarray.h"
  41 #include "util/u_pack_color.h"
  42
  43 #include "disasm.h"
  44 #include "adreno_common.xml.h"
  45 #include "adreno_pm4.xml.h"
  46
  47 enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format);
  48 enum pc_di_index_size fd_pipe2index(enum pipe_format format);
  49 enum adreno_rb_blend_factor fd_blend_factor(unsigned factor);
  50 enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
  51 enum adreno_stencil_op fd_stencil_op(unsigned op);
  52
  53 #define A3XX_MAX_MIP_LEVELS 14
  54 /* TBD if it is same on a2xx, but for now: */
  55 #define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
  56
  57 #define A2XX_MAX_RENDER_TARGETS 1
  58 #define A3XX_MAX_RENDER_TARGETS 4
  59 #define A4XX_MAX_RENDER_TARGETS 8
  60
  61 #define MAX_RENDER_TARGETS A4XX_MAX_RENDER_TARGETS
  62
  63 #define FD_DBG_MSGS     0x0001
  64 #define FD_DBG_DISASM   0x0002
  65 #define FD_DBG_DCLEAR   0x0004
  66 #define FD_DBG_DDRAW    0x0008
  67 #define FD_DBG_NOSCIS   0x0010
  68 #define FD_DBG_DIRECT   0x0020
  69 #define FD_DBG_NOBYPASS 0x0040
  70 #define FD_DBG_FRAGHALF 0x0080
  71 #define FD_DBG_NOBIN    0x0100
  72 #define FD_DBG_OPTMSGS  0x0200
  73 #define FD_DBG_GLSL120  0x0400
  74 #define FD_DBG_SHADERDB 0x0800
  75 #define FD_DBG_FLUSH    0x1000
  76 #define FD_DBG_DEQP     0x2000
  77 #define FD_DBG_NIR      0x4000
  78
  79 extern int fd_mesa_debug;
  80 extern bool fd_binning_enabled;
  81
  82 #define DBG(fmt, ...) \
  83                 do { if (fd_mesa_debug & FD_DBG_MSGS) \
  84                         debug_printf("%s:%d: "fmt "\n", \
  85                                 __FUNCTION__, __LINE__, ##__VA_ARGS__); } while (0)
  86
  87 /* for conditionally setting boolean flag(s): */
  88 #define COND(bool, val) ((bool) ? (val) : 0)
  89
  90 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000))))
  91
  92 static inline uint32_t DRAW(enum pc_di_primtype prim_type,
  93                 enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
  94                 enum pc_di_vis_cull_mode vis_cull_mode,
  95                 uint8_t instances)
  96 {
  97         return (prim_type         << 0) |
  98                         (source_select     << 6) |
  99                         ((index_size & 1)  << 11) |
 100                         ((index_size >> 1) << 13) |
 101                         (vis_cull_mode     << 9) |
 102                         (1                 << 14) |
 103                         (instances         << 24);
 104 }
 105
 106 /* for tracking cmdstream positions that need to be patched: */
 107 struct fd_cs_patch {
 108         uint32_t *cs;
 109         uint32_t val;
 110 };
 111 #define fd_patch_num_elements(buf) ((buf)->size / sizeof(struct fd_cs_patch))
 112 #define fd_patch_element(buf, i)   util_dynarray_element(buf, struct fd_cs_patch, i)
 113
 114 static inline enum pipe_format
 115 pipe_surface_format(struct pipe_surface *psurf)
 116 {
 117         if (!psurf)
 118                 return PIPE_FORMAT_NONE;
 119         return psurf->format;
 120 }
 121
 122 static inline bool
 123 fd_surface_half_precision(const struct pipe_surface *psurf)
 124 {
 125         enum pipe_format format;
 126
 127         if (!psurf)
 128                 return true;
 129
 130         format = psurf->format;
 131
 132         /* colors are provided in consts, which go through cov.f32f16, which will
 133          * break these values
 134          */
 135         if (util_format_is_pure_integer(format))
 136                 return false;
 137
 138         /* avoid losing precision on 32-bit float formats */
 139         if (util_format_is_float(format) &&
 140                 util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0) == 32)
 141                 return false;
 142
 143         return true;
 144 }
 145
 146 static inline unsigned
 147 fd_sampler_first_level(const struct pipe_sampler_view *view)
 148 {
 149         if (view->target == PIPE_BUFFER)
 150                 return 0;
 151         return view->u.tex.first_level;
 152 }
 153
 154 static inline unsigned
 155 fd_sampler_last_level(const struct pipe_sampler_view *view)
 156 {
 157         if (view->target == PIPE_BUFFER)
 158                 return 0;
 159         return view->u.tex.last_level;
 160 }
 161
 162 static inline bool
 163 fd_half_precision(struct pipe_framebuffer_state *pfb)
 164 {
 165         unsigned i;
 166
 167         for (i = 0; i < pfb->nr_cbufs; i++)
 168                 if (!fd_surface_half_precision(pfb->cbufs[i]))
 169                         return false;
 170
 171         return true;
 172 }
 173
 174 #define LOG_DWORDS 0
 175
 176 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
 177
 178 static inline void
 179 OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
 180 {
 181         if (LOG_DWORDS) {
 182                 DBG("ring[%p]: OUT_RING   %04x:  %08x", ring,
 183                                 (uint32_t)(ring->cur - ring->last_start), data);
 184         }
 185         fd_ringbuffer_emit(ring, data);
 186 }
 187
 188 /* like OUT_RING() but appends a cmdstream patch point to 'buf' */
 189 static inline void
 190 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data,
 191                 struct util_dynarray *buf)
 192 {
 193         if (LOG_DWORDS) {
 194                 DBG("ring[%p]: OUT_RINGP  %04x:  %08x", ring,
 195                                 (uint32_t)(ring->cur - ring->last_start), data);
 196         }
 197         util_dynarray_append(buf, struct fd_cs_patch, ((struct fd_cs_patch){
 198                 .cs  = ring->cur++,
 199                 .val = data,
 200         }));
 201 }
 202
 203 static inline void
 204 OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
 205                 uint32_t offset, uint32_t or, int32_t shift)
 206 {
 207         if (LOG_DWORDS) {
 208                 DBG("ring[%p]: OUT_RELOC   %04x:  %p+%u << %d", ring,
 209                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 210         }
 211         debug_assert(offset < fd_bo_size(bo));
 212         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 213                 .bo = bo,
 214                 .flags = FD_RELOC_READ,
 215                 .offset = offset,
 216                 .or = or,
 217                 .shift = shift,
 218         });
 219 }
 220
 221 static inline void
 222 OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo,
 223                 uint32_t offset, uint32_t or, int32_t shift)
 224 {
 225         if (LOG_DWORDS) {
 226                 DBG("ring[%p]: OUT_RELOCW  %04x:  %p+%u << %d", ring,
 227                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 228         }
 229         debug_assert(offset < fd_bo_size(bo));
 230         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 231                 .bo = bo,
 232                 .flags = FD_RELOC_READ | FD_RELOC_WRITE,
 233                 .offset = offset,
 234                 .or = or,
 235                 .shift = shift,
 236         });
 237 }
 238
 239 static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
 240 {
 241         if ((ring->cur + ndwords) >= ring->end) {
 242                 /* this probably won't really work if we have multiple tiles..
 243                  * but it is ok for 2d..  we might need different behavior
 244                  * depending on 2d or 3d pipe.
 245                  */
 246                 DBG("uh oh..");
 247         }
 248 }
 249
 250 static inline void
 251 OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
 252 {
 253         BEGIN_RING(ring, cnt+1);
 254         OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
 255 }
 256
 257 static inline void
 258 OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
 259 {
 260         BEGIN_RING(ring, cnt+1);
 261         OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
 262 }
 263
 264 static inline void
 265 OUT_WFI(struct fd_ringbuffer *ring)
 266 {
 267         OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
 268         OUT_RING(ring, 0x00000000);
 269 }
 270
 271 static inline void
 272 __OUT_IB(struct fd_ringbuffer *ring, bool prefetch, struct fd_ringbuffer *target)
 273 {
 274         uint32_t dwords = target->cur - target->start;
 275
 276         assert(dwords > 0);
 277
 278         /* for debug after a lock up, write a unique counter value
 279          * to scratch6 for each IB, to make it easier to match up
 280          * register dumps to cmdstream.  The combination of IB and
 281          * DRAW (scratch7) is enough to "triangulate" the particular
 282          * draw that caused lockup.
 283          */
 284         emit_marker(ring, 6);
 285
 286         OUT_PKT3(ring, prefetch ? CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2);
 287         fd_ringbuffer_emit_reloc_ring_full(ring, target, 0);
 288         OUT_RING(ring, dwords);
 289
 290         emit_marker(ring, 6);
 291 }
 292
 293 /* CP_SCRATCH_REG4 is used to hold base address for query results: */
 294 #define HW_QUERY_BASE_REG REG_AXXX_CP_SCRATCH_REG4
 295
 296 static inline void
 297 emit_marker(struct fd_ringbuffer *ring, int scratch_idx)
 298 {
 299         extern unsigned marker_cnt;
 300         unsigned reg = REG_AXXX_CP_SCRATCH_REG0 + scratch_idx;
 301         assert(reg != HW_QUERY_BASE_REG);
 302         if (reg == HW_QUERY_BASE_REG)
 303                 return;
 304         OUT_PKT0(ring, reg, 1);
 305         OUT_RING(ring, ++marker_cnt);
 306 }
 307
 308 /* helper to get numeric value from environment variable..  mostly
 309  * just leaving this here because it is helpful to brute-force figure
 310  * out unknown formats, etc, which blob driver does not support:
 311  */
 312 static inline uint32_t env2u(const char *envvar)
 313 {
 314         char *str = getenv(envvar);
 315         if (str)
 316                 return strtoul(str, NULL, 0);
 317         return 0;
 318 }
 319
 320 static inline uint32_t
 321 pack_rgba(enum pipe_format format, const float *rgba)
 322 {
 323         union util_color uc;
 324         util_pack_color(rgba, format, &uc);
 325         return uc.ui[0];
 326 }
 327
 328 #endif /* FREEDRENO_UTIL_H_ */