src/gallium/drivers/freedreno/freedreno_util.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_UTIL_H_
  30 #define FREEDRENO_UTIL_H_
  31
  32 #include <freedreno_drmif.h>
  33 #include <freedreno_ringbuffer.h>
  34
  35 #include "pipe/p_format.h"
  36 #include "pipe/p_state.h"
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_half.h"
  40 #include "util/u_dynarray.h"
  41
  42 #include "adreno_common.xml.h"
  43 #include "adreno_pm4.xml.h"
  44
  45 enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format);
  46 enum pc_di_index_size fd_pipe2index(enum pipe_format format);
  47 enum adreno_rb_blend_factor fd_blend_factor(unsigned factor);
  48 enum adreno_rb_blend_opcode fd_blend_func(unsigned func);
  49 enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
  50 enum adreno_stencil_op fd_stencil_op(unsigned op);
  51
  52 #define A3XX_MAX_MIP_LEVELS 14
  53 /* TBD if it is same on a2xx, but for now: */
  54 #define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
  55
  56 #define FD_DBG_MSGS     0x0001
  57 #define FD_DBG_DISASM   0x0002
  58 #define FD_DBG_DCLEAR   0x0004
  59 #define FD_DBG_DGMEM    0x0008
  60 #define FD_DBG_DSCIS    0x0010
  61 #define FD_DBG_DIRECT   0x0020
  62 #define FD_DBG_DBYPASS  0x0040
  63 #define FD_DBG_FRAGHALF 0x0080
  64 #define FD_DBG_BINNING  0x0100
  65 #define FD_DBG_DBINNING 0x0200
  66
  67 extern int fd_mesa_debug;
  68 extern bool fd_binning_enabled;
  69
  70 #define DBG(fmt, ...) \
  71                 do { if (fd_mesa_debug & FD_DBG_MSGS) \
  72                         debug_printf("%s:%d: "fmt "\n", \
  73                                 __FUNCTION__, __LINE__, ##__VA_ARGS__); } while (0)
  74
  75 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
  76
  77 /* for conditionally setting boolean flag(s): */
  78 #define COND(bool, val) ((bool) ? (val) : 0)
  79
  80 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000))))
  81
  82 static inline uint32_t DRAW(enum pc_di_primtype prim_type,
  83                 enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
  84                 enum pc_di_vis_cull_mode vis_cull_mode)
  85 {
  86         return (prim_type         << 0) |
  87                         (source_select     << 6) |
  88                         ((index_size & 1)  << 11) |
  89                         ((index_size >> 1) << 13) |
  90                         (vis_cull_mode     << 9) |
  91                         (1                 << 14);
  92 }
  93
  94 /* for tracking cmdstream positions that need to be patched: */
  95 struct fd_cs_patch {
  96         uint32_t *cs;
  97         uint32_t val;
  98 };
  99 #define fd_patch_num_elements(buf) ((buf)->size / sizeof(struct fd_cs_patch))
 100 #define fd_patch_element(buf, i)   util_dynarray_element(buf, struct fd_cs_patch, i)
 101
 102 static inline enum pipe_format
 103 pipe_surface_format(struct pipe_surface *psurf)
 104 {
 105         if (!psurf)
 106                 return PIPE_FORMAT_NONE;
 107         return psurf->format;
 108 }
 109
 110 #define LOG_DWORDS 0
 111
 112 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
 113
 114 static inline void
 115 OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
 116 {
 117         if (LOG_DWORDS) {
 118                 DBG("ring[%p]: OUT_RING   %04x:  %08x", ring,
 119                                 (uint32_t)(ring->cur - ring->last_start), data);
 120         }
 121         *(ring->cur++) = data;
 122 }
 123
 124 /* like OUT_RING() but appends a cmdstream patch point to 'buf' */
 125 static inline void
 126 OUT_RINGP(struct fd_ringbuffer *ring, uint32_t data,
 127                 struct util_dynarray *buf)
 128 {
 129         if (LOG_DWORDS) {
 130                 DBG("ring[%p]: OUT_RINGP  %04x:  %08x", ring,
 131                                 (uint32_t)(ring->cur - ring->last_start), data);
 132         }
 133         util_dynarray_append(buf, struct fd_cs_patch, ((struct fd_cs_patch){
 134                 .cs  = ring->cur++,
 135                 .val = data,
 136         }));
 137 }
 138
 139 static inline void
 140 OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
 141                 uint32_t offset, uint32_t or, int32_t shift)
 142 {
 143         if (LOG_DWORDS) {
 144                 DBG("ring[%p]: OUT_RELOC   %04x:  %p+%u << %d", ring,
 145                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 146         }
 147         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 148                 .bo = bo,
 149                 .flags = FD_RELOC_READ,
 150                 .offset = offset,
 151                 .or = or,
 152                 .shift = shift,
 153         });
 154 }
 155
 156 static inline void
 157 OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo,
 158                 uint32_t offset, uint32_t or, int32_t shift)
 159 {
 160         if (LOG_DWORDS) {
 161                 DBG("ring[%p]: OUT_RELOCW  %04x:  %p+%u << %d", ring,
 162                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 163         }
 164         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 165                 .bo = bo,
 166                 .flags = FD_RELOC_READ | FD_RELOC_WRITE,
 167                 .offset = offset,
 168                 .or = or,
 169                 .shift = shift,
 170         });
 171 }
 172
 173 static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
 174 {
 175         if ((ring->cur + ndwords) >= ring->end) {
 176                 /* this probably won't really work if we have multiple tiles..
 177                  * but it is ok for 2d..  we might need different behavior
 178                  * depending on 2d or 3d pipe.
 179                  */
 180                 DBG("uh oh..");
 181         }
 182 }
 183
 184 static inline void
 185 OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
 186 {
 187         BEGIN_RING(ring, cnt+1);
 188         OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
 189 }
 190
 191 static inline void
 192 OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
 193 {
 194         BEGIN_RING(ring, cnt+1);
 195         OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
 196 }
 197
 198 static inline void
 199 OUT_WFI(struct fd_ringbuffer *ring)
 200 {
 201         OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
 202         OUT_RING(ring, 0x00000000);
 203 }
 204
 205 static inline void
 206 OUT_IB(struct fd_ringbuffer *ring, struct fd_ringmarker *start,
 207                 struct fd_ringmarker *end)
 208 {
 209         /* for debug after a lock up, write a unique counter value
 210          * to scratch6 for each IB, to make it easier to match up
 211          * register dumps to cmdstream.  The combination of IB and
 212          * DRAW (scratch7) is enough to "triangulate" the particular
 213          * draw that caused lockup.
 214          */
 215         emit_marker(ring, 6);
 216
 217         OUT_PKT3(ring, CP_INDIRECT_BUFFER_PFD, 2);
 218         fd_ringbuffer_emit_reloc_ring(ring, start, end);
 219         OUT_RING(ring, fd_ringmarker_dwords(start, end));
 220
 221         emit_marker(ring, 6);
 222 }
 223
 224 static inline void
 225 emit_marker(struct fd_ringbuffer *ring, int scratch_idx)
 226 {
 227         extern unsigned marker_cnt;
 228         OUT_PKT0(ring, REG_AXXX_CP_SCRATCH_REG0 + scratch_idx, 1);
 229         OUT_RING(ring, ++marker_cnt);
 230 }
 231
 232 #endif /* FREEDRENO_UTIL_H_ */