src/gallium/drivers/freedreno/freedreno_util.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FREEDRENO_UTIL_H_
  30 #define FREEDRENO_UTIL_H_
  31
  32 #include <freedreno_drmif.h>
  33 #include <freedreno_ringbuffer.h>
  34
  35 #include "pipe/p_format.h"
  36 #include "pipe/p_state.h"
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_half.h"
  40
  41 #include "adreno_common.xml.h"
  42 #include "adreno_pm4.xml.h"
  43
  44 enum adreno_rb_depth_format fd_pipe2depth(enum pipe_format format);
  45 enum pc_di_index_size fd_pipe2index(enum pipe_format format);
  46 enum adreno_rb_blend_factor fd_blend_factor(unsigned factor);
  47 enum adreno_rb_blend_opcode fd_blend_func(unsigned func);
  48 enum adreno_pa_su_sc_draw fd_polygon_mode(unsigned mode);
  49 enum adreno_stencil_op fd_stencil_op(unsigned op);
  50
  51 #define A3XX_MAX_MIP_LEVELS 14
  52 /* TBD if it is same on a2xx, but for now: */
  53 #define MAX_MIP_LEVELS A3XX_MAX_MIP_LEVELS
  54
  55 #define FD_DBG_MSGS     0x01
  56 #define FD_DBG_DISASM   0x02
  57 #define FD_DBG_DCLEAR   0x04
  58 #define FD_DBG_DGMEM    0x08
  59 #define FD_DBG_DSCIS    0x10
  60 #define FD_DBG_DIRECT   0x20
  61 #define FD_DBG_DBYPASS  0x40
  62 extern int fd_mesa_debug;
  63
  64 #define DBG(fmt, ...) \
  65                 do { if (fd_mesa_debug & FD_DBG_MSGS) \
  66                         debug_printf("%s:%d: "fmt "\n", \
  67                                 __FUNCTION__, __LINE__, ##__VA_ARGS__); } while (0)
  68
  69 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
  70
  71 /* for conditionally setting boolean flag(s): */
  72 #define COND(bool, val) ((bool) ? (val) : 0)
  73
  74 #define CP_REG(reg) ((0x4 << 16) | ((unsigned int)((reg) - (0x2000))))
  75
  76 static inline uint32_t DRAW(enum pc_di_primtype prim_type,
  77                 enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
  78                 enum pc_di_vis_cull_mode vis_cull_mode)
  79 {
  80         return (prim_type         << 0) |
  81                         (source_select     << 6) |
  82                         ((index_size & 1)  << 11) |
  83                         ((index_size >> 1) << 13) |
  84                         (vis_cull_mode     << 9) |
  85                         (1                 << 14);
  86 }
  87
  88
  89 static inline enum pipe_format
  90 pipe_surface_format(struct pipe_surface *psurf)
  91 {
  92         if (!psurf)
  93                 return PIPE_FORMAT_NONE;
  94         return psurf->format;
  95 }
  96
  97 #define LOG_DWORDS 0
  98
  99 static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
 100
 101 static inline void
 102 OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
 103 {
 104         if (LOG_DWORDS) {
 105                 DBG("ring[%p]: OUT_RING   %04x:  %08x", ring,
 106                                 (uint32_t)(ring->cur - ring->last_start), data);
 107         }
 108         *(ring->cur++) = data;
 109 }
 110
 111 static inline void
 112 OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
 113                 uint32_t offset, uint32_t or, int32_t shift)
 114 {
 115         if (LOG_DWORDS) {
 116                 DBG("ring[%p]: OUT_RELOC   %04x:  %p+%u << %d", ring,
 117                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 118         }
 119         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 120                 .bo = bo,
 121                 .flags = FD_RELOC_READ,
 122                 .offset = offset,
 123                 .or = or,
 124                 .shift = shift,
 125         });
 126 }
 127
 128 static inline void
 129 OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo,
 130                 uint32_t offset, uint32_t or, int32_t shift)
 131 {
 132         if (LOG_DWORDS) {
 133                 DBG("ring[%p]: OUT_RELOC   %04x:  %p+%u << %d", ring,
 134                                 (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
 135         }
 136         fd_ringbuffer_reloc(ring, &(struct fd_reloc){
 137                 .bo = bo,
 138                 .flags = FD_RELOC_READ | FD_RELOC_WRITE,
 139                 .offset = offset,
 140                 .or = or,
 141                 .shift = shift,
 142         });
 143 }
 144
 145 static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
 146 {
 147         if ((ring->cur + ndwords) >= ring->end) {
 148                 /* this probably won't really work if we have multiple tiles..
 149                  * but it is ok for 2d..  we might need different behavior
 150                  * depending on 2d or 3d pipe.
 151                  */
 152                 DBG("uh oh..");
 153         }
 154 }
 155
 156 static inline void
 157 OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
 158 {
 159         BEGIN_RING(ring, cnt+1);
 160         OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
 161 }
 162
 163 static inline void
 164 OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
 165 {
 166         BEGIN_RING(ring, cnt+1);
 167         OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
 168 }
 169
 170 static inline void
 171 OUT_WFI(struct fd_ringbuffer *ring)
 172 {
 173         OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
 174         OUT_RING(ring, 0x00000000);
 175 }
 176
 177 static inline void
 178 OUT_IB(struct fd_ringbuffer *ring, struct fd_ringmarker *start,
 179                 struct fd_ringmarker *end)
 180 {
 181         /* for debug after a lock up, write a unique counter value
 182          * to scratch6 for each IB, to make it easier to match up
 183          * register dumps to cmdstream.  The combination of IB and
 184          * DRAW (scratch7) is enough to "triangulate" the particular
 185          * draw that caused lockup.
 186          */
 187         emit_marker(ring, 6);
 188
 189         OUT_PKT3(ring, CP_INDIRECT_BUFFER_PFD, 2);
 190         fd_ringbuffer_emit_reloc_ring(ring, start, end);
 191         OUT_RING(ring, fd_ringmarker_dwords(start, end));
 192
 193         emit_marker(ring, 6);
 194 }
 195
 196 static inline void
 197 emit_marker(struct fd_ringbuffer *ring, int scratch_idx)
 198 {
 199         extern unsigned marker_cnt;
 200         OUT_PKT0(ring, REG_AXXX_CP_SCRATCH_REG0 + scratch_idx, 1);
 201         OUT_RING(ring, ++marker_cnt);
 202 }
 203
 204 #endif /* FREEDRENO_UTIL_H_ */