247175f142ca5653addf7c3378273dc3352ca18c
[mesa.git] / src / gallium / drivers / freedreno / ir3 / disasm-a3xx.c
1 /*
2 * Copyright (c) 2013 Rob Clark <robdclark@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include <stdlib.h>
26 #include <stdint.h>
27 #include <stdbool.h>
28 #include <string.h>
29 #include <assert.h>
30
31 #include <util/u_debug.h>
32
33 #include "disasm.h"
34 #include "instr-a3xx.h"
35
36 static enum debug_t debug;
37
38 #define printf debug_printf
39
40 static const char *levels[] = {
41 "",
42 "\t",
43 "\t\t",
44 "\t\t\t",
45 "\t\t\t\t",
46 "\t\t\t\t\t",
47 "\t\t\t\t\t\t",
48 "\t\t\t\t\t\t\t",
49 "\t\t\t\t\t\t\t\t",
50 "\t\t\t\t\t\t\t\t\t",
51 "x",
52 "x",
53 "x",
54 "x",
55 "x",
56 "x",
57 };
58
59 static const char *component = "xyzw";
60
61 static const char *type[] = {
62 [TYPE_F16] = "f16",
63 [TYPE_F32] = "f32",
64 [TYPE_U16] = "u16",
65 [TYPE_U32] = "u32",
66 [TYPE_S16] = "s16",
67 [TYPE_S32] = "s32",
68 [TYPE_U8] = "u8",
69 [TYPE_S8] = "s8",
70 };
71
72 struct disasm_ctx {
73 FILE *out;
74 int level;
75
76 /* current instruction repeat flag: */
77 unsigned repeat;
78 };
79
80 static void print_reg(struct disasm_ctx *ctx, reg_t reg, bool full, bool r,
81 bool c, bool im, bool neg, bool abs, bool addr_rel)
82 {
83 const char type = c ? 'c' : 'r';
84
85 // XXX I prefer - and || for neg/abs, but preserving format used
86 // by libllvm-a3xx for easy diffing..
87
88 if (abs && neg)
89 fprintf(ctx->out, "(absneg)");
90 else if (neg)
91 fprintf(ctx->out, "(neg)");
92 else if (abs)
93 fprintf(ctx->out, "(abs)");
94
95 if (r)
96 fprintf(ctx->out, "(r)");
97
98 if (im) {
99 fprintf(ctx->out, "%d", reg.iim_val);
100 } else if (addr_rel) {
101 /* I would just use %+d but trying to make it diff'able with
102 * libllvm-a3xx...
103 */
104 if (reg.iim_val < 0)
105 fprintf(ctx->out, "%s%c<a0.x - %d>", full ? "" : "h", type, -reg.iim_val);
106 else if (reg.iim_val > 0)
107 fprintf(ctx->out, "%s%c<a0.x + %d>", full ? "" : "h", type, reg.iim_val);
108 else
109 fprintf(ctx->out, "%s%c<a0.x>", full ? "" : "h", type);
110 } else if ((reg.num == REG_A0) && !c) {
111 fprintf(ctx->out, "a0.%c", component[reg.comp]);
112 } else if ((reg.num == REG_P0) && !c) {
113 fprintf(ctx->out, "p0.%c", component[reg.comp]);
114 } else {
115 fprintf(ctx->out, "%s%c%d.%c", full ? "" : "h", type, reg.num & 0x3f, component[reg.comp]);
116 }
117 }
118
119
120 static void print_reg_dst(struct disasm_ctx *ctx, reg_t reg, bool full, bool addr_rel)
121 {
122 print_reg(ctx, reg, full, false, false, false, false, false, addr_rel);
123 }
124
125 static void print_reg_src(struct disasm_ctx *ctx, reg_t reg, bool full, bool r,
126 bool c, bool im, bool neg, bool abs, bool addr_rel)
127 {
128 print_reg(ctx, reg, full, r, c, im, neg, abs, addr_rel);
129 }
130
131 /* TODO switch to using reginfo struct everywhere, since more readable
132 * than passing a bunch of bools to print_reg_src
133 */
134
135 struct reginfo {
136 reg_t reg;
137 bool full;
138 bool r;
139 bool c;
140 bool im;
141 bool neg;
142 bool abs;
143 bool addr_rel;
144 };
145
146 static void print_src(struct disasm_ctx *ctx, struct reginfo *info)
147 {
148 print_reg_src(ctx, info->reg, info->full, info->r, info->c, info->im,
149 info->neg, info->abs, info->addr_rel);
150 }
151
152 //static void print_dst(struct disasm_ctx *ctx, struct reginfo *info)
153 //{
154 // print_reg_dst(ctx, info->reg, info->full, info->addr_rel);
155 //}
156
157 static void print_instr_cat0(struct disasm_ctx *ctx, instr_t *instr)
158 {
159 instr_cat0_t *cat0 = &instr->cat0;
160
161 switch (cat0->opc) {
162 case OPC_KILL:
163 fprintf(ctx->out, " %sp0.%c", cat0->inv ? "!" : "",
164 component[cat0->comp]);
165 break;
166 case OPC_BR:
167 fprintf(ctx->out, " %sp0.%c, #%d", cat0->inv ? "!" : "",
168 component[cat0->comp], cat0->a3xx.immed);
169 break;
170 case OPC_JUMP:
171 case OPC_CALL:
172 fprintf(ctx->out, " #%d", cat0->a3xx.immed);
173 break;
174 }
175
176 if ((debug & PRINT_VERBOSE) && (cat0->dummy2|cat0->dummy3|cat0->dummy4))
177 fprintf(ctx->out, "\t{0: %x,%x,%x}", cat0->dummy2, cat0->dummy3, cat0->dummy4);
178 }
179
180 static void print_instr_cat1(struct disasm_ctx *ctx, instr_t *instr)
181 {
182 instr_cat1_t *cat1 = &instr->cat1;
183
184 if (cat1->ul)
185 fprintf(ctx->out, "(ul)");
186
187 if (cat1->src_type == cat1->dst_type) {
188 if ((cat1->src_type == TYPE_S16) && (((reg_t)cat1->dst).num == REG_A0)) {
189 /* special case (nmemonic?): */
190 fprintf(ctx->out, "mova");
191 } else {
192 fprintf(ctx->out, "mov.%s%s", type[cat1->src_type], type[cat1->dst_type]);
193 }
194 } else {
195 fprintf(ctx->out, "cov.%s%s", type[cat1->src_type], type[cat1->dst_type]);
196 }
197
198 fprintf(ctx->out, " ");
199
200 if (cat1->even)
201 fprintf(ctx->out, "(even)");
202
203 if (cat1->pos_inf)
204 fprintf(ctx->out, "(pos_infinity)");
205
206 print_reg_dst(ctx, (reg_t)(cat1->dst), type_size(cat1->dst_type) == 32,
207 cat1->dst_rel);
208
209 fprintf(ctx->out, ", ");
210
211 /* ugg, have to special case this.. vs print_reg().. */
212 if (cat1->src_im) {
213 if (type_float(cat1->src_type))
214 fprintf(ctx->out, "(%f)", cat1->fim_val);
215 else if (type_uint(cat1->src_type))
216 fprintf(ctx->out, "0x%08x", cat1->uim_val);
217 else
218 fprintf(ctx->out, "%d", cat1->iim_val);
219 } else if (cat1->src_rel && !cat1->src_c) {
220 /* I would just use %+d but trying to make it diff'able with
221 * libllvm-a3xx...
222 */
223 char type = cat1->src_rel_c ? 'c' : 'r';
224 if (cat1->off < 0)
225 fprintf(ctx->out, "%c<a0.x - %d>", type, -cat1->off);
226 else if (cat1->off > 0)
227 fprintf(ctx->out, "%c<a0.x + %d>", type, cat1->off);
228 else
229 fprintf(ctx->out, "%c<a0.x>", type);
230 } else {
231 print_reg_src(ctx, (reg_t)(cat1->src), type_size(cat1->src_type) == 32,
232 cat1->src_r, cat1->src_c, cat1->src_im, false, false, false);
233 }
234
235 if ((debug & PRINT_VERBOSE) && (cat1->must_be_0))
236 fprintf(ctx->out, "\t{1: %x}", cat1->must_be_0);
237 }
238
239 static void print_instr_cat2(struct disasm_ctx *ctx, instr_t *instr)
240 {
241 instr_cat2_t *cat2 = &instr->cat2;
242 static const char *cond[] = {
243 "lt",
244 "le",
245 "gt",
246 "ge",
247 "eq",
248 "ne",
249 "?6?",
250 };
251
252 switch (_OPC(2, cat2->opc)) {
253 case OPC_CMPS_F:
254 case OPC_CMPS_U:
255 case OPC_CMPS_S:
256 case OPC_CMPV_F:
257 case OPC_CMPV_U:
258 case OPC_CMPV_S:
259 fprintf(ctx->out, ".%s", cond[cat2->cond]);
260 break;
261 }
262
263 fprintf(ctx->out, " ");
264 if (cat2->ei)
265 fprintf(ctx->out, "(ei)");
266 print_reg_dst(ctx, (reg_t)(cat2->dst), cat2->full ^ cat2->dst_half, false);
267 fprintf(ctx->out, ", ");
268
269 if (cat2->c1.src1_c) {
270 print_reg_src(ctx, (reg_t)(cat2->c1.src1), cat2->full, cat2->src1_r,
271 cat2->c1.src1_c, cat2->src1_im, cat2->src1_neg,
272 cat2->src1_abs, false);
273 } else if (cat2->rel1.src1_rel) {
274 print_reg_src(ctx, (reg_t)(cat2->rel1.src1), cat2->full, cat2->src1_r,
275 cat2->rel1.src1_c, cat2->src1_im, cat2->src1_neg,
276 cat2->src1_abs, cat2->rel1.src1_rel);
277 } else {
278 print_reg_src(ctx, (reg_t)(cat2->src1), cat2->full, cat2->src1_r,
279 false, cat2->src1_im, cat2->src1_neg,
280 cat2->src1_abs, false);
281 }
282
283 switch (_OPC(2, cat2->opc)) {
284 case OPC_ABSNEG_F:
285 case OPC_ABSNEG_S:
286 case OPC_CLZ_B:
287 case OPC_CLZ_S:
288 case OPC_SIGN_F:
289 case OPC_FLOOR_F:
290 case OPC_CEIL_F:
291 case OPC_RNDNE_F:
292 case OPC_RNDAZ_F:
293 case OPC_TRUNC_F:
294 case OPC_NOT_B:
295 case OPC_BFREV_B:
296 case OPC_SETRM:
297 case OPC_CBITS_B:
298 /* these only have one src reg */
299 break;
300 default:
301 fprintf(ctx->out, ", ");
302 if (cat2->c2.src2_c) {
303 print_reg_src(ctx, (reg_t)(cat2->c2.src2), cat2->full, cat2->src2_r,
304 cat2->c2.src2_c, cat2->src2_im, cat2->src2_neg,
305 cat2->src2_abs, false);
306 } else if (cat2->rel2.src2_rel) {
307 print_reg_src(ctx, (reg_t)(cat2->rel2.src2), cat2->full, cat2->src2_r,
308 cat2->rel2.src2_c, cat2->src2_im, cat2->src2_neg,
309 cat2->src2_abs, cat2->rel2.src2_rel);
310 } else {
311 print_reg_src(ctx, (reg_t)(cat2->src2), cat2->full, cat2->src2_r,
312 false, cat2->src2_im, cat2->src2_neg,
313 cat2->src2_abs, false);
314 }
315 break;
316 }
317 }
318
319 static void print_instr_cat3(struct disasm_ctx *ctx, instr_t *instr)
320 {
321 instr_cat3_t *cat3 = &instr->cat3;
322 bool full = instr_cat3_full(cat3);
323
324 fprintf(ctx->out, " ");
325 print_reg_dst(ctx, (reg_t)(cat3->dst), full ^ cat3->dst_half, false);
326 fprintf(ctx->out, ", ");
327 if (cat3->c1.src1_c) {
328 print_reg_src(ctx, (reg_t)(cat3->c1.src1), full,
329 cat3->src1_r, cat3->c1.src1_c, false, cat3->src1_neg,
330 false, false);
331 } else if (cat3->rel1.src1_rel) {
332 print_reg_src(ctx, (reg_t)(cat3->rel1.src1), full,
333 cat3->src1_r, cat3->rel1.src1_c, false, cat3->src1_neg,
334 false, cat3->rel1.src1_rel);
335 } else {
336 print_reg_src(ctx, (reg_t)(cat3->src1), full,
337 cat3->src1_r, false, false, cat3->src1_neg,
338 false, false);
339 }
340 fprintf(ctx->out, ", ");
341 print_reg_src(ctx, (reg_t)cat3->src2, full,
342 cat3->src2_r, cat3->src2_c, false, cat3->src2_neg,
343 false, false);
344 fprintf(ctx->out, ", ");
345 if (cat3->c2.src3_c) {
346 print_reg_src(ctx, (reg_t)(cat3->c2.src3), full,
347 cat3->src3_r, cat3->c2.src3_c, false, cat3->src3_neg,
348 false, false);
349 } else if (cat3->rel2.src3_rel) {
350 print_reg_src(ctx, (reg_t)(cat3->rel2.src3), full,
351 cat3->src3_r, cat3->rel2.src3_c, false, cat3->src3_neg,
352 false, cat3->rel2.src3_rel);
353 } else {
354 print_reg_src(ctx, (reg_t)(cat3->src3), full,
355 cat3->src3_r, false, false, cat3->src3_neg,
356 false, false);
357 }
358 }
359
360 static void print_instr_cat4(struct disasm_ctx *ctx, instr_t *instr)
361 {
362 instr_cat4_t *cat4 = &instr->cat4;
363
364 fprintf(ctx->out, " ");
365 print_reg_dst(ctx, (reg_t)(cat4->dst), cat4->full ^ cat4->dst_half, false);
366 fprintf(ctx->out, ", ");
367
368 if (cat4->c.src_c) {
369 print_reg_src(ctx, (reg_t)(cat4->c.src), cat4->full,
370 cat4->src_r, cat4->c.src_c, cat4->src_im,
371 cat4->src_neg, cat4->src_abs, false);
372 } else if (cat4->rel.src_rel) {
373 print_reg_src(ctx, (reg_t)(cat4->rel.src), cat4->full,
374 cat4->src_r, cat4->rel.src_c, cat4->src_im,
375 cat4->src_neg, cat4->src_abs, cat4->rel.src_rel);
376 } else {
377 print_reg_src(ctx, (reg_t)(cat4->src), cat4->full,
378 cat4->src_r, false, cat4->src_im,
379 cat4->src_neg, cat4->src_abs, false);
380 }
381
382 if ((debug & PRINT_VERBOSE) && (cat4->dummy1|cat4->dummy2))
383 fprintf(ctx->out, "\t{4: %x,%x}", cat4->dummy1, cat4->dummy2);
384 }
385
386 static void print_instr_cat5(struct disasm_ctx *ctx, instr_t *instr)
387 {
388 static const struct {
389 bool src1, src2, samp, tex;
390 } info[0x1f] = {
391 [opc_op(OPC_ISAM)] = { true, false, true, true, },
392 [opc_op(OPC_ISAML)] = { true, true, true, true, },
393 [opc_op(OPC_ISAMM)] = { true, false, true, true, },
394 [opc_op(OPC_SAM)] = { true, false, true, true, },
395 [opc_op(OPC_SAMB)] = { true, true, true, true, },
396 [opc_op(OPC_SAML)] = { true, true, true, true, },
397 [opc_op(OPC_SAMGQ)] = { true, false, true, true, },
398 [opc_op(OPC_GETLOD)] = { true, false, true, true, },
399 [opc_op(OPC_CONV)] = { true, true, true, true, },
400 [opc_op(OPC_CONVM)] = { true, true, true, true, },
401 [opc_op(OPC_GETSIZE)] = { true, false, false, true, },
402 [opc_op(OPC_GETBUF)] = { false, false, false, true, },
403 [opc_op(OPC_GETPOS)] = { true, false, false, true, },
404 [opc_op(OPC_GETINFO)] = { false, false, false, true, },
405 [opc_op(OPC_DSX)] = { true, false, false, false, },
406 [opc_op(OPC_DSY)] = { true, false, false, false, },
407 [opc_op(OPC_GATHER4R)] = { true, false, true, true, },
408 [opc_op(OPC_GATHER4G)] = { true, false, true, true, },
409 [opc_op(OPC_GATHER4B)] = { true, false, true, true, },
410 [opc_op(OPC_GATHER4A)] = { true, false, true, true, },
411 [opc_op(OPC_SAMGP0)] = { true, false, true, true, },
412 [opc_op(OPC_SAMGP1)] = { true, false, true, true, },
413 [opc_op(OPC_SAMGP2)] = { true, false, true, true, },
414 [opc_op(OPC_SAMGP3)] = { true, false, true, true, },
415 [opc_op(OPC_DSXPP_1)] = { true, false, false, false, },
416 [opc_op(OPC_DSYPP_1)] = { true, false, false, false, },
417 [opc_op(OPC_RGETPOS)] = { false, false, false, false, },
418 [opc_op(OPC_RGETINFO)] = { false, false, false, false, },
419 };
420 instr_cat5_t *cat5 = &instr->cat5;
421 int i;
422
423 if (cat5->is_3d) fprintf(ctx->out, ".3d");
424 if (cat5->is_a) fprintf(ctx->out, ".a");
425 if (cat5->is_o) fprintf(ctx->out, ".o");
426 if (cat5->is_p) fprintf(ctx->out, ".p");
427 if (cat5->is_s) fprintf(ctx->out, ".s");
428 if (cat5->is_s2en) fprintf(ctx->out, ".s2en");
429
430 fprintf(ctx->out, " ");
431
432 switch (_OPC(5, cat5->opc)) {
433 case OPC_DSXPP_1:
434 case OPC_DSYPP_1:
435 break;
436 default:
437 fprintf(ctx->out, "(%s)", type[cat5->type]);
438 break;
439 }
440
441 fprintf(ctx->out, "(");
442 for (i = 0; i < 4; i++)
443 if (cat5->wrmask & (1 << i))
444 fprintf(ctx->out, "%c", "xyzw"[i]);
445 fprintf(ctx->out, ")");
446
447 print_reg_dst(ctx, (reg_t)(cat5->dst), type_size(cat5->type) == 32, false);
448
449 if (info[cat5->opc].src1) {
450 fprintf(ctx->out, ", ");
451 print_reg_src(ctx, (reg_t)(cat5->src1), cat5->full, false, false, false,
452 false, false, false);
453 }
454
455 if (cat5->is_s2en) {
456 fprintf(ctx->out, ", ");
457 print_reg_src(ctx, (reg_t)(cat5->s2en.src2), cat5->full, false, false, false,
458 false, false, false);
459 fprintf(ctx->out, ", ");
460 print_reg_src(ctx, (reg_t)(cat5->s2en.src3), false, false, false, false,
461 false, false, false);
462 } else {
463 if (cat5->is_o || info[cat5->opc].src2) {
464 fprintf(ctx->out, ", ");
465 print_reg_src(ctx, (reg_t)(cat5->norm.src2), cat5->full,
466 false, false, false, false, false, false);
467 }
468 if (info[cat5->opc].samp)
469 fprintf(ctx->out, ", s#%d", cat5->norm.samp);
470 if (info[cat5->opc].tex)
471 fprintf(ctx->out, ", t#%d", cat5->norm.tex);
472 }
473
474 if (debug & PRINT_VERBOSE) {
475 if (cat5->is_s2en) {
476 if ((debug & PRINT_VERBOSE) && (cat5->s2en.dummy1|cat5->s2en.dummy2|cat5->dummy2))
477 fprintf(ctx->out, "\t{5: %x,%x,%x}", cat5->s2en.dummy1, cat5->s2en.dummy2, cat5->dummy2);
478 } else {
479 if ((debug & PRINT_VERBOSE) && (cat5->norm.dummy1|cat5->dummy2))
480 fprintf(ctx->out, "\t{5: %x,%x}", cat5->norm.dummy1, cat5->dummy2);
481 }
482 }
483 }
484
485 static void print_instr_cat6(struct disasm_ctx *ctx, instr_t *instr)
486 {
487 instr_cat6_t *cat6 = &instr->cat6;
488 char sd = 0, ss = 0; /* dst/src address space */
489 bool nodst = false;
490 struct reginfo dst, src1, src2;
491 int src1off = 0, dstoff = 0;
492
493 memset(&dst, 0, sizeof(dst));
494 memset(&src1, 0, sizeof(src1));
495 memset(&src2, 0, sizeof(src2));
496
497 switch (_OPC(6, cat6->opc)) {
498 case OPC_RESINFO:
499 case OPC_RESFMT:
500 dst.full = type_size(cat6->type) == 32;
501 src1.full = type_size(cat6->type) == 32;
502 src2.full = type_size(cat6->type) == 32;
503 break;
504 case OPC_L2G:
505 case OPC_G2L:
506 dst.full = true;
507 src1.full = true;
508 src2.full = true;
509 break;
510 case OPC_STG:
511 case OPC_STL:
512 case OPC_STP:
513 case OPC_STI:
514 case OPC_STLW:
515 case OPC_STIB:
516 dst.full = true;
517 src1.full = type_size(cat6->type) == 32;
518 src2.full = type_size(cat6->type) == 32;
519 break;
520 default:
521 dst.full = type_size(cat6->type) == 32;
522 src1.full = true;
523 src2.full = true;
524 break;
525 }
526
527 switch (_OPC(6, cat6->opc)) {
528 case OPC_PREFETCH:
529 break;
530 case OPC_RESINFO:
531 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
532 break;
533 case OPC_LDGB:
534 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped");
535 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
536 fprintf(ctx->out, ".%s", type[cat6->type]);
537 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1);
538 break;
539 case OPC_STGB:
540 case OPC_STIB:
541 fprintf(ctx->out, ".%s", cat6->stgb.typed ? "typed" : "untyped");
542 fprintf(ctx->out, ".%dd", cat6->stgb.d + 1);
543 fprintf(ctx->out, ".%s", type[cat6->type]);
544 fprintf(ctx->out, ".%d", cat6->stgb.type_size + 1);
545 break;
546 case OPC_ATOMIC_ADD:
547 case OPC_ATOMIC_SUB:
548 case OPC_ATOMIC_XCHG:
549 case OPC_ATOMIC_INC:
550 case OPC_ATOMIC_DEC:
551 case OPC_ATOMIC_CMPXCHG:
552 case OPC_ATOMIC_MIN:
553 case OPC_ATOMIC_MAX:
554 case OPC_ATOMIC_AND:
555 case OPC_ATOMIC_OR:
556 case OPC_ATOMIC_XOR:
557 ss = cat6->g ? 'g' : 'l';
558 fprintf(ctx->out, ".%s", cat6->ldgb.typed ? "typed" : "untyped");
559 fprintf(ctx->out, ".%dd", cat6->ldgb.d + 1);
560 fprintf(ctx->out, ".%s", type[cat6->type]);
561 fprintf(ctx->out, ".%d", cat6->ldgb.type_size + 1);
562 fprintf(ctx->out, ".%c", ss);
563 break;
564 default:
565 dst.im = cat6->g && !cat6->dst_off;
566 fprintf(ctx->out, ".%s", type[cat6->type]);
567 break;
568 }
569 fprintf(ctx->out, " ");
570
571 switch (_OPC(6, cat6->opc)) {
572 case OPC_STG:
573 sd = 'g';
574 break;
575 case OPC_STP:
576 sd = 'p';
577 break;
578 case OPC_STL:
579 case OPC_STLW:
580 sd = 'l';
581 break;
582
583 case OPC_LDG:
584 case OPC_LDC:
585 ss = 'g';
586 break;
587 case OPC_LDP:
588 ss = 'p';
589 break;
590 case OPC_LDL:
591 case OPC_LDLW:
592 case OPC_LDLV:
593 ss = 'l';
594 break;
595
596 case OPC_L2G:
597 ss = 'l';
598 sd = 'g';
599 break;
600
601 case OPC_G2L:
602 ss = 'g';
603 sd = 'l';
604 break;
605
606 case OPC_PREFETCH:
607 ss = 'g';
608 nodst = true;
609 break;
610
611 case OPC_STI:
612 dst.full = false; // XXX or inverts??
613 break;
614 }
615
616 if ((_OPC(6, cat6->opc) == OPC_STGB) || (_OPC(6, cat6->opc) == OPC_STIB)) {
617 struct reginfo src3;
618
619 memset(&src3, 0, sizeof(src3));
620
621 src1.reg = (reg_t)(cat6->stgb.src1);
622 src2.reg = (reg_t)(cat6->stgb.src2);
623 src2.im = cat6->stgb.src2_im;
624 src3.reg = (reg_t)(cat6->stgb.src3);
625 src3.im = cat6->stgb.src3_im;
626 src3.full = true;
627
628 fprintf(ctx->out, "g[%u], ", cat6->stgb.dst_ssbo);
629 print_src(ctx, &src1);
630 fprintf(ctx->out, ", ");
631 print_src(ctx, &src2);
632 fprintf(ctx->out, ", ");
633 print_src(ctx, &src3);
634
635 if (debug & PRINT_VERBOSE)
636 fprintf(ctx->out, " (pad0=%x, pad3=%x)", cat6->stgb.pad0, cat6->stgb.pad3);
637
638 return;
639 }
640
641 if (is_atomic(_OPC(6, cat6->opc))) {
642
643 src1.reg = (reg_t)(cat6->ldgb.src1);
644 src1.im = cat6->ldgb.src1_im;
645 src2.reg = (reg_t)(cat6->ldgb.src2);
646 src2.im = cat6->ldgb.src2_im;
647 dst.reg = (reg_t)(cat6->ldgb.dst);
648
649 print_src(ctx, &dst);
650 fprintf(ctx->out, ", ");
651 if (ss == 'g') {
652 struct reginfo src3;
653 memset(&src3, 0, sizeof(src3));
654
655 src3.reg = (reg_t)(cat6->ldgb.src3);
656 src3.full = true;
657
658 /* For images, the ".typed" variant is used and src2 is
659 * the ivecN coordinates, ie ivec2 for 2d.
660 *
661 * For SSBOs, the ".untyped" variant is used and src2 is
662 * a simple dword offset.. src3 appears to be
663 * uvec2(offset * 4, 0). Not sure the point of that.
664 */
665
666 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo);
667 print_src(ctx, &src1); /* value */
668 fprintf(ctx->out, ", ");
669 print_src(ctx, &src2); /* offset/coords */
670 fprintf(ctx->out, ", ");
671 print_src(ctx, &src3); /* 64b byte offset.. */
672
673 if (debug & PRINT_VERBOSE) {
674 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0,
675 cat6->ldgb.pad3, cat6->ldgb.mustbe0);
676 }
677 } else { /* ss == 'l' */
678 fprintf(ctx->out, "l[");
679 print_src(ctx, &src1); /* simple byte offset */
680 fprintf(ctx->out, "], ");
681 print_src(ctx, &src2); /* value */
682
683 if (debug & PRINT_VERBOSE) {
684 fprintf(ctx->out, " (src3=%x, pad0=%x, pad3=%x, mustbe0=%x)",
685 cat6->ldgb.src3, cat6->ldgb.pad0,
686 cat6->ldgb.pad3, cat6->ldgb.mustbe0);
687 }
688 }
689
690 return;
691 } else if (_OPC(6, cat6->opc) == OPC_RESINFO) {
692 dst.reg = (reg_t)(cat6->ldgb.dst);
693
694 print_src(ctx, &dst);
695 fprintf(ctx->out, ", ");
696 fprintf(ctx->out, "g[%u]", cat6->ldgb.src_ssbo);
697
698 return;
699 } else if (_OPC(6, cat6->opc) == OPC_LDGB) {
700
701 src1.reg = (reg_t)(cat6->ldgb.src1);
702 src1.im = cat6->ldgb.src1_im;
703 src2.reg = (reg_t)(cat6->ldgb.src2);
704 src2.im = cat6->ldgb.src2_im;
705 dst.reg = (reg_t)(cat6->ldgb.dst);
706
707 print_src(ctx, &dst);
708 fprintf(ctx->out, ", ");
709 fprintf(ctx->out, "g[%u], ", cat6->ldgb.src_ssbo);
710 print_src(ctx, &src1);
711 fprintf(ctx->out, ", ");
712 print_src(ctx, &src2);
713
714 if (debug & PRINT_VERBOSE)
715 fprintf(ctx->out, " (pad0=%x, pad3=%x, mustbe0=%x)", cat6->ldgb.pad0, cat6->ldgb.pad3, cat6->ldgb.mustbe0);
716
717 return;
718 }
719 if (cat6->dst_off) {
720 dst.reg = (reg_t)(cat6->c.dst);
721 dstoff = cat6->c.off;
722 } else {
723 dst.reg = (reg_t)(cat6->d.dst);
724 }
725
726 if (cat6->src_off) {
727 src1.reg = (reg_t)(cat6->a.src1);
728 src1.im = cat6->a.src1_im;
729 src2.reg = (reg_t)(cat6->a.src2);
730 src2.im = cat6->a.src2_im;
731 src1off = cat6->a.off;
732 } else {
733 src1.reg = (reg_t)(cat6->b.src1);
734 src1.im = cat6->b.src1_im;
735 src2.reg = (reg_t)(cat6->b.src2);
736 src2.im = cat6->b.src2_im;
737 }
738
739 if (!nodst) {
740 if (sd)
741 fprintf(ctx->out, "%c[", sd);
742 /* note: dst might actually be a src (ie. address to store to) */
743 print_src(ctx, &dst);
744 if (dstoff)
745 fprintf(ctx->out, "%+d", dstoff);
746 if (sd)
747 fprintf(ctx->out, "]");
748 fprintf(ctx->out, ", ");
749 }
750
751 if (ss)
752 fprintf(ctx->out, "%c[", ss);
753
754 /* can have a larger than normal immed, so hack: */
755 if (src1.im) {
756 fprintf(ctx->out, "%u", src1.reg.dummy13);
757 } else {
758 print_src(ctx, &src1);
759 }
760
761 if (src1off)
762 fprintf(ctx->out, "%+d", src1off);
763 if (ss)
764 fprintf(ctx->out, "]");
765
766 switch (_OPC(6, cat6->opc)) {
767 case OPC_RESINFO:
768 case OPC_RESFMT:
769 break;
770 default:
771 fprintf(ctx->out, ", ");
772 print_src(ctx, &src2);
773 break;
774 }
775 }
776
777 static void print_instr_cat7(struct disasm_ctx *ctx, instr_t *instr)
778 {
779 instr_cat7_t *cat7 = &instr->cat7;
780
781 if (cat7->g)
782 fprintf(ctx->out, ".g");
783 if (cat7->l)
784 fprintf(ctx->out, ".l");
785
786 if (_OPC(7, cat7->opc) == OPC_FENCE) {
787 if (cat7->r)
788 fprintf(ctx->out, ".r");
789 if (cat7->w)
790 fprintf(ctx->out, ".w");
791 }
792 }
793
794 /* size of largest OPC field of all the instruction categories: */
795 #define NOPC_BITS 6
796
797 static const struct opc_info {
798 uint16_t cat;
799 uint16_t opc;
800 const char *name;
801 void (*print)(struct disasm_ctx *ctx, instr_t *instr);
802 } opcs[1 << (3+NOPC_BITS)] = {
803 #define OPC(cat, opc, name) [(opc)] = { (cat), (opc), #name, print_instr_cat##cat }
804 /* category 0: */
805 OPC(0, OPC_NOP, nop),
806 OPC(0, OPC_BR, br),
807 OPC(0, OPC_JUMP, jump),
808 OPC(0, OPC_CALL, call),
809 OPC(0, OPC_RET, ret),
810 OPC(0, OPC_KILL, kill),
811 OPC(0, OPC_END, end),
812 OPC(0, OPC_EMIT, emit),
813 OPC(0, OPC_CUT, cut),
814 OPC(0, OPC_CHMASK, chmask),
815 OPC(0, OPC_CHSH, chsh),
816 OPC(0, OPC_FLOW_REV, flow_rev),
817
818 /* category 1: */
819 OPC(1, OPC_MOV, ),
820
821 /* category 2: */
822 OPC(2, OPC_ADD_F, add.f),
823 OPC(2, OPC_MIN_F, min.f),
824 OPC(2, OPC_MAX_F, max.f),
825 OPC(2, OPC_MUL_F, mul.f),
826 OPC(2, OPC_SIGN_F, sign.f),
827 OPC(2, OPC_CMPS_F, cmps.f),
828 OPC(2, OPC_ABSNEG_F, absneg.f),
829 OPC(2, OPC_CMPV_F, cmpv.f),
830 OPC(2, OPC_FLOOR_F, floor.f),
831 OPC(2, OPC_CEIL_F, ceil.f),
832 OPC(2, OPC_RNDNE_F, rndne.f),
833 OPC(2, OPC_RNDAZ_F, rndaz.f),
834 OPC(2, OPC_TRUNC_F, trunc.f),
835 OPC(2, OPC_ADD_U, add.u),
836 OPC(2, OPC_ADD_S, add.s),
837 OPC(2, OPC_SUB_U, sub.u),
838 OPC(2, OPC_SUB_S, sub.s),
839 OPC(2, OPC_CMPS_U, cmps.u),
840 OPC(2, OPC_CMPS_S, cmps.s),
841 OPC(2, OPC_MIN_U, min.u),
842 OPC(2, OPC_MIN_S, min.s),
843 OPC(2, OPC_MAX_U, max.u),
844 OPC(2, OPC_MAX_S, max.s),
845 OPC(2, OPC_ABSNEG_S, absneg.s),
846 OPC(2, OPC_AND_B, and.b),
847 OPC(2, OPC_OR_B, or.b),
848 OPC(2, OPC_NOT_B, not.b),
849 OPC(2, OPC_XOR_B, xor.b),
850 OPC(2, OPC_CMPV_U, cmpv.u),
851 OPC(2, OPC_CMPV_S, cmpv.s),
852 OPC(2, OPC_MUL_U, mul.u),
853 OPC(2, OPC_MUL_S, mul.s),
854 OPC(2, OPC_MULL_U, mull.u),
855 OPC(2, OPC_BFREV_B, bfrev.b),
856 OPC(2, OPC_CLZ_S, clz.s),
857 OPC(2, OPC_CLZ_B, clz.b),
858 OPC(2, OPC_SHL_B, shl.b),
859 OPC(2, OPC_SHR_B, shr.b),
860 OPC(2, OPC_ASHR_B, ashr.b),
861 OPC(2, OPC_BARY_F, bary.f),
862 OPC(2, OPC_MGEN_B, mgen.b),
863 OPC(2, OPC_GETBIT_B, getbit.b),
864 OPC(2, OPC_SETRM, setrm),
865 OPC(2, OPC_CBITS_B, cbits.b),
866 OPC(2, OPC_SHB, shb),
867 OPC(2, OPC_MSAD, msad),
868
869 /* category 3: */
870 OPC(3, OPC_MAD_U16, mad.u16),
871 OPC(3, OPC_MADSH_U16, madsh.u16),
872 OPC(3, OPC_MAD_S16, mad.s16),
873 OPC(3, OPC_MADSH_M16, madsh.m16),
874 OPC(3, OPC_MAD_U24, mad.u24),
875 OPC(3, OPC_MAD_S24, mad.s24),
876 OPC(3, OPC_MAD_F16, mad.f16),
877 OPC(3, OPC_MAD_F32, mad.f32),
878 OPC(3, OPC_SEL_B16, sel.b16),
879 OPC(3, OPC_SEL_B32, sel.b32),
880 OPC(3, OPC_SEL_S16, sel.s16),
881 OPC(3, OPC_SEL_S32, sel.s32),
882 OPC(3, OPC_SEL_F16, sel.f16),
883 OPC(3, OPC_SEL_F32, sel.f32),
884 OPC(3, OPC_SAD_S16, sad.s16),
885 OPC(3, OPC_SAD_S32, sad.s32),
886
887 /* category 4: */
888 OPC(4, OPC_RCP, rcp),
889 OPC(4, OPC_RSQ, rsq),
890 OPC(4, OPC_LOG2, log2),
891 OPC(4, OPC_EXP2, exp2),
892 OPC(4, OPC_SIN, sin),
893 OPC(4, OPC_COS, cos),
894 OPC(4, OPC_SQRT, sqrt),
895
896 /* category 5: */
897 OPC(5, OPC_ISAM, isam),
898 OPC(5, OPC_ISAML, isaml),
899 OPC(5, OPC_ISAMM, isamm),
900 OPC(5, OPC_SAM, sam),
901 OPC(5, OPC_SAMB, samb),
902 OPC(5, OPC_SAML, saml),
903 OPC(5, OPC_SAMGQ, samgq),
904 OPC(5, OPC_GETLOD, getlod),
905 OPC(5, OPC_CONV, conv),
906 OPC(5, OPC_CONVM, convm),
907 OPC(5, OPC_GETSIZE, getsize),
908 OPC(5, OPC_GETBUF, getbuf),
909 OPC(5, OPC_GETPOS, getpos),
910 OPC(5, OPC_GETINFO, getinfo),
911 OPC(5, OPC_DSX, dsx),
912 OPC(5, OPC_DSY, dsy),
913 OPC(5, OPC_GATHER4R, gather4r),
914 OPC(5, OPC_GATHER4G, gather4g),
915 OPC(5, OPC_GATHER4B, gather4b),
916 OPC(5, OPC_GATHER4A, gather4a),
917 OPC(5, OPC_SAMGP0, samgp0),
918 OPC(5, OPC_SAMGP1, samgp1),
919 OPC(5, OPC_SAMGP2, samgp2),
920 OPC(5, OPC_SAMGP3, samgp3),
921 OPC(5, OPC_DSXPP_1, dsxpp.1),
922 OPC(5, OPC_DSYPP_1, dsypp.1),
923 OPC(5, OPC_RGETPOS, rgetpos),
924 OPC(5, OPC_RGETINFO, rgetinfo),
925
926
927 /* category 6: */
928 OPC(6, OPC_LDG, ldg),
929 OPC(6, OPC_LDL, ldl),
930 OPC(6, OPC_LDP, ldp),
931 OPC(6, OPC_STG, stg),
932 OPC(6, OPC_STL, stl),
933 OPC(6, OPC_STP, stp),
934 OPC(6, OPC_STI, sti),
935 OPC(6, OPC_G2L, g2l),
936 OPC(6, OPC_L2G, l2g),
937 OPC(6, OPC_PREFETCH, prefetch),
938 OPC(6, OPC_LDLW, ldlw),
939 OPC(6, OPC_STLW, stlw),
940 OPC(6, OPC_RESFMT, resfmt),
941 OPC(6, OPC_RESINFO, resinfo),
942 OPC(6, OPC_ATOMIC_ADD, atomic.add),
943 OPC(6, OPC_ATOMIC_SUB, atomic.sub),
944 OPC(6, OPC_ATOMIC_XCHG, atomic.xchg),
945 OPC(6, OPC_ATOMIC_INC, atomic.inc),
946 OPC(6, OPC_ATOMIC_DEC, atomic.dec),
947 OPC(6, OPC_ATOMIC_CMPXCHG, atomic.cmpxchg),
948 OPC(6, OPC_ATOMIC_MIN, atomic.min),
949 OPC(6, OPC_ATOMIC_MAX, atomic.max),
950 OPC(6, OPC_ATOMIC_AND, atomic.and),
951 OPC(6, OPC_ATOMIC_OR, atomic.or),
952 OPC(6, OPC_ATOMIC_XOR, atomic.xor),
953 OPC(6, OPC_LDGB, ldgb),
954 OPC(6, OPC_STGB, stgb),
955 OPC(6, OPC_STIB, stib),
956 OPC(6, OPC_LDC, ldc),
957 OPC(6, OPC_LDLV, ldlv),
958
959 OPC(7, OPC_BAR, bar),
960 OPC(7, OPC_FENCE, fence),
961
962 #undef OPC
963 };
964
965 #define GETINFO(instr) (&(opcs[((instr)->opc_cat << NOPC_BITS) | instr_opc(instr)]))
966
967 // XXX hack.. probably should move this table somewhere common:
968 #include "ir3.h"
969 const char *ir3_instr_name(struct ir3_instruction *instr)
970 {
971 if (opc_cat(instr->opc) == -1) return "??meta??";
972 return opcs[instr->opc].name;
973 }
974
975 static bool print_instr(struct disasm_ctx *ctx, uint32_t *dwords, int n)
976 {
977 instr_t *instr = (instr_t *)dwords;
978 uint32_t opc = instr_opc(instr);
979 const char *name;
980
981 if (debug & PRINT_VERBOSE)
982 fprintf(ctx->out, "%s%04d[%08xx_%08xx] ", levels[ctx->level], n, dwords[1], dwords[0]);
983
984 /* NOTE: order flags are printed is a bit fugly.. but for now I
985 * try to match the order in llvm-a3xx disassembler for easy
986 * diff'ing..
987 */
988
989 ctx->repeat = instr_repeat(instr);
990
991 if (instr->sync)
992 fprintf(ctx->out, "(sy)");
993 if (instr->ss && ((instr->opc_cat <= 4) || (instr->opc_cat == 7)))
994 fprintf(ctx->out, "(ss)");
995 if (instr->jmp_tgt)
996 fprintf(ctx->out, "(jp)");
997 if (instr_sat(instr))
998 fprintf(ctx->out, "(sat)");
999 if (ctx->repeat)
1000 fprintf(ctx->out, "(rpt%d)", ctx->repeat);
1001 if (instr->ul && ((2 <= instr->opc_cat) && (instr->opc_cat <= 4)))
1002 fprintf(ctx->out, "(ul)");
1003
1004 name = GETINFO(instr)->name;
1005
1006 if (name) {
1007 fprintf(ctx->out, "%s", name);
1008 GETINFO(instr)->print(ctx, instr);
1009 } else {
1010 fprintf(ctx->out, "unknown(%d,%d)", instr->opc_cat, opc);
1011 }
1012
1013 fprintf(ctx->out, "\n");
1014
1015 return (instr->opc_cat == 0) && (opc == OPC_END);
1016 }
1017
1018 int disasm_a3xx(uint32_t *dwords, int sizedwords, int level, FILE *out)
1019 {
1020 struct disasm_ctx ctx;
1021 int i;
1022
1023 assert((sizedwords % 2) == 0);
1024
1025 memset(&ctx, 0, sizeof(ctx));
1026 ctx.out = out;
1027 ctx.level = level;
1028
1029 for (i = 0; i < sizedwords; i += 2)
1030 print_instr(&ctx, &dwords[i], i/2);
1031
1032 return 0;
1033 }