src/gallium/drivers/freedreno/ir3/ir3_depth.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #include "util/u_math.h"
  30
  31 #include "ir3.h"
  32
  33 /*
  34  * Instruction Depth:
  35  *
  36  * Calculates weighted instruction depth, ie. the sum of # of needed
  37  * instructions plus delay slots back to original input (ie INPUT or
  38  * CONST).  That is to say, an instructions depth is:
  39  *
  40  *   depth(instr) {
  41  *     d = 0;
  42  *     // for each src register:
  43  *     foreach (src in instr->regs[1..n])
  44  *       d = max(d, delayslots(src->instr, n) + depth(src->instr));
  45  *     return d + 1;
  46  *   }
  47  *
  48  * After an instruction's depth is calculated, it is inserted into the
  49  * blocks depth sorted list, which is used by the scheduling pass.
  50  */
  51
  52 /* generally don't count false dependencies, since this can just be
  53  * something like a barrier, or SSBO store.  The exception is array
  54  * dependencies if the assigner is an array write and the consumer
  55  * reads the same array.
  56  */
  57 static bool
  58 ignore_dep(struct ir3_instruction *assigner,
  59                 struct ir3_instruction *consumer, unsigned n)
  60 {
  61         if (!__is_false_dep(consumer, n))
  62                 return false;
  63
  64         if (assigner->barrier_class & IR3_BARRIER_ARRAY_W) {
  65                 struct ir3_register *dst = assigner->regs[0];
  66                 struct ir3_register *src;
  67
  68                 debug_assert(dst->flags & IR3_REG_ARRAY);
  69
  70                 foreach_src(src, consumer) {
  71                         if ((src->flags & IR3_REG_ARRAY) &&
  72                                         (dst->array.id == src->array.id)) {
  73                                 return false;
  74                         }
  75                 }
  76         }
  77
  78         return true;
  79 }
  80
  81 /* calculate required # of delay slots between the instruction that
  82  * assigns a value and the one that consumes
  83  */
  84 int ir3_delayslots(struct ir3_instruction *assigner,
  85                 struct ir3_instruction *consumer, unsigned n)
  86 {
  87         if (ignore_dep(assigner, consumer, n))
  88                 return 0;
  89
  90         /* worst case is cat1-3 (alu) -> cat4/5 needing 6 cycles, normal
  91          * alu -> alu needs 3 cycles, cat4 -> alu and texture fetch
  92          * handled with sync bits
  93          */
  94
  95         if (is_meta(assigner))
  96                 return 0;
  97
  98         if (writes_addr(assigner))
  99                 return 6;
 100
 101         /* handled via sync flags: */
 102         if (is_sfu(assigner) || is_tex(assigner) || is_mem(assigner))
 103                 return 0;
 104
 105         /* assigner must be alu: */
 106         if (is_flow(consumer) || is_sfu(consumer) || is_tex(consumer) ||
 107                         is_mem(consumer)) {
 108                 return 6;
 109         } else if ((is_mad(consumer->opc) || is_madsh(consumer->opc)) &&
 110                         (n == 3)) {
 111                 /* special case, 3rd src to cat3 not required on first cycle */
 112                 return 1;
 113         } else {
 114                 return 3;
 115         }
 116 }
 117
 118 void
 119 ir3_insert_by_depth(struct ir3_instruction *instr, struct list_head *list)
 120 {
 121         /* remove from existing spot in list: */
 122         list_delinit(&instr->node);
 123
 124         /* find where to re-insert instruction: */
 125         list_for_each_entry (struct ir3_instruction, pos, list, node) {
 126                 if (pos->depth > instr->depth) {
 127                         list_add(&instr->node, &pos->node);
 128                         return;
 129                 }
 130         }
 131         /* if we get here, we didn't find an insertion spot: */
 132         list_addtail(&instr->node, list);
 133 }
 134
 135 static void
 136 ir3_instr_depth(struct ir3_instruction *instr, unsigned boost)
 137 {
 138         struct ir3_instruction *src;
 139
 140         /* if we've already visited this instruction, bail now: */
 141         if (ir3_instr_check_mark(instr))
 142                 return;
 143
 144         instr->depth = 0;
 145
 146         foreach_ssa_src_n(src, i, instr) {
 147                 unsigned sd;
 148
 149                 /* visit child to compute it's depth: */
 150                 ir3_instr_depth(src, boost);
 151
 152                 /* for array writes, no need to delay on previous write: */
 153                 if (i == 0)
 154                         continue;
 155
 156                 sd = ir3_delayslots(src, instr, i) + src->depth;
 157                 sd += boost;
 158
 159                 instr->depth = MAX2(instr->depth, sd);
 160         }
 161
 162         if (!is_meta(instr))
 163                 instr->depth++;
 164
 165         ir3_insert_by_depth(instr, &instr->block->instr_list);
 166 }
 167
 168 static void
 169 remove_unused_by_block(struct ir3_block *block)
 170 {
 171         list_for_each_entry_safe (struct ir3_instruction, instr, &block->instr_list, node) {
 172                 if (!ir3_instr_check_mark(instr)) {
 173                         if (instr->opc == OPC_END)
 174                                 continue;
 175                         /* mark it, in case it is input, so we can
 176                          * remove unused inputs:
 177                          */
 178                         instr->flags |= IR3_INSTR_UNUSED;
 179                         /* and remove from instruction list: */
 180                         list_delinit(&instr->node);
 181                 }
 182         }
 183 }
 184
 185 void
 186 ir3_depth(struct ir3 *ir)
 187 {
 188         unsigned i;
 189
 190         ir3_clear_mark(ir);
 191         for (i = 0; i < ir->noutputs; i++)
 192                 if (ir->outputs[i])
 193                         ir3_instr_depth(ir->outputs[i], 0);
 194
 195         list_for_each_entry (struct ir3_block, block, &ir->block_list, node) {
 196                 for (i = 0; i < block->keeps_count; i++)
 197                         ir3_instr_depth(block->keeps[i], 0);
 198
 199                 /* We also need to account for if-condition: */
 200                 if (block->condition)
 201                         ir3_instr_depth(block->condition, 6);
 202         }
 203
 204         /* mark un-used instructions: */
 205         list_for_each_entry (struct ir3_block, block, &ir->block_list, node) {
 206                 remove_unused_by_block(block);
 207         }
 208
 209         /* note that we can end up with unused indirects, but we should
 210          * not end up with unused predicates.
 211          */
 212         for (i = 0; i < ir->indirects_count; i++) {
 213                 struct ir3_instruction *instr = ir->indirects[i];
 214                 if (instr->flags & IR3_INSTR_UNUSED)
 215                         ir->indirects[i] = NULL;
 216         }
 217
 218         /* cleanup unused inputs: */
 219         for (i = 0; i < ir->ninputs; i++) {
 220                 struct ir3_instruction *in = ir->inputs[i];
 221                 if (in && (in->flags & IR3_INSTR_UNUSED))
 222                         ir->inputs[i] = NULL;
 223         }
 224 }