freedreno/ir3: relax restriction in grouping
[mesa.git] / src / gallium / drivers / freedreno / ir3 / ir3_depth.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "util/u_math.h"
30
31 #include "ir3.h"
32
33 /*
34 * Instruction Depth:
35 *
36 * Calculates weighted instruction depth, ie. the sum of # of needed
37 * instructions plus delay slots back to original input (ie INPUT or
38 * CONST). That is to say, an instructions depth is:
39 *
40 * depth(instr) {
41 * d = 0;
42 * // for each src register:
43 * foreach (src in instr->regs[1..n])
44 * d = max(d, delayslots(src->instr, n) + depth(src->instr));
45 * return d + 1;
46 * }
47 *
48 * After an instruction's depth is calculated, it is inserted into the
49 * blocks depth sorted list, which is used by the scheduling pass.
50 */
51
52 /* calculate required # of delay slots between the instruction that
53 * assigns a value and the one that consumes
54 */
55 int ir3_delayslots(struct ir3_instruction *assigner,
56 struct ir3_instruction *consumer, unsigned n)
57 {
58 /* worst case is cat1-3 (alu) -> cat4/5 needing 6 cycles, normal
59 * alu -> alu needs 3 cycles, cat4 -> alu and texture fetch
60 * handled with sync bits
61 */
62
63 if (is_meta(assigner))
64 return 0;
65
66 if (writes_addr(assigner))
67 return 6;
68
69 /* handled via sync flags: */
70 if (is_sfu(assigner) || is_tex(assigner) || is_mem(assigner))
71 return 0;
72
73 /* assigner must be alu: */
74 if (is_flow(consumer) || is_sfu(consumer) || is_tex(consumer) ||
75 is_mem(consumer)) {
76 return 6;
77 } else if ((is_mad(consumer->opc) || is_madsh(consumer->opc)) &&
78 (n == 3)) {
79 /* special case, 3rd src to cat3 not required on first cycle */
80 return 1;
81 } else {
82 return 3;
83 }
84 }
85
86 void
87 ir3_insert_by_depth(struct ir3_instruction *instr, struct list_head *list)
88 {
89 /* remove from existing spot in list: */
90 list_delinit(&instr->node);
91
92 /* find where to re-insert instruction: */
93 list_for_each_entry (struct ir3_instruction, pos, list, node) {
94 if (pos->depth > instr->depth) {
95 list_add(&instr->node, &pos->node);
96 return;
97 }
98 }
99 /* if we get here, we didn't find an insertion spot: */
100 list_addtail(&instr->node, list);
101 }
102
103 static void
104 ir3_instr_depth(struct ir3_instruction *instr)
105 {
106 struct ir3_instruction *src;
107
108 /* if we've already visited this instruction, bail now: */
109 if (ir3_instr_check_mark(instr))
110 return;
111
112 instr->depth = 0;
113
114 foreach_ssa_src_n(src, i, instr) {
115 unsigned sd;
116
117 /* visit child to compute it's depth: */
118 ir3_instr_depth(src);
119
120 /* for array writes, no need to delay on previous write: */
121 if (i == 0)
122 continue;
123
124 sd = ir3_delayslots(src, instr, i) + src->depth;
125
126 instr->depth = MAX2(instr->depth, sd);
127 }
128
129 if (!is_meta(instr))
130 instr->depth++;
131
132 ir3_insert_by_depth(instr, &instr->block->instr_list);
133 }
134
135 static void
136 remove_unused_by_block(struct ir3_block *block)
137 {
138 list_for_each_entry_safe (struct ir3_instruction, instr, &block->instr_list, node) {
139 if (!ir3_instr_check_mark(instr)) {
140 if (is_flow(instr) && (instr->opc == OPC_END))
141 continue;
142 /* mark it, in case it is input, so we can
143 * remove unused inputs:
144 */
145 instr->flags |= IR3_INSTR_UNUSED;
146 /* and remove from instruction list: */
147 list_delinit(&instr->node);
148 }
149 }
150 }
151
152 void
153 ir3_depth(struct ir3 *ir)
154 {
155 unsigned i;
156
157 ir3_clear_mark(ir);
158 for (i = 0; i < ir->noutputs; i++)
159 if (ir->outputs[i])
160 ir3_instr_depth(ir->outputs[i]);
161
162 for (i = 0; i < ir->keeps_count; i++)
163 ir3_instr_depth(ir->keeps[i]);
164
165 /* We also need to account for if-condition: */
166 list_for_each_entry (struct ir3_block, block, &ir->block_list, node) {
167 if (block->condition)
168 ir3_instr_depth(block->condition);
169 }
170
171 /* mark un-used instructions: */
172 list_for_each_entry (struct ir3_block, block, &ir->block_list, node) {
173 remove_unused_by_block(block);
174 }
175
176 /* note that we can end up with unused indirects, but we should
177 * not end up with unused predicates.
178 */
179 for (i = 0; i < ir->indirects_count; i++) {
180 struct ir3_instruction *instr = ir->indirects[i];
181 if (instr->flags & IR3_INSTR_UNUSED)
182 ir->indirects[i] = NULL;
183 }
184
185 /* cleanup unused inputs: */
186 for (i = 0; i < ir->ninputs; i++) {
187 struct ir3_instruction *in = ir->inputs[i];
188 if (in && (in->flags & IR3_INSTR_UNUSED))
189 ir->inputs[i] = NULL;
190 }
191 }