freedreno/ir3/cp: support to swap mad src's
[mesa.git] / src / gallium / drivers / freedreno / ir3 / ir3_depth.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "util/u_math.h"
30
31 #include "ir3.h"
32
33 /*
34 * Instruction Depth:
35 *
36 * Calculates weighted instruction depth, ie. the sum of # of needed
37 * instructions plus delay slots back to original input (ie INPUT or
38 * CONST). That is to say, an instructions depth is:
39 *
40 * depth(instr) {
41 * d = 0;
42 * // for each src register:
43 * foreach (src in instr->regs[1..n])
44 * d = max(d, delayslots(src->instr, n) + depth(src->instr));
45 * return d + 1;
46 * }
47 *
48 * After an instruction's depth is calculated, it is inserted into the
49 * blocks depth sorted list, which is used by the scheduling pass.
50 */
51
52 /* calculate required # of delay slots between the instruction that
53 * assigns a value and the one that consumes
54 */
55 int ir3_delayslots(struct ir3_instruction *assigner,
56 struct ir3_instruction *consumer, unsigned n)
57 {
58 /* worst case is cat1-3 (alu) -> cat4/5 needing 6 cycles, normal
59 * alu -> alu needs 3 cycles, cat4 -> alu and texture fetch
60 * handled with sync bits
61 */
62
63 if (is_meta(assigner))
64 return 0;
65
66 if (writes_addr(assigner))
67 return 6;
68
69 /* handled via sync flags: */
70 if (is_sfu(assigner) || is_tex(assigner) || is_mem(assigner))
71 return 0;
72
73 /* assigner must be alu: */
74 if (is_flow(consumer) || is_sfu(consumer) || is_tex(consumer)) {
75 return 6;
76 } else if ((consumer->category == 3) &&
77 (is_mad(consumer->opc) || is_madsh(consumer->opc)) &&
78 (n == 2)) {
79 /* special case, 3rd src to cat3 not required on first cycle */
80 return 1;
81 } else {
82 return 3;
83 }
84 }
85
86 static void insert_by_depth(struct ir3_instruction *instr)
87 {
88 struct ir3_block *block = instr->block;
89 struct ir3_instruction *n = block->head;
90 struct ir3_instruction *p = NULL;
91
92 while (n && (n != instr) && (n->depth > instr->depth)) {
93 p = n;
94 n = n->next;
95 }
96
97 instr->next = n;
98 if (p)
99 p->next = instr;
100 else
101 block->head = instr;
102 }
103
104 static void ir3_instr_depth(struct ir3_instruction *instr)
105 {
106 struct ir3_instruction *src;
107
108 /* if we've already visited this instruction, bail now: */
109 if (ir3_instr_check_mark(instr))
110 return;
111
112 instr->depth = 0;
113
114 foreach_ssa_src_n(src, i, instr) {
115 unsigned sd;
116
117 /* visit child to compute it's depth: */
118 ir3_instr_depth(src);
119
120 sd = ir3_delayslots(src, instr, i) + src->depth;
121
122 instr->depth = MAX2(instr->depth, sd);
123 }
124
125 /* meta-instructions don't add cycles, other than PHI.. which
126 * might translate to a real instruction..
127 *
128 * well, not entirely true, fan-in/out, etc might need to need
129 * to generate some extra mov's in edge cases, etc.. probably
130 * we might want to do depth calculation considering the worst
131 * case for these??
132 */
133 if (!is_meta(instr))
134 instr->depth++;
135
136 insert_by_depth(instr);
137 }
138
139 void ir3_block_depth(struct ir3_block *block)
140 {
141 unsigned i;
142
143 block->head = NULL;
144
145 ir3_clear_mark(block->shader);
146 for (i = 0; i < block->noutputs; i++)
147 if (block->outputs[i])
148 ir3_instr_depth(block->outputs[i]);
149
150 /* mark un-used instructions: */
151 for (i = 0; i < block->shader->instrs_count; i++) {
152 struct ir3_instruction *instr = block->shader->instrs[i];
153
154 /* just consider instructions within this block: */
155 if (instr->block != block)
156 continue;
157
158 if (!ir3_instr_check_mark(instr))
159 instr->depth = DEPTH_UNUSED;
160 }
161
162 /* cleanup unused inputs: */
163 for (i = 0; i < block->ninputs; i++) {
164 struct ir3_instruction *in = block->inputs[i];
165 if (in && (in->depth == DEPTH_UNUSED))
166 block->inputs[i] = NULL;
167 }
168 }