d5f42f2a231be72187e3cfb8fc79ad9a0651ad5c
[mesa.git] / src / gallium / drivers / freedreno / ir3 / ir3_nir.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29
30 #include "freedreno_util.h"
31
32 #include "ir3_nir.h"
33 #include "ir3_compiler.h"
34 #include "ir3_shader.h"
35
36 #include "nir/tgsi_to_nir.h"
37
38
39 static const nir_shader_compiler_options options = {
40 .lower_fpow = true,
41 .lower_scmp = true,
42 .lower_flrp32 = true,
43 .lower_flrp64 = true,
44 .lower_ffract = true,
45 .lower_fmod32 = true,
46 .lower_fmod64 = true,
47 .lower_fdiv = true,
48 .lower_ldexp = true,
49 .fuse_ffma = true,
50 .native_integers = true,
51 .vertex_id_zero_based = true,
52 .lower_extract_byte = true,
53 .lower_extract_word = true,
54 .lower_all_io_to_temps = true,
55 .lower_helper_invocation = true,
56 };
57
58 struct nir_shader *
59 ir3_tgsi_to_nir(const struct tgsi_token *tokens)
60 {
61 return tgsi_to_nir(tokens, &options);
62 }
63
64 const nir_shader_compiler_options *
65 ir3_get_compiler_options(struct ir3_compiler *compiler)
66 {
67 return &options;
68 }
69
70 /* for given shader key, are any steps handled in nir? */
71 bool
72 ir3_key_lowers_nir(const struct ir3_shader_key *key)
73 {
74 return key->fsaturate_s | key->fsaturate_t | key->fsaturate_r |
75 key->vsaturate_s | key->vsaturate_t | key->vsaturate_r |
76 key->ucp_enables | key->color_two_side |
77 key->fclamp_color | key->vclamp_color;
78 }
79
80 #define OPT(nir, pass, ...) ({ \
81 bool this_progress = false; \
82 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
83 this_progress; \
84 })
85
86 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
87
88 static void
89 ir3_optimize_loop(nir_shader *s)
90 {
91 bool progress;
92 do {
93 progress = false;
94
95 OPT_V(s, nir_lower_vars_to_ssa);
96 progress |= OPT(s, nir_opt_copy_prop_vars);
97 progress |= OPT(s, nir_opt_dead_write_vars);
98 progress |= OPT(s, nir_lower_alu_to_scalar);
99 progress |= OPT(s, nir_lower_phis_to_scalar);
100
101 progress |= OPT(s, nir_copy_prop);
102 progress |= OPT(s, nir_opt_dce);
103 progress |= OPT(s, nir_opt_cse);
104 static int gcm = -1;
105 if (gcm == -1)
106 gcm = env2u("GCM");
107 if (gcm == 1)
108 progress |= OPT(s, nir_opt_gcm, true);
109 else if (gcm == 2)
110 progress |= OPT(s, nir_opt_gcm, false);
111 progress |= OPT(s, nir_opt_peephole_select, 16);
112 progress |= OPT(s, nir_opt_intrinsics);
113 progress |= OPT(s, nir_opt_algebraic);
114 progress |= OPT(s, nir_opt_constant_folding);
115 progress |= OPT(s, nir_opt_dead_cf);
116 if (OPT(s, nir_opt_trivial_continues)) {
117 progress |= true;
118 /* If nir_opt_trivial_continues makes progress, then we need to clean
119 * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
120 * to make progress.
121 */
122 OPT(s, nir_copy_prop);
123 OPT(s, nir_opt_dce);
124 }
125 progress |= OPT(s, nir_opt_if);
126 progress |= OPT(s, nir_opt_remove_phis);
127 progress |= OPT(s, nir_opt_undef);
128
129 } while (progress);
130 }
131
132 struct nir_shader *
133 ir3_optimize_nir(struct ir3_shader *shader, nir_shader *s,
134 const struct ir3_shader_key *key)
135 {
136 struct nir_lower_tex_options tex_options = {
137 .lower_rect = 0,
138 };
139
140 if (key) {
141 switch (shader->type) {
142 case SHADER_FRAGMENT:
143 tex_options.saturate_s = key->fsaturate_s;
144 tex_options.saturate_t = key->fsaturate_t;
145 tex_options.saturate_r = key->fsaturate_r;
146 break;
147 case SHADER_VERTEX:
148 tex_options.saturate_s = key->vsaturate_s;
149 tex_options.saturate_t = key->vsaturate_t;
150 tex_options.saturate_r = key->vsaturate_r;
151 break;
152 default:
153 /* TODO */
154 break;
155 }
156 }
157
158 if (shader->compiler->gpu_id >= 400) {
159 /* a4xx seems to have *no* sam.p */
160 tex_options.lower_txp = ~0; /* lower all txp */
161 } else {
162 /* a3xx just needs to avoid sam.p for 3d tex */
163 tex_options.lower_txp = (1 << GLSL_SAMPLER_DIM_3D);
164 }
165
166 if (fd_mesa_debug & FD_DBG_DISASM) {
167 debug_printf("----------------------\n");
168 nir_print_shader(s, stdout);
169 debug_printf("----------------------\n");
170 }
171
172 OPT_V(s, nir_opt_global_to_local);
173 OPT_V(s, nir_lower_regs_to_ssa);
174
175 if (key) {
176 if (s->info.stage == MESA_SHADER_VERTEX) {
177 OPT_V(s, nir_lower_clip_vs, key->ucp_enables);
178 if (key->vclamp_color)
179 OPT_V(s, nir_lower_clamp_color_outputs);
180 } else if (s->info.stage == MESA_SHADER_FRAGMENT) {
181 OPT_V(s, nir_lower_clip_fs, key->ucp_enables);
182 if (key->fclamp_color)
183 OPT_V(s, nir_lower_clamp_color_outputs);
184 }
185 if (key->color_two_side) {
186 OPT_V(s, nir_lower_two_sided_color);
187 }
188 } else {
189 /* only want to do this the first time (when key is null)
190 * and not again on any potential 2nd variant lowering pass:
191 */
192 OPT_V(s, ir3_nir_apply_trig_workarounds);
193 }
194
195 OPT_V(s, nir_lower_tex, &tex_options);
196 OPT_V(s, nir_lower_load_const_to_scalar);
197 if (shader->compiler->gpu_id < 500)
198 OPT_V(s, ir3_nir_lower_tg4_to_tex);
199
200 ir3_optimize_loop(s);
201
202 /* do idiv lowering after first opt loop to give a chance for
203 * divide by immed power-of-two to be caught first:
204 */
205 if (OPT(s, nir_lower_idiv))
206 ir3_optimize_loop(s);
207
208 OPT_V(s, nir_remove_dead_variables, nir_var_local);
209
210 OPT_V(s, nir_move_load_const);
211
212 if (fd_mesa_debug & FD_DBG_DISASM) {
213 debug_printf("----------------------\n");
214 nir_print_shader(s, stdout);
215 debug_printf("----------------------\n");
216 }
217
218 nir_sweep(s);
219
220 return s;
221 }
222
223 void
224 ir3_nir_scan_driver_consts(nir_shader *shader,
225 struct ir3_driver_const_layout *layout)
226 {
227 nir_foreach_function(function, shader) {
228 if (!function->impl)
229 continue;
230
231 nir_foreach_block(block, function->impl) {
232 nir_foreach_instr(instr, block) {
233 if (instr->type != nir_instr_type_intrinsic)
234 continue;
235
236 nir_intrinsic_instr *intr =
237 nir_instr_as_intrinsic(instr);
238 unsigned idx;
239
240 switch (intr->intrinsic) {
241 case nir_intrinsic_get_buffer_size:
242 idx = nir_src_as_const_value(intr->src[0])->u32[0];
243 if (layout->ssbo_size.mask & (1 << idx))
244 break;
245 layout->ssbo_size.mask |= (1 << idx);
246 layout->ssbo_size.off[idx] =
247 layout->ssbo_size.count;
248 layout->ssbo_size.count += 1; /* one const per */
249 break;
250 case nir_intrinsic_image_deref_atomic_add:
251 case nir_intrinsic_image_deref_atomic_min:
252 case nir_intrinsic_image_deref_atomic_max:
253 case nir_intrinsic_image_deref_atomic_and:
254 case nir_intrinsic_image_deref_atomic_or:
255 case nir_intrinsic_image_deref_atomic_xor:
256 case nir_intrinsic_image_deref_atomic_exchange:
257 case nir_intrinsic_image_deref_atomic_comp_swap:
258 case nir_intrinsic_image_deref_store:
259 idx = nir_intrinsic_get_var(intr, 0)->data.driver_location;
260 if (layout->image_dims.mask & (1 << idx))
261 break;
262 layout->image_dims.mask |= (1 << idx);
263 layout->image_dims.off[idx] =
264 layout->image_dims.count;
265 layout->image_dims.count += 3; /* three const per */
266 break;
267 default:
268 break;
269 }
270 }
271 }
272 }
273 }