src/gallium/drivers/freedreno/ir3/ir3_nir.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29
  30 #include "freedreno_util.h"
  31
  32 #include "ir3_nir.h"
  33 #include "ir3_compiler.h"
  34 #include "ir3_shader.h"
  35
  36 #include "nir/tgsi_to_nir.h"
  37
  38 static const nir_shader_compiler_options options = {
  39                 .lower_fpow = true,
  40                 .lower_fsat = true,
  41                 .lower_scmp = true,
  42                 .lower_flrp32 = true,
  43                 .lower_flrp64 = true,
  44                 .lower_ffract = true,
  45                 .lower_fmod32 = true,
  46                 .lower_fmod64 = true,
  47                 .lower_fdiv = true,
  48                 .fuse_ffma = true,
  49                 .native_integers = true,
  50                 .vertex_id_zero_based = true,
  51                 .lower_extract_byte = true,
  52                 .lower_extract_word = true,
  53 };
  54
  55 struct nir_shader *
  56 ir3_tgsi_to_nir(const struct tgsi_token *tokens)
  57 {
  58         return tgsi_to_nir(tokens, &options);
  59 }
  60
  61 const nir_shader_compiler_options *
  62 ir3_get_compiler_options(struct ir3_compiler *compiler)
  63 {
  64         return &options;
  65 }
  66
  67 /* for given shader key, are any steps handled in nir? */
  68 bool
  69 ir3_key_lowers_nir(const struct ir3_shader_key *key)
  70 {
  71         return key->fsaturate_s | key->fsaturate_t | key->fsaturate_r |
  72                         key->vsaturate_s | key->vsaturate_t | key->vsaturate_r |
  73                         key->ucp_enables | key->color_two_side |
  74                         key->fclamp_color | key->vclamp_color;
  75 }
  76
  77 #define OPT(nir, pass, ...) ({                             \
  78    bool this_progress = false;                             \
  79    NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__);      \
  80    this_progress;                                          \
  81 })
  82
  83 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
  84
  85 static void
  86 ir3_optimize_loop(nir_shader *s)
  87 {
  88         bool progress;
  89         do {
  90                 progress = false;
  91
  92                 OPT_V(s, nir_lower_vars_to_ssa);
  93                 progress |= OPT(s, nir_opt_copy_prop_vars);
  94                 progress |= OPT(s, nir_lower_alu_to_scalar);
  95                 progress |= OPT(s, nir_lower_phis_to_scalar);
  96
  97                 progress |= OPT(s, nir_copy_prop);
  98                 progress |= OPT(s, nir_opt_dce);
  99                 progress |= OPT(s, nir_opt_cse);
 100                 progress |= OPT(s, ir3_nir_lower_if_else);
 101                 progress |= OPT(s, nir_opt_algebraic);
 102                 progress |= OPT(s, nir_opt_constant_folding);
 103
 104         } while (progress);
 105 }
 106
 107 struct nir_shader *
 108 ir3_optimize_nir(struct ir3_shader *shader, nir_shader *s,
 109                 const struct ir3_shader_key *key)
 110 {
 111         struct nir_lower_tex_options tex_options = {
 112                         .lower_rect = 0,
 113         };
 114
 115         if (key) {
 116                 switch (shader->type) {
 117                 case SHADER_FRAGMENT:
 118                         tex_options.saturate_s = key->fsaturate_s;
 119                         tex_options.saturate_t = key->fsaturate_t;
 120                         tex_options.saturate_r = key->fsaturate_r;
 121                         break;
 122                 case SHADER_VERTEX:
 123                         tex_options.saturate_s = key->vsaturate_s;
 124                         tex_options.saturate_t = key->vsaturate_t;
 125                         tex_options.saturate_r = key->vsaturate_r;
 126                         break;
 127                 default:
 128                         /* TODO */
 129                         break;
 130                 }
 131         }
 132
 133         if (shader->compiler->gpu_id >= 400) {
 134                 /* a4xx seems to have *no* sam.p */
 135                 tex_options.lower_txp = ~0;  /* lower all txp */
 136         } else {
 137                 /* a3xx just needs to avoid sam.p for 3d tex */
 138                 tex_options.lower_txp = (1 << GLSL_SAMPLER_DIM_3D);
 139         }
 140
 141         if (fd_mesa_debug & FD_DBG_DISASM) {
 142                 debug_printf("----------------------\n");
 143                 nir_print_shader(s, stdout);
 144                 debug_printf("----------------------\n");
 145         }
 146
 147         OPT_V(s, nir_opt_global_to_local);
 148         OPT_V(s, nir_lower_regs_to_ssa);
 149
 150         if (key) {
 151                 if (s->info.stage == MESA_SHADER_VERTEX) {
 152                         OPT_V(s, nir_lower_clip_vs, key->ucp_enables);
 153                         if (key->vclamp_color)
 154                                 OPT_V(s, nir_lower_clamp_color_outputs);
 155                 } else if (s->info.stage == MESA_SHADER_FRAGMENT) {
 156                         OPT_V(s, nir_lower_clip_fs, key->ucp_enables);
 157                         if (key->fclamp_color)
 158                                 OPT_V(s, nir_lower_clamp_color_outputs);
 159                 }
 160                 if (key->color_two_side) {
 161                         OPT_V(s, nir_lower_two_sided_color);
 162                 }
 163         } else {
 164                 /* only want to do this the first time (when key is null)
 165                  * and not again on any potential 2nd variant lowering pass:
 166                  */
 167                 OPT_V(s, ir3_nir_apply_trig_workarounds);
 168         }
 169
 170         OPT_V(s, nir_lower_tex, &tex_options);
 171         OPT_V(s, nir_lower_load_const_to_scalar);
 172         if (shader->compiler->gpu_id < 500)
 173                 OPT_V(s, ir3_nir_lower_tg4_to_tex);
 174
 175         ir3_optimize_loop(s);
 176
 177         /* do idiv lowering after first opt loop to give a chance for
 178          * divide by immed power-of-two to be caught first:
 179          */
 180         if (OPT(s, nir_lower_idiv))
 181                 ir3_optimize_loop(s);
 182
 183         OPT_V(s, nir_remove_dead_variables, nir_var_local);
 184
 185         if (fd_mesa_debug & FD_DBG_DISASM) {
 186                 debug_printf("----------------------\n");
 187                 nir_print_shader(s, stdout);
 188                 debug_printf("----------------------\n");
 189         }
 190
 191         nir_sweep(s);
 192
 193         return s;
 194 }
 195
 196 void
 197 ir3_nir_scan_driver_consts(nir_shader *shader,
 198                 struct ir3_driver_const_layout *layout)
 199 {
 200         nir_foreach_function(function, shader) {
 201                 if (!function->impl)
 202                         continue;
 203
 204                 nir_foreach_block(block, function->impl) {
 205                         nir_foreach_instr(instr, block) {
 206                                 if (instr->type != nir_instr_type_intrinsic)
 207                                         continue;
 208
 209                                 nir_intrinsic_instr *intr =
 210                                         nir_instr_as_intrinsic(instr);
 211                                 unsigned idx;
 212
 213                                 switch (intr->intrinsic) {
 214                                 case nir_intrinsic_get_buffer_size:
 215                                         idx = nir_src_as_const_value(intr->src[0])->u32[0];
 216                                         if (layout->ssbo_size.mask & (1 << idx))
 217                                                 break;
 218                                         layout->ssbo_size.mask |= (1 << idx);
 219                                         layout->ssbo_size.off[idx] =
 220                                                 layout->ssbo_size.count;
 221                                         layout->ssbo_size.count += 1; /* one const per */
 222                                         break;
 223                                 case nir_intrinsic_image_store:
 224                                         idx = intr->variables[0]->var->data.driver_location;
 225                                         if (layout->image_dims.mask & (1 << idx))
 226                                                 break;
 227                                         layout->image_dims.mask |= (1 << idx);
 228                                         layout->ssbo_size.off[idx] =
 229                                                 layout->image_dims.count;
 230                                         layout->image_dims.count += 3; /* three const per */
 231                                         break;
 232                                 default:
 233                                         break;
 234                                 }
 235                         }
 236                 }
 237         }
 238 }