freedreno: add adreno 420 support
[mesa.git] / src / gallium / drivers / freedreno / ir3 / ir3_shader.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_inlines.h"
33 #include "util/u_format.h"
34 #include "tgsi/tgsi_dump.h"
35 #include "tgsi/tgsi_parse.h"
36
37 #include "freedreno_context.h"
38 #include "freedreno_util.h"
39
40 #include "ir3_shader.h"
41 #include "ir3_compiler.h"
42
43
44 static void
45 delete_variant(struct ir3_shader_variant *v)
46 {
47 if (v->ir)
48 ir3_destroy(v->ir);
49 fd_bo_del(v->bo);
50 free(v);
51 }
52
53 static void
54 assemble_variant(struct ir3_shader_variant *v)
55 {
56 struct fd_context *ctx = fd_context(v->shader->pctx);
57 uint32_t sz, *bin;
58
59 bin = ir3_assemble(v->ir, &v->info, ctx->screen->gpu_id);
60 sz = v->info.sizedwords * 4;
61
62 v->bo = fd_bo_new(ctx->dev, sz,
63 DRM_FREEDRENO_GEM_CACHE_WCOMBINE |
64 DRM_FREEDRENO_GEM_TYPE_KMEM);
65
66 memcpy(fd_bo_map(v->bo), bin, sz);
67
68 free(bin);
69
70 if (ctx->screen->gpu_id >= 400) {
71 v->instrlen = v->info.sizedwords / (2 * 16);
72 } else {
73 v->instrlen = v->info.sizedwords / (2 * 4);
74 }
75
76 /* NOTE: if relative addressing is used, we set constlen in
77 * the compiler (to worst-case value) since we don't know in
78 * the assembler what the max addr reg value can be:
79 */
80 v->constlen = MAX2(v->constlen, v->info.max_const + 1);
81
82 /* no need to keep the ir around beyond this point: */
83 ir3_destroy(v->ir);
84 v->ir = NULL;
85 }
86
87 /* for vertex shader, the inputs are loaded into registers before the shader
88 * is executed, so max_regs from the shader instructions might not properly
89 * reflect the # of registers actually used:
90 */
91 static void
92 fixup_vp_regfootprint(struct ir3_shader_variant *v)
93 {
94 unsigned i;
95 for (i = 0; i < v->inputs_count; i++) {
96 if (v->inputs[i].compmask) {
97 int32_t regid = (v->inputs[i].regid + 3) >> 2;
98 v->info.max_reg = MAX2(v->info.max_reg, regid);
99 }
100 }
101 for (i = 0; i < v->outputs_count; i++) {
102 int32_t regid = (v->outputs[i].regid + 3) >> 2;
103 v->info.max_reg = MAX2(v->info.max_reg, regid);
104 }
105 }
106
107 /* reset before attempting to compile again.. */
108 static void reset_variant(struct ir3_shader_variant *v, const char *msg)
109 {
110 debug_error(msg);
111 v->inputs_count = 0;
112 v->outputs_count = 0;
113 v->total_in = 0;
114 v->has_samp = false;
115 v->immediates_count = 0;
116 }
117
118 static struct ir3_shader_variant *
119 create_variant(struct ir3_shader *shader, struct ir3_shader_key key)
120 {
121 struct ir3_shader_variant *v = CALLOC_STRUCT(ir3_shader_variant);
122 const struct tgsi_token *tokens = shader->tokens;
123 int ret;
124
125 if (!v)
126 return NULL;
127
128 v->shader = shader;
129 v->key = key;
130 v->type = shader->type;
131
132 if (fd_mesa_debug & FD_DBG_DISASM) {
133 DBG("dump tgsi: type=%d, k={bp=%u,cts=%u,hp=%u}", shader->type,
134 key.binning_pass, key.color_two_side, key.half_precision);
135 tgsi_dump(tokens, 0);
136 }
137
138 if (!(fd_mesa_debug & FD_DBG_NOOPT)) {
139 ret = ir3_compile_shader(v, tokens, key, true);
140 if (ret) {
141 reset_variant(v, "new compiler failed, trying without copy propagation!");
142 ret = ir3_compile_shader(v, tokens, key, false);
143 if (ret)
144 reset_variant(v, "new compiler failed, trying fallback!");
145 }
146 } else {
147 ret = -1; /* force fallback to old compiler */
148 }
149
150 if (ret)
151 ret = ir3_compile_shader_old(v, tokens, key);
152
153 if (ret) {
154 debug_error("compile failed!");
155 goto fail;
156 }
157
158 assemble_variant(v);
159 if (!v->bo) {
160 debug_error("assemble failed!");
161 goto fail;
162 }
163
164 if (shader->type == SHADER_VERTEX)
165 fixup_vp_regfootprint(v);
166
167 if (fd_mesa_debug & FD_DBG_DISASM) {
168 DBG("disassemble: type=%d, k={bp=%u,cts=%u,hp=%u}", v->type,
169 key.binning_pass, key.color_two_side, key.half_precision);
170 disasm_a3xx(fd_bo_map(v->bo), v->info.sizedwords, 0, v->type);
171 }
172
173 return v;
174
175 fail:
176 delete_variant(v);
177 return NULL;
178 }
179
180 struct ir3_shader_variant *
181 ir3_shader_variant(struct ir3_shader *shader, struct ir3_shader_key key)
182 {
183 struct ir3_shader_variant *v;
184
185 /* some shader key values only apply to vertex or frag shader,
186 * so normalize the key to avoid constructing multiple identical
187 * variants:
188 */
189 switch (shader->type) {
190 case SHADER_FRAGMENT:
191 case SHADER_COMPUTE:
192 key.binning_pass = false;
193 if (key.has_per_samp) {
194 key.vsaturate_s = 0;
195 key.vsaturate_t = 0;
196 key.vsaturate_r = 0;
197 }
198 break;
199 case SHADER_VERTEX:
200 key.color_two_side = false;
201 key.half_precision = false;
202 key.alpha = false;
203 if (key.has_per_samp) {
204 key.fsaturate_s = 0;
205 key.fsaturate_t = 0;
206 key.fsaturate_r = 0;
207 }
208 break;
209 }
210
211 for (v = shader->variants; v; v = v->next)
212 if (ir3_shader_key_equal(&key, &v->key))
213 return v;
214
215 /* compile new variant if it doesn't exist already: */
216 v = create_variant(shader, key);
217 v->next = shader->variants;
218 shader->variants = v;
219
220 return v;
221 }
222
223
224 void
225 ir3_shader_destroy(struct ir3_shader *shader)
226 {
227 struct ir3_shader_variant *v, *t;
228 for (v = shader->variants; v; ) {
229 t = v;
230 v = v->next;
231 delete_variant(t);
232 }
233 free((void *)shader->tokens);
234 free(shader);
235 }
236
237 struct ir3_shader *
238 ir3_shader_create(struct pipe_context *pctx, const struct tgsi_token *tokens,
239 enum shader_t type)
240 {
241 struct ir3_shader *shader = CALLOC_STRUCT(ir3_shader);
242 shader->pctx = pctx;
243 shader->type = type;
244 shader->tokens = tgsi_dup_tokens(tokens);
245 return shader;
246 }