1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 * Rob Clark <robclark@freedesktop.org>
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_inlines.h"
33 #include "util/u_format.h"
34 #include "tgsi/tgsi_dump.h"
35 #include "tgsi/tgsi_parse.h"
37 #include "freedreno_context.h"
38 #include "freedreno_util.h"
40 #include "ir3_shader.h"
41 #include "ir3_compiler.h"
45 delete_variant(struct ir3_shader_variant
*v
)
53 /* for vertex shader, the inputs are loaded into registers before the shader
54 * is executed, so max_regs from the shader instructions might not properly
55 * reflect the # of registers actually used, especially in case passthrough
58 * Likewise, for fragment shader, we can have some regs which are passed
59 * input values but never touched by the resulting shader (ie. as result
60 * of dead code elimination or simply because we don't know how to turn
64 fixup_regfootprint(struct ir3_shader_variant
*v
)
66 if (v
->type
== SHADER_VERTEX
) {
68 for (i
= 0; i
< v
->inputs_count
; i
++) {
69 /* skip frag inputs fetch via bary.f since their reg's are
70 * not written by gpu before shader starts (and in fact the
71 * regid's might not even be valid)
73 if (v
->inputs
[i
].bary
)
76 if (v
->inputs
[i
].compmask
) {
77 int32_t regid
= (v
->inputs
[i
].regid
+ 3) >> 2;
78 v
->info
.max_reg
= MAX2(v
->info
.max_reg
, regid
);
81 for (i
= 0; i
< v
->outputs_count
; i
++) {
82 int32_t regid
= (v
->outputs
[i
].regid
+ 3) >> 2;
83 v
->info
.max_reg
= MAX2(v
->info
.max_reg
, regid
);
85 } else if (v
->type
== SHADER_FRAGMENT
) {
86 /* NOTE: not sure how to turn pos_regid off.. but this could
87 * be, for example, r1.x while max reg used by the shader is
88 * r0.*, in which case we need to fixup the reg footprint:
90 v
->info
.max_reg
= MAX2(v
->info
.max_reg
, v
->pos_regid
>> 2);
92 debug_assert(v
->info
.max_reg
>= 0); /* hard coded r0.x */
94 debug_assert(v
->info
.max_half_reg
>= 0); /* hr0.x */
98 /* wrapper for ir3_assemble() which does some info fixup based on
99 * shader state. Non-static since used by ir3_cmdline too.
101 void * ir3_shader_assemble(struct ir3_shader_variant
*v
, uint32_t gpu_id
)
105 bin
= ir3_assemble(v
->ir
, &v
->info
, gpu_id
);
110 v
->instrlen
= v
->info
.sizedwords
/ (2 * 16);
112 v
->instrlen
= v
->info
.sizedwords
/ (2 * 4);
115 /* NOTE: if relative addressing is used, we set constlen in
116 * the compiler (to worst-case value) since we don't know in
117 * the assembler what the max addr reg value can be:
119 v
->constlen
= MIN2(255, MAX2(v
->constlen
, v
->info
.max_const
+ 1));
121 fixup_regfootprint(v
);
127 assemble_variant(struct ir3_shader_variant
*v
)
129 struct fd_context
*ctx
= fd_context(v
->shader
->pctx
);
130 uint32_t gpu_id
= v
->shader
->compiler
->gpu_id
;
133 bin
= ir3_shader_assemble(v
, gpu_id
);
134 sz
= v
->info
.sizedwords
* 4;
136 v
->bo
= fd_bo_new(ctx
->dev
, sz
,
137 DRM_FREEDRENO_GEM_CACHE_WCOMBINE
|
138 DRM_FREEDRENO_GEM_TYPE_KMEM
);
140 memcpy(fd_bo_map(v
->bo
), bin
, sz
);
144 /* no need to keep the ir around beyond this point: */
149 static struct ir3_shader_variant
*
150 create_variant(struct ir3_shader
*shader
, struct ir3_shader_key key
)
152 struct ir3_shader_variant
*v
= CALLOC_STRUCT(ir3_shader_variant
);
153 const struct tgsi_token
*tokens
= shader
->tokens
;
161 v
->type
= shader
->type
;
163 if (fd_mesa_debug
& FD_DBG_DISASM
) {
164 DBG("dump tgsi: type=%d, k={bp=%u,cts=%u,hp=%u}", shader
->type
,
165 key
.binning_pass
, key
.color_two_side
, key
.half_precision
);
166 tgsi_dump(tokens
, 0);
169 ret
= ir3_compile_shader_nir(shader
->compiler
, v
, tokens
, key
);
171 debug_error("compile failed!");
177 debug_error("assemble failed!");
181 if (fd_mesa_debug
& FD_DBG_DISASM
) {
182 DBG("disassemble: type=%d, k={bp=%u,cts=%u,hp=%u}", v
->type
,
183 key
.binning_pass
, key
.color_two_side
, key
.half_precision
);
184 disasm_a3xx(fd_bo_map(v
->bo
), v
->info
.sizedwords
, 0, v
->type
);
194 struct ir3_shader_variant
*
195 ir3_shader_variant(struct ir3_shader
*shader
, struct ir3_shader_key key
)
197 struct ir3_shader_variant
*v
;
199 /* some shader key values only apply to vertex or frag shader,
200 * so normalize the key to avoid constructing multiple identical
203 switch (shader
->type
) {
204 case SHADER_FRAGMENT
:
206 key
.binning_pass
= false;
207 if (key
.has_per_samp
) {
214 key
.color_two_side
= false;
215 key
.half_precision
= false;
216 key
.rasterflat
= false;
217 if (key
.has_per_samp
) {
225 for (v
= shader
->variants
; v
; v
= v
->next
)
226 if (ir3_shader_key_equal(&key
, &v
->key
))
229 /* compile new variant if it doesn't exist already: */
230 v
= create_variant(shader
, key
);
231 v
->next
= shader
->variants
;
232 shader
->variants
= v
;
239 ir3_shader_destroy(struct ir3_shader
*shader
)
241 struct ir3_shader_variant
*v
, *t
;
242 for (v
= shader
->variants
; v
; ) {
247 free((void *)shader
->tokens
);
252 ir3_shader_create(struct pipe_context
*pctx
, const struct tgsi_token
*tokens
,
255 struct ir3_shader
*shader
= CALLOC_STRUCT(ir3_shader
);
256 shader
->compiler
= fd_context(pctx
)->screen
->compiler
;
259 shader
->tokens
= tgsi_dup_tokens(tokens
);