src/gallium/drivers/freedreno/ir3/ir3_shader.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef IR3_SHADER_H_
  30 #define IR3_SHADER_H_
  31
  32 #include "pipe/p_state.h"
  33
  34 #include "ir3.h"
  35 #include "disasm.h"
  36
  37 typedef uint16_t ir3_semantic;  /* semantic name + index */
  38 static inline ir3_semantic
  39 ir3_semantic_name(uint8_t name, uint16_t index)
  40 {
  41         return (name << 8) | (index & 0xff);
  42 }
  43
  44 static inline uint8_t sem2name(ir3_semantic sem)
  45 {
  46         return sem >> 8;
  47 }
  48
  49 static inline uint16_t sem2idx(ir3_semantic sem)
  50 {
  51         return sem & 0xff;
  52 }
  53
  54 /* Configuration key used to identify a shader variant.. different
  55  * shader variants can be used to implement features not supported
  56  * in hw (two sided color), binning-pass vertex shader, etc.
  57  */
  58 struct ir3_shader_key {
  59         union {
  60                 struct {
  61                         /* do we need to check {v,f}saturate_{s,t,r}? */
  62                         unsigned has_per_samp : 1;
  63
  64                         /*
  65                          * Vertex shader variant parameters:
  66                          */
  67                         unsigned binning_pass : 1;
  68
  69                         /*
  70                          * Fragment shader variant parameters:
  71                          */
  72                         unsigned color_two_side : 1;
  73                         unsigned half_precision : 1;
  74                         /* used when shader needs to handle flat varyings (a4xx),
  75                          * for TGSI_INTERPOLATE_COLOR:
  76                          */
  77                         unsigned rasterflat : 1;
  78                 };
  79                 uint32_t global;
  80         };
  81
  82         /* bitmask of sampler which needs coords clamped for vertex
  83          * shader:
  84          */
  85         uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
  86
  87         /* bitmask of sampler which needs coords clamped for frag
  88          * shader:
  89          */
  90         uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
  91 };
  92
  93 static inline bool
  94 ir3_shader_key_equal(struct ir3_shader_key *a, struct ir3_shader_key *b)
  95 {
  96         /* slow-path if we need to check {v,f}saturate_{s,t,r} */
  97         if (a->has_per_samp || b->has_per_samp)
  98                 return memcmp(a, b, sizeof(struct ir3_shader_key)) == 0;
  99         return a->global == b->global;
 100 }
 101
 102 struct ir3_shader_variant {
 103         struct fd_bo *bo;
 104
 105         /* variant id (for debug) */
 106         uint32_t id;
 107
 108         struct ir3_shader_key key;
 109
 110         struct ir3_info info;
 111         struct ir3 *ir;
 112
 113         /* the instructions length is in units of instruction groups
 114          * (4 instructions for a3xx, 16 instructions for a4xx.. each
 115          * instruction is 2 dwords):
 116          */
 117         unsigned instrlen;
 118
 119         /* the constants length is in units of vec4's, and is the sum of
 120          * the uniforms and the built-in compiler constants
 121          */
 122         unsigned constlen;
 123
 124         /* About Linkage:
 125          *   + Let the frag shader determine the position/compmask for the
 126          *     varyings, since it is the place where we know if the varying
 127          *     is actually used, and if so, which components are used.  So
 128          *     what the hw calls "outloc" is taken from the "inloc" of the
 129          *     frag shader.
 130          *   + From the vert shader, we only need the output regid
 131          */
 132
 133         /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
 134          * to bary.f instructions
 135          */
 136         uint8_t pos_regid;
 137         bool frag_coord, frag_face, color0_mrt;
 138
 139         /* varyings/outputs: */
 140         unsigned outputs_count;
 141         struct {
 142                 ir3_semantic semantic;
 143                 uint8_t regid;
 144         } outputs[16 + 2];  /* +POSITION +PSIZE */
 145         bool writes_pos, writes_psize;
 146
 147         /* vertices/inputs: */
 148         unsigned inputs_count;
 149         struct {
 150                 ir3_semantic semantic;
 151                 uint8_t regid;
 152                 uint8_t compmask;
 153                 uint8_t ncomp;
 154                 /* In theory inloc of fs should match outloc of vs.  Or
 155                  * rather the outloc of the vs is 8 plus the offset passed
 156                  * to bary.f.  Presumably that +8 is to account for
 157                  * gl_Position/gl_PointSize?
 158                  *
 159                  * NOTE inloc is currently aligned to 4 (we don't try
 160                  * to pack varyings).  Changing this would likely break
 161                  * assumptions in few places (like setting up of flat
 162                  * shading in fd3_program) so be sure to check all the
 163                  * spots where inloc is used.
 164                  */
 165                 uint8_t inloc;
 166                 uint8_t bary;
 167                 uint8_t interpolate;
 168         } inputs[16 + 2];  /* +POSITION +FACE */
 169
 170         unsigned total_in;       /* sum of inputs (scalar) */
 171
 172         /* do we have one or more texture sample instructions: */
 173         bool has_samp;
 174
 175         /* do we have kill instructions: */
 176         bool has_kill;
 177
 178         /* const reg # of first immediate, ie. 1 == c1
 179          * (not regid, because TGSI thinks in terms of vec4 registers,
 180          * not scalar registers)
 181          */
 182         unsigned first_driver_param;
 183         unsigned first_immediate;
 184         unsigned immediates_count;
 185         struct {
 186                 uint32_t val[4];
 187         } immediates[64];
 188
 189         /* shader variants form a linked list: */
 190         struct ir3_shader_variant *next;
 191
 192         /* replicated here to avoid passing extra ptrs everywhere: */
 193         enum shader_t type;
 194         struct ir3_shader *shader;
 195 };
 196
 197 struct ir3_shader {
 198         enum shader_t type;
 199
 200         /* shader id (for debug): */
 201         uint32_t id;
 202         uint32_t variant_count;
 203
 204         struct ir3_compiler *compiler;
 205
 206         struct pipe_context *pctx;
 207         const struct tgsi_token *tokens;
 208         struct pipe_stream_output_info stream_output;
 209
 210         struct ir3_shader_variant *variants;
 211
 212         /* so far, only used for blit_prog shader.. values for
 213          * VPC_VARYING_PS_REPL[i].MODE
 214          */
 215         uint32_t vpsrepl[8];
 216 };
 217
 218 void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id);
 219
 220 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 221                 const struct pipe_shader_state *cso, enum shader_t type);
 222 void ir3_shader_destroy(struct ir3_shader *shader);
 223 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 224                 struct ir3_shader_key key);
 225 void ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin);
 226
 227 static inline const char *
 228 ir3_shader_stage(struct ir3_shader *shader)
 229 {
 230         switch (shader->type) {
 231         case SHADER_VERTEX:     return "VERT";
 232         case SHADER_FRAGMENT:   return "FRAG";
 233         case SHADER_COMPUTE:    return "CL";
 234         default:
 235                 unreachable("invalid type");
 236                 return NULL;
 237         }
 238 }
 239
 240 /*
 241  * Helper/util:
 242  */
 243
 244 #include "pipe/p_shader_tokens.h"
 245
 246 static inline int
 247 ir3_find_output(const struct ir3_shader_variant *so, ir3_semantic semantic)
 248 {
 249         int j;
 250
 251         for (j = 0; j < so->outputs_count; j++)
 252                 if (so->outputs[j].semantic == semantic)
 253                         return j;
 254
 255         /* it seems optional to have a OUT.BCOLOR[n] for each OUT.COLOR[n]
 256          * in the vertex shader.. but the fragment shader doesn't know this
 257          * so  it will always have both IN.COLOR[n] and IN.BCOLOR[n].  So
 258          * at link time if there is no matching OUT.BCOLOR[n], we must map
 259          * OUT.COLOR[n] to IN.BCOLOR[n].  And visa versa if there is only
 260          * a OUT.BCOLOR[n] but no matching OUT.COLOR[n]
 261          */
 262         if (sem2name(semantic) == TGSI_SEMANTIC_BCOLOR) {
 263                 unsigned idx = sem2idx(semantic);
 264                 semantic = ir3_semantic_name(TGSI_SEMANTIC_COLOR, idx);
 265         } else if (sem2name(semantic) == TGSI_SEMANTIC_COLOR) {
 266                 unsigned idx = sem2idx(semantic);
 267                 semantic = ir3_semantic_name(TGSI_SEMANTIC_BCOLOR, idx);
 268         } else {
 269                 return 0;
 270         }
 271
 272         for (j = 0; j < so->outputs_count; j++)
 273                 if (so->outputs[j].semantic == semantic)
 274                         return j;
 275
 276         debug_assert(0);
 277
 278         return 0;
 279 }
 280
 281 static inline int
 282 ir3_next_varying(const struct ir3_shader_variant *so, int i)
 283 {
 284         while (++i < so->inputs_count)
 285                 if (so->inputs[i].compmask && so->inputs[i].bary)
 286                         break;
 287         return i;
 288 }
 289
 290 static inline uint32_t
 291 ir3_find_output_regid(const struct ir3_shader_variant *so, ir3_semantic semantic)
 292 {
 293         int j;
 294         for (j = 0; j < so->outputs_count; j++)
 295                 if (so->outputs[j].semantic == semantic)
 296                         return so->outputs[j].regid;
 297         return regid(63, 0);
 298 }
 299
 300 #endif /* IR3_SHADER_H_ */