freedreno/a3xx: disable early-z when we have kill's
[mesa.git] / src / gallium / drivers / freedreno / ir3 / ir3_shader.h
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #ifndef IR3_SHADER_H_
30 #define IR3_SHADER_H_
31
32 #include "ir3.h"
33 #include "disasm.h"
34
35 typedef uint16_t ir3_semantic; /* semantic name + index */
36 static inline ir3_semantic
37 ir3_semantic_name(uint8_t name, uint16_t index)
38 {
39 return (name << 8) | (index & 0xff);
40 }
41
42 static inline uint8_t sem2name(ir3_semantic sem)
43 {
44 return sem >> 8;
45 }
46
47 static inline uint16_t sem2idx(ir3_semantic sem)
48 {
49 return sem & 0xff;
50 }
51
52 /* Configuration key used to identify a shader variant.. different
53 * shader variants can be used to implement features not supported
54 * in hw (two sided color), binning-pass vertex shader, etc.
55 */
56 struct ir3_shader_key {
57 union {
58 struct {
59 /* do we need to check {v,f}saturate_{s,t,r}? */
60 unsigned has_per_samp : 1;
61
62 /*
63 * Vertex shader variant parameters:
64 */
65 unsigned binning_pass : 1;
66
67 /*
68 * Fragment shader variant parameters:
69 */
70 unsigned color_two_side : 1;
71 unsigned half_precision : 1;
72 /* For rendering to alpha, we need a bit of special handling
73 * since the hw always takes gl_FragColor starting from x
74 * component, rather than figuring out to take the w component.
75 * We could be more clever and generate variants for other
76 * render target formats (ie. luminance formats are xxx1), but
77 * let's start with this and see how it goes:
78 */
79 unsigned alpha : 1;
80 };
81 uint32_t global;
82 };
83
84 /* bitmask of sampler which needs coords clamped for vertex
85 * shader:
86 */
87 uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
88
89 /* bitmask of sampler which needs coords clamped for frag
90 * shader:
91 */
92 uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
93
94 };
95
96 static inline bool
97 ir3_shader_key_equal(struct ir3_shader_key *a, struct ir3_shader_key *b)
98 {
99 /* slow-path if we need to check {v,f}saturate_{s,t,r} */
100 if (a->has_per_samp || b->has_per_samp)
101 return memcmp(a, b, sizeof(struct ir3_shader_key)) == 0;
102 return a->global == b->global;
103 }
104
105 struct ir3_shader_variant {
106 struct fd_bo *bo;
107
108 struct ir3_shader_key key;
109
110 struct ir3_info info;
111 struct ir3 *ir;
112
113 /* the instructions length is in units of instruction groups
114 * (4 instructions, 8 dwords):
115 */
116 unsigned instrlen;
117
118 /* the constants length is in units of vec4's, and is the sum of
119 * the uniforms and the built-in compiler constants
120 */
121 unsigned constlen;
122
123 /* About Linkage:
124 * + Let the frag shader determine the position/compmask for the
125 * varyings, since it is the place where we know if the varying
126 * is actually used, and if so, which components are used. So
127 * what the hw calls "outloc" is taken from the "inloc" of the
128 * frag shader.
129 * + From the vert shader, we only need the output regid
130 */
131
132 /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
133 * to bary.f instructions
134 */
135 uint8_t pos_regid;
136 bool frag_coord, frag_face;
137
138 /* varyings/outputs: */
139 unsigned outputs_count;
140 struct {
141 ir3_semantic semantic;
142 uint8_t regid;
143 } outputs[16 + 2]; /* +POSITION +PSIZE */
144 bool writes_pos, writes_psize;
145
146 /* vertices/inputs: */
147 unsigned inputs_count;
148 struct {
149 ir3_semantic semantic;
150 uint8_t regid;
151 uint8_t compmask;
152 uint8_t ncomp;
153 /* In theory inloc of fs should match outloc of vs. Or
154 * rather the outloc of the vs is 8 plus the offset passed
155 * to bary.f. Presumably that +8 is to account for
156 * gl_Position/gl_PointSize?
157 *
158 * NOTE inloc is currently aligned to 4 (we don't try
159 * to pack varyings). Changing this would likely break
160 * assumptions in few places (like setting up of flat
161 * shading in fd3_program) so be sure to check all the
162 * spots where inloc is used.
163 */
164 uint8_t inloc;
165 uint8_t bary;
166 uint8_t interpolate;
167 } inputs[16 + 2]; /* +POSITION +FACE */
168
169 unsigned total_in; /* sum of inputs (scalar) */
170
171 /* do we have one or more texture sample instructions: */
172 bool has_samp;
173
174 /* do we have kill instructions: */
175 bool has_kill;
176
177 /* const reg # of first immediate, ie. 1 == c1
178 * (not regid, because TGSI thinks in terms of vec4 registers,
179 * not scalar registers)
180 */
181 unsigned first_immediate;
182 unsigned immediates_count;
183 struct {
184 uint32_t val[4];
185 } immediates[64];
186
187 /* shader variants form a linked list: */
188 struct ir3_shader_variant *next;
189
190 /* replicated here to avoid passing extra ptrs everywhere: */
191 enum shader_t type;
192 struct ir3_shader *shader;
193 };
194
195 struct ir3_shader {
196 enum shader_t type;
197
198 struct pipe_context *pctx;
199 const struct tgsi_token *tokens;
200
201 struct ir3_shader_variant *variants;
202
203 /* so far, only used for blit_prog shader.. values for
204 * VPC_VARYING_PS_REPL[i].MODE
205 */
206 uint32_t vpsrepl[4];
207 };
208
209
210 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
211 const struct tgsi_token *tokens, enum shader_t type);
212 void ir3_shader_destroy(struct ir3_shader *shader);
213
214 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
215 struct ir3_shader_key key);
216
217 #endif /* IR3_SHADER_H_ */