src/gallium/drivers/freedreno/ir3/ir3_shader.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef IR3_SHADER_H_
  30 #define IR3_SHADER_H_
  31
  32 #include "ir3.h"
  33 #include "disasm.h"
  34
  35 typedef uint16_t ir3_semantic;  /* semantic name + index */
  36 static inline ir3_semantic
  37 ir3_semantic_name(uint8_t name, uint16_t index)
  38 {
  39         return (name << 8) | (index & 0xff);
  40 }
  41
  42 static inline uint8_t sem2name(ir3_semantic sem)
  43 {
  44         return sem >> 8;
  45 }
  46
  47 static inline uint16_t sem2idx(ir3_semantic sem)
  48 {
  49         return sem & 0xff;
  50 }
  51
  52 /* Configuration key used to identify a shader variant.. different
  53  * shader variants can be used to implement features not supported
  54  * in hw (two sided color), binning-pass vertex shader, etc.
  55  */
  56 struct ir3_shader_key {
  57         union {
  58                 struct {
  59                         /* do we need to check {v,f}saturate_{s,t,r}? */
  60                         unsigned has_per_samp : 1;
  61
  62                         /*
  63                          * Vertex shader variant parameters:
  64                          */
  65                         unsigned binning_pass : 1;
  66
  67                         /*
  68                          * Fragment shader variant parameters:
  69                          */
  70                         unsigned color_two_side : 1;
  71                         unsigned half_precision : 1;
  72                         /* used when shader needs to handle flat varyings (a4xx),
  73                          * for TGSI_INTERPOLATE_COLOR:
  74                          */
  75                         unsigned rasterflat : 1;
  76                 };
  77                 uint32_t global;
  78         };
  79
  80         /* bitmask of sampler which needs coords clamped for vertex
  81          * shader:
  82          */
  83         uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
  84
  85         /* bitmask of sampler which needs coords clamped for frag
  86          * shader:
  87          */
  88         uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
  89 };
  90
  91 static inline bool
  92 ir3_shader_key_equal(struct ir3_shader_key *a, struct ir3_shader_key *b)
  93 {
  94         /* slow-path if we need to check {v,f}saturate_{s,t,r} */
  95         if (a->has_per_samp || b->has_per_samp)
  96                 return memcmp(a, b, sizeof(struct ir3_shader_key)) == 0;
  97         return a->global == b->global;
  98 }
  99
 100 struct ir3_shader_variant {
 101         struct fd_bo *bo;
 102
 103         /* variant id (for debug) */
 104         uint32_t id;
 105
 106         struct ir3_shader_key key;
 107
 108         struct ir3_info info;
 109         struct ir3 *ir;
 110
 111         /* the instructions length is in units of instruction groups
 112          * (4 instructions for a3xx, 16 instructions for a4xx.. each
 113          * instruction is 2 dwords):
 114          */
 115         unsigned instrlen;
 116
 117         /* the constants length is in units of vec4's, and is the sum of
 118          * the uniforms and the built-in compiler constants
 119          */
 120         unsigned constlen;
 121
 122         /* About Linkage:
 123          *   + Let the frag shader determine the position/compmask for the
 124          *     varyings, since it is the place where we know if the varying
 125          *     is actually used, and if so, which components are used.  So
 126          *     what the hw calls "outloc" is taken from the "inloc" of the
 127          *     frag shader.
 128          *   + From the vert shader, we only need the output regid
 129          */
 130
 131         /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
 132          * to bary.f instructions
 133          */
 134         uint8_t pos_regid;
 135         bool frag_coord, frag_face, color0_mrt;
 136
 137         /* varyings/outputs: */
 138         unsigned outputs_count;
 139         struct {
 140                 ir3_semantic semantic;
 141                 uint8_t regid;
 142         } outputs[16 + 2];  /* +POSITION +PSIZE */
 143         bool writes_pos, writes_psize;
 144
 145         /* vertices/inputs: */
 146         unsigned inputs_count;
 147         struct {
 148                 ir3_semantic semantic;
 149                 uint8_t regid;
 150                 uint8_t compmask;
 151                 uint8_t ncomp;
 152                 /* In theory inloc of fs should match outloc of vs.  Or
 153                  * rather the outloc of the vs is 8 plus the offset passed
 154                  * to bary.f.  Presumably that +8 is to account for
 155                  * gl_Position/gl_PointSize?
 156                  *
 157                  * NOTE inloc is currently aligned to 4 (we don't try
 158                  * to pack varyings).  Changing this would likely break
 159                  * assumptions in few places (like setting up of flat
 160                  * shading in fd3_program) so be sure to check all the
 161                  * spots where inloc is used.
 162                  */
 163                 uint8_t inloc;
 164                 uint8_t bary;
 165                 uint8_t interpolate;
 166         } inputs[16 + 2];  /* +POSITION +FACE */
 167
 168         unsigned total_in;       /* sum of inputs (scalar) */
 169
 170         /* do we have one or more texture sample instructions: */
 171         bool has_samp;
 172
 173         /* do we have kill instructions: */
 174         bool has_kill;
 175
 176         /* const reg # of first immediate, ie. 1 == c1
 177          * (not regid, because TGSI thinks in terms of vec4 registers,
 178          * not scalar registers)
 179          */
 180         unsigned first_driver_param;
 181         unsigned first_immediate;
 182         unsigned immediates_count;
 183         struct {
 184                 uint32_t val[4];
 185         } immediates[64];
 186
 187         /* shader variants form a linked list: */
 188         struct ir3_shader_variant *next;
 189
 190         /* replicated here to avoid passing extra ptrs everywhere: */
 191         enum shader_t type;
 192         struct ir3_shader *shader;
 193 };
 194
 195 struct ir3_shader {
 196         enum shader_t type;
 197
 198         /* shader id (for debug): */
 199         uint32_t id;
 200         uint32_t variant_count;
 201
 202         struct ir3_compiler *compiler;
 203
 204         struct pipe_context *pctx;
 205         const struct tgsi_token *tokens;
 206
 207         struct ir3_shader_variant *variants;
 208
 209         /* so far, only used for blit_prog shader.. values for
 210          * VPC_VARYING_PS_REPL[i].MODE
 211          */
 212         uint32_t vpsrepl[8];
 213 };
 214
 215 void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id);
 216
 217 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 218                 const struct tgsi_token *tokens, enum shader_t type);
 219 void ir3_shader_destroy(struct ir3_shader *shader);
 220 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 221                 struct ir3_shader_key key);
 222 void ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin);
 223
 224 static inline const char *
 225 ir3_shader_stage(struct ir3_shader *shader)
 226 {
 227         switch (shader->type) {
 228         case SHADER_VERTEX:     return "VERT";
 229         case SHADER_FRAGMENT:   return "FRAG";
 230         case SHADER_COMPUTE:    return "CL";
 231         default:
 232                 unreachable("invalid type");
 233                 return NULL;
 234         }
 235 }
 236
 237 /*
 238  * Helper/util:
 239  */
 240
 241 #include "pipe/p_shader_tokens.h"
 242
 243 static inline int
 244 ir3_find_output(const struct ir3_shader_variant *so, ir3_semantic semantic)
 245 {
 246         int j;
 247
 248         for (j = 0; j < so->outputs_count; j++)
 249                 if (so->outputs[j].semantic == semantic)
 250                         return j;
 251
 252         /* it seems optional to have a OUT.BCOLOR[n] for each OUT.COLOR[n]
 253          * in the vertex shader.. but the fragment shader doesn't know this
 254          * so  it will always have both IN.COLOR[n] and IN.BCOLOR[n].  So
 255          * at link time if there is no matching OUT.BCOLOR[n], we must map
 256          * OUT.COLOR[n] to IN.BCOLOR[n].  And visa versa if there is only
 257          * a OUT.BCOLOR[n] but no matching OUT.COLOR[n]
 258          */
 259         if (sem2name(semantic) == TGSI_SEMANTIC_BCOLOR) {
 260                 unsigned idx = sem2idx(semantic);
 261                 semantic = ir3_semantic_name(TGSI_SEMANTIC_COLOR, idx);
 262         } else if (sem2name(semantic) == TGSI_SEMANTIC_COLOR) {
 263                 unsigned idx = sem2idx(semantic);
 264                 semantic = ir3_semantic_name(TGSI_SEMANTIC_BCOLOR, idx);
 265         } else {
 266                 return 0;
 267         }
 268
 269         for (j = 0; j < so->outputs_count; j++)
 270                 if (so->outputs[j].semantic == semantic)
 271                         return j;
 272
 273         debug_assert(0);
 274
 275         return 0;
 276 }
 277
 278 static inline int
 279 ir3_next_varying(const struct ir3_shader_variant *so, int i)
 280 {
 281         while (++i < so->inputs_count)
 282                 if (so->inputs[i].compmask && so->inputs[i].bary)
 283                         break;
 284         return i;
 285 }
 286
 287 static inline uint32_t
 288 ir3_find_output_regid(const struct ir3_shader_variant *so, ir3_semantic semantic)
 289 {
 290         int j;
 291         for (j = 0; j < so->outputs_count; j++)
 292                 if (so->outputs[j].semantic == semantic)
 293                         return so->outputs[j].regid;
 294         return regid(63, 0);
 295 }
 296
 297 #endif /* IR3_SHADER_H_ */