1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 * Rob Clark <robclark@freedesktop.org>
32 #include "pipe/p_state.h"
37 /* internal semantic used for passing vtxcnt to vertex shader to
38 * implement transform feedback:
40 #define IR3_SEMANTIC_VTXCNT (TGSI_SEMANTIC_COUNT + 0)
42 typedef uint16_t ir3_semantic
; /* semantic name + index */
43 static inline ir3_semantic
44 ir3_semantic_name(uint8_t name
, uint16_t index
)
46 return (name
<< 8) | (index
& 0xff);
49 static inline uint8_t sem2name(ir3_semantic sem
)
54 static inline uint16_t sem2idx(ir3_semantic sem
)
59 /* Configuration key used to identify a shader variant.. different
60 * shader variants can be used to implement features not supported
61 * in hw (two sided color), binning-pass vertex shader, etc.
63 struct ir3_shader_key
{
66 /* do we need to check {v,f}saturate_{s,t,r}? */
67 unsigned has_per_samp
: 1;
70 * Vertex shader variant parameters:
72 unsigned binning_pass
: 1;
75 * Fragment shader variant parameters:
77 unsigned color_two_side
: 1;
78 unsigned half_precision
: 1;
79 /* used when shader needs to handle flat varyings (a4xx),
80 * for TGSI_INTERPOLATE_COLOR:
82 unsigned rasterflat
: 1;
87 /* bitmask of sampler which needs coords clamped for vertex
90 uint16_t vsaturate_s
, vsaturate_t
, vsaturate_r
;
92 /* bitmask of sampler which needs coords clamped for frag
95 uint16_t fsaturate_s
, fsaturate_t
, fsaturate_r
;
99 ir3_shader_key_equal(struct ir3_shader_key
*a
, struct ir3_shader_key
*b
)
101 /* slow-path if we need to check {v,f}saturate_{s,t,r} */
102 if (a
->has_per_samp
|| b
->has_per_samp
)
103 return memcmp(a
, b
, sizeof(struct ir3_shader_key
)) == 0;
104 return a
->global
== b
->global
;
107 struct ir3_shader_variant
{
110 /* variant id (for debug) */
113 struct ir3_shader_key key
;
115 struct ir3_info info
;
118 /* the instructions length is in units of instruction groups
119 * (4 instructions for a3xx, 16 instructions for a4xx.. each
120 * instruction is 2 dwords):
124 /* the constants length is in units of vec4's, and is the sum of
125 * the uniforms and the built-in compiler constants
130 * + Let the frag shader determine the position/compmask for the
131 * varyings, since it is the place where we know if the varying
132 * is actually used, and if so, which components are used. So
133 * what the hw calls "outloc" is taken from the "inloc" of the
135 * + From the vert shader, we only need the output regid
138 /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
139 * to bary.f instructions
142 bool frag_coord
, frag_face
, color0_mrt
;
144 /* varyings/outputs: */
145 unsigned outputs_count
;
147 ir3_semantic semantic
;
149 } outputs
[16 + 2]; /* +POSITION +PSIZE */
150 bool writes_pos
, writes_psize
;
152 /* vertices/inputs: */
153 unsigned inputs_count
;
155 ir3_semantic semantic
;
159 /* In theory inloc of fs should match outloc of vs. Or
160 * rather the outloc of the vs is 8 plus the offset passed
161 * to bary.f. Presumably that +8 is to account for
162 * gl_Position/gl_PointSize?
164 * NOTE inloc is currently aligned to 4 (we don't try
165 * to pack varyings). Changing this would likely break
166 * assumptions in few places (like setting up of flat
167 * shading in fd3_program) so be sure to check all the
168 * spots where inloc is used.
173 } inputs
[16 + 2]; /* +POSITION +FACE */
175 unsigned total_in
; /* sum of inputs (scalar) */
177 /* do we have one or more texture sample instructions: */
180 /* do we have kill instructions: */
183 /* const reg # of first immediate, ie. 1 == c1
184 * (not regid, because TGSI thinks in terms of vec4 registers,
185 * not scalar registers)
187 unsigned first_driver_param
;
188 unsigned first_immediate
;
189 unsigned immediates_count
;
194 /* shader variants form a linked list: */
195 struct ir3_shader_variant
*next
;
197 /* replicated here to avoid passing extra ptrs everywhere: */
199 struct ir3_shader
*shader
;
205 /* shader id (for debug): */
207 uint32_t variant_count
;
209 struct ir3_compiler
*compiler
;
211 struct pipe_context
*pctx
;
212 const struct tgsi_token
*tokens
;
213 struct pipe_stream_output_info stream_output
;
215 struct ir3_shader_variant
*variants
;
217 /* so far, only used for blit_prog shader.. values for
218 * VPC_VARYING_PS_REPL[i].MODE
223 void * ir3_shader_assemble(struct ir3_shader_variant
*v
, uint32_t gpu_id
);
225 struct ir3_shader
* ir3_shader_create(struct pipe_context
*pctx
,
226 const struct pipe_shader_state
*cso
, enum shader_t type
);
227 void ir3_shader_destroy(struct ir3_shader
*shader
);
228 struct ir3_shader_variant
* ir3_shader_variant(struct ir3_shader
*shader
,
229 struct ir3_shader_key key
);
230 void ir3_shader_disasm(struct ir3_shader_variant
*so
, uint32_t *bin
);
232 struct fd_ringbuffer
;
233 void ir3_emit_consts(struct ir3_shader_variant
*v
, struct fd_ringbuffer
*ring
,
234 const struct pipe_draw_info
*info
, uint32_t dirty
);
236 static inline const char *
237 ir3_shader_stage(struct ir3_shader
*shader
)
239 switch (shader
->type
) {
240 case SHADER_VERTEX
: return "VERT";
241 case SHADER_FRAGMENT
: return "FRAG";
242 case SHADER_COMPUTE
: return "CL";
244 unreachable("invalid type");
253 #include "pipe/p_shader_tokens.h"
256 ir3_find_output(const struct ir3_shader_variant
*so
, ir3_semantic semantic
)
260 for (j
= 0; j
< so
->outputs_count
; j
++)
261 if (so
->outputs
[j
].semantic
== semantic
)
264 /* it seems optional to have a OUT.BCOLOR[n] for each OUT.COLOR[n]
265 * in the vertex shader.. but the fragment shader doesn't know this
266 * so it will always have both IN.COLOR[n] and IN.BCOLOR[n]. So
267 * at link time if there is no matching OUT.BCOLOR[n], we must map
268 * OUT.COLOR[n] to IN.BCOLOR[n]. And visa versa if there is only
269 * a OUT.BCOLOR[n] but no matching OUT.COLOR[n]
271 if (sem2name(semantic
) == TGSI_SEMANTIC_BCOLOR
) {
272 unsigned idx
= sem2idx(semantic
);
273 semantic
= ir3_semantic_name(TGSI_SEMANTIC_COLOR
, idx
);
274 } else if (sem2name(semantic
) == TGSI_SEMANTIC_COLOR
) {
275 unsigned idx
= sem2idx(semantic
);
276 semantic
= ir3_semantic_name(TGSI_SEMANTIC_BCOLOR
, idx
);
281 for (j
= 0; j
< so
->outputs_count
; j
++)
282 if (so
->outputs
[j
].semantic
== semantic
)
291 ir3_next_varying(const struct ir3_shader_variant
*so
, int i
)
293 while (++i
< so
->inputs_count
)
294 if (so
->inputs
[i
].compmask
&& so
->inputs
[i
].bary
)
299 static inline uint32_t
300 ir3_find_output_regid(const struct ir3_shader_variant
*so
, ir3_semantic semantic
)
303 for (j
= 0; j
< so
->outputs_count
; j
++)
304 if (so
->outputs
[j
].semantic
== semantic
)
305 return so
->outputs
[j
].regid
;
309 #endif /* IR3_SHADER_H_ */