src/gallium/drivers/freedreno/ir3/ir3_shader.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef IR3_SHADER_H_
  30 #define IR3_SHADER_H_
  31
  32 #include "pipe/p_state.h"
  33
  34 #include "ir3.h"
  35 #include "disasm.h"
  36
  37 /* driver param indices: */
  38 enum ir3_driver_param {
  39         IR3_DP_VTXID_BASE = 0,
  40         IR3_DP_VTXCNT_MAX = 1,
  41 };
  42
  43 /* internal semantic used for passing vtxcnt to vertex shader to
  44  * implement transform feedback:
  45  */
  46 #define IR3_SEMANTIC_VTXCNT (TGSI_SEMANTIC_COUNT + 0)
  47
  48 typedef uint16_t ir3_semantic;  /* semantic name + index */
  49 static inline ir3_semantic
  50 ir3_semantic_name(uint8_t name, uint16_t index)
  51 {
  52         return (name << 8) | (index & 0xff);
  53 }
  54
  55 static inline uint8_t sem2name(ir3_semantic sem)
  56 {
  57         return sem >> 8;
  58 }
  59
  60 static inline uint16_t sem2idx(ir3_semantic sem)
  61 {
  62         return sem & 0xff;
  63 }
  64
  65 /* Configuration key used to identify a shader variant.. different
  66  * shader variants can be used to implement features not supported
  67  * in hw (two sided color), binning-pass vertex shader, etc.
  68  */
  69 struct ir3_shader_key {
  70         union {
  71                 struct {
  72                         /* do we need to check {v,f}saturate_{s,t,r}? */
  73                         unsigned has_per_samp : 1;
  74
  75                         /*
  76                          * Vertex shader variant parameters:
  77                          */
  78                         unsigned binning_pass : 1;
  79
  80                         /*
  81                          * Fragment shader variant parameters:
  82                          */
  83                         unsigned color_two_side : 1;
  84                         unsigned half_precision : 1;
  85                         /* used when shader needs to handle flat varyings (a4xx),
  86                          * for TGSI_INTERPOLATE_COLOR:
  87                          */
  88                         unsigned rasterflat : 1;
  89                 };
  90                 uint32_t global;
  91         };
  92
  93         /* bitmask of sampler which needs coords clamped for vertex
  94          * shader:
  95          */
  96         uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
  97
  98         /* bitmask of sampler which needs coords clamped for frag
  99          * shader:
 100          */
 101         uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
 102 };
 103
 104 static inline bool
 105 ir3_shader_key_equal(struct ir3_shader_key *a, struct ir3_shader_key *b)
 106 {
 107         /* slow-path if we need to check {v,f}saturate_{s,t,r} */
 108         if (a->has_per_samp || b->has_per_samp)
 109                 return memcmp(a, b, sizeof(struct ir3_shader_key)) == 0;
 110         return a->global == b->global;
 111 }
 112
 113 struct ir3_shader_variant {
 114         struct fd_bo *bo;
 115
 116         /* variant id (for debug) */
 117         uint32_t id;
 118
 119         struct ir3_shader_key key;
 120
 121         struct ir3_info info;
 122         struct ir3 *ir;
 123
 124         /* the instructions length is in units of instruction groups
 125          * (4 instructions for a3xx, 16 instructions for a4xx.. each
 126          * instruction is 2 dwords):
 127          */
 128         unsigned instrlen;
 129
 130         /* the constants length is in units of vec4's, and is the sum of
 131          * the uniforms and the built-in compiler constants
 132          */
 133         unsigned constlen;
 134
 135         /* About Linkage:
 136          *   + Let the frag shader determine the position/compmask for the
 137          *     varyings, since it is the place where we know if the varying
 138          *     is actually used, and if so, which components are used.  So
 139          *     what the hw calls "outloc" is taken from the "inloc" of the
 140          *     frag shader.
 141          *   + From the vert shader, we only need the output regid
 142          */
 143
 144         /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
 145          * to bary.f instructions
 146          */
 147         uint8_t pos_regid;
 148         bool frag_coord, frag_face, color0_mrt;
 149
 150         /* varyings/outputs: */
 151         unsigned outputs_count;
 152         struct {
 153                 ir3_semantic semantic;
 154                 uint8_t regid;
 155         } outputs[16 + 2];  /* +POSITION +PSIZE */
 156         bool writes_pos, writes_psize;
 157
 158         /* vertices/inputs: */
 159         unsigned inputs_count;
 160         struct {
 161                 ir3_semantic semantic;
 162                 uint8_t regid;
 163                 uint8_t compmask;
 164                 uint8_t ncomp;
 165                 /* In theory inloc of fs should match outloc of vs.  Or
 166                  * rather the outloc of the vs is 8 plus the offset passed
 167                  * to bary.f.  Presumably that +8 is to account for
 168                  * gl_Position/gl_PointSize?
 169                  *
 170                  * NOTE inloc is currently aligned to 4 (we don't try
 171                  * to pack varyings).  Changing this would likely break
 172                  * assumptions in few places (like setting up of flat
 173                  * shading in fd3_program) so be sure to check all the
 174                  * spots where inloc is used.
 175                  */
 176                 uint8_t inloc;
 177                 uint8_t bary;
 178                 uint8_t interpolate;
 179         } inputs[16 + 2];  /* +POSITION +FACE */
 180
 181         unsigned total_in;       /* sum of inputs (scalar) */
 182
 183         /* do we have one or more texture sample instructions: */
 184         bool has_samp;
 185
 186         /* do we have kill instructions: */
 187         bool has_kill;
 188
 189         /* const reg # of first immediate, ie. 1 == c1
 190          * (not regid, because TGSI thinks in terms of vec4 registers,
 191          * not scalar registers)
 192          */
 193         unsigned first_driver_param;
 194         unsigned first_immediate;
 195         unsigned immediates_count;
 196         struct {
 197                 uint32_t val[4];
 198         } immediates[64];
 199
 200         /* shader variants form a linked list: */
 201         struct ir3_shader_variant *next;
 202
 203         /* replicated here to avoid passing extra ptrs everywhere: */
 204         enum shader_t type;
 205         struct ir3_shader *shader;
 206 };
 207
 208 struct ir3_shader {
 209         enum shader_t type;
 210
 211         /* shader id (for debug): */
 212         uint32_t id;
 213         uint32_t variant_count;
 214
 215         struct ir3_compiler *compiler;
 216
 217         struct pipe_context *pctx;
 218         const struct tgsi_token *tokens;
 219         struct pipe_stream_output_info stream_output;
 220
 221         struct ir3_shader_variant *variants;
 222 };
 223
 224 void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id);
 225
 226 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 227                 const struct pipe_shader_state *cso, enum shader_t type);
 228 void ir3_shader_destroy(struct ir3_shader *shader);
 229 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 230                 struct ir3_shader_key key);
 231 void ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin);
 232
 233 struct fd_ringbuffer;
 234 void ir3_emit_consts(struct ir3_shader_variant *v, struct fd_ringbuffer *ring,
 235                 const struct pipe_draw_info *info, uint32_t dirty);
 236
 237 static inline const char *
 238 ir3_shader_stage(struct ir3_shader *shader)
 239 {
 240         switch (shader->type) {
 241         case SHADER_VERTEX:     return "VERT";
 242         case SHADER_FRAGMENT:   return "FRAG";
 243         case SHADER_COMPUTE:    return "CL";
 244         default:
 245                 unreachable("invalid type");
 246                 return NULL;
 247         }
 248 }
 249
 250 /*
 251  * Helper/util:
 252  */
 253
 254 #include "pipe/p_shader_tokens.h"
 255
 256 static inline int
 257 ir3_find_output(const struct ir3_shader_variant *so, ir3_semantic semantic)
 258 {
 259         int j;
 260
 261         for (j = 0; j < so->outputs_count; j++)
 262                 if (so->outputs[j].semantic == semantic)
 263                         return j;
 264
 265         /* it seems optional to have a OUT.BCOLOR[n] for each OUT.COLOR[n]
 266          * in the vertex shader.. but the fragment shader doesn't know this
 267          * so  it will always have both IN.COLOR[n] and IN.BCOLOR[n].  So
 268          * at link time if there is no matching OUT.BCOLOR[n], we must map
 269          * OUT.COLOR[n] to IN.BCOLOR[n].  And visa versa if there is only
 270          * a OUT.BCOLOR[n] but no matching OUT.COLOR[n]
 271          */
 272         if (sem2name(semantic) == TGSI_SEMANTIC_BCOLOR) {
 273                 unsigned idx = sem2idx(semantic);
 274                 semantic = ir3_semantic_name(TGSI_SEMANTIC_COLOR, idx);
 275         } else if (sem2name(semantic) == TGSI_SEMANTIC_COLOR) {
 276                 unsigned idx = sem2idx(semantic);
 277                 semantic = ir3_semantic_name(TGSI_SEMANTIC_BCOLOR, idx);
 278         } else {
 279                 return 0;
 280         }
 281
 282         for (j = 0; j < so->outputs_count; j++)
 283                 if (so->outputs[j].semantic == semantic)
 284                         return j;
 285
 286         debug_assert(0);
 287
 288         return 0;
 289 }
 290
 291 static inline int
 292 ir3_next_varying(const struct ir3_shader_variant *so, int i)
 293 {
 294         while (++i < so->inputs_count)
 295                 if (so->inputs[i].compmask && so->inputs[i].bary)
 296                         break;
 297         return i;
 298 }
 299
 300 static inline uint32_t
 301 ir3_find_output_regid(const struct ir3_shader_variant *so, ir3_semantic semantic)
 302 {
 303         int j;
 304         for (j = 0; j < so->outputs_count; j++)
 305                 if (so->outputs[j].semantic == semantic)
 306                         return so->outputs[j].regid;
 307         return regid(63, 0);
 308 }
 309
 310 #endif /* IR3_SHADER_H_ */