src/gallium/drivers/freedreno/ir3/ir3_shader.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef IR3_SHADER_H_
  30 #define IR3_SHADER_H_
  31
  32 #include "ir3.h"
  33 #include "disasm.h"
  34
  35 typedef uint16_t ir3_semantic;  /* semantic name + index */
  36 static inline ir3_semantic
  37 ir3_semantic_name(uint8_t name, uint16_t index)
  38 {
  39         return (name << 8) | (index & 0xff);
  40 }
  41
  42 static inline uint8_t sem2name(ir3_semantic sem)
  43 {
  44         return sem >> 8;
  45 }
  46
  47 static inline uint16_t sem2idx(ir3_semantic sem)
  48 {
  49         return sem & 0xff;
  50 }
  51
  52 /* Configuration key used to identify a shader variant.. different
  53  * shader variants can be used to implement features not supported
  54  * in hw (two sided color), binning-pass vertex shader, etc.
  55  *
  56  * TODO since shader key is starting to get larger (than 32bit)
  57  * we probably should pass it around by ptr rather than value more
  58  * of the places.. but watch out in ir3_shader_variant() where the
  59  * key gets normalized, we need to make a copy there.
  60  */
  61 struct ir3_shader_key {
  62         /* bitmask of sampler which needs coords clamped for vertex
  63          * shader:
  64          */
  65         unsigned vsaturate_s, vsaturate_t, vsaturate_r;
  66
  67         /* bitmask of sampler which needs coords clamped for frag
  68          * shader:
  69          */
  70         unsigned fsaturate_s, fsaturate_t, fsaturate_r;
  71
  72         /*
  73          * Vertex shader variant parameters:
  74          */
  75         unsigned binning_pass : 1;
  76
  77         /*
  78          * Fragment shader variant parameters:
  79          */
  80         unsigned color_two_side : 1;
  81         unsigned half_precision : 1;
  82         /* For rendering to alpha, we need a bit of special handling
  83          * since the hw always takes gl_FragColor starting from x
  84          * component, rather than figuring out to take the w component.
  85          * We could be more clever and generate variants for other
  86          * render target formats (ie. luminance formats are xxx1), but
  87          * let's start with this and see how it goes:
  88          */
  89         unsigned alpha : 1;
  90 };
  91
  92 struct ir3_shader_variant {
  93         struct fd_bo *bo;
  94
  95         struct ir3_shader_key key;
  96
  97         struct ir3_info info;
  98         struct ir3 *ir;
  99
 100         /* the instructions length is in units of instruction groups
 101          * (4 instructions, 8 dwords):
 102          */
 103         unsigned instrlen;
 104
 105         /* the constants length is in units of vec4's, and is the sum of
 106          * the uniforms and the built-in compiler constants
 107          */
 108         unsigned constlen;
 109
 110         /* About Linkage:
 111          *   + Let the frag shader determine the position/compmask for the
 112          *     varyings, since it is the place where we know if the varying
 113          *     is actually used, and if so, which components are used.  So
 114          *     what the hw calls "outloc" is taken from the "inloc" of the
 115          *     frag shader.
 116          *   + From the vert shader, we only need the output regid
 117          */
 118
 119         /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
 120          * to bary.f instructions
 121          */
 122         uint8_t pos_regid;
 123         bool frag_coord, frag_face;
 124
 125         /* varyings/outputs: */
 126         unsigned outputs_count;
 127         struct {
 128                 ir3_semantic semantic;
 129                 uint8_t regid;
 130         } outputs[16 + 2];  /* +POSITION +PSIZE */
 131         bool writes_pos, writes_psize;
 132
 133         /* vertices/inputs: */
 134         unsigned inputs_count;
 135         struct {
 136                 ir3_semantic semantic;
 137                 uint8_t regid;
 138                 uint8_t compmask;
 139                 uint8_t ncomp;
 140                 /* In theory inloc of fs should match outloc of vs.  Or
 141                  * rather the outloc of the vs is 8 plus the offset passed
 142                  * to bary.f.  Presumably that +8 is to account for
 143                  * gl_Position/gl_PointSize?
 144                  *
 145                  * NOTE inloc is currently aligned to 4 (we don't try
 146                  * to pack varyings).  Changing this would likely break
 147                  * assumptions in few places (like setting up of flat
 148                  * shading in fd3_program) so be sure to check all the
 149                  * spots where inloc is used.
 150                  */
 151                 uint8_t inloc;
 152                 uint8_t bary;
 153                 uint8_t interpolate;
 154         } inputs[16 + 2];  /* +POSITION +FACE */
 155
 156         unsigned total_in;       /* sum of inputs (scalar) */
 157
 158         /* do we have one or more texture sample instructions: */
 159         bool has_samp;
 160
 161         /* const reg # of first immediate, ie. 1 == c1
 162          * (not regid, because TGSI thinks in terms of vec4 registers,
 163          * not scalar registers)
 164          */
 165         unsigned first_immediate;
 166         unsigned immediates_count;
 167         struct {
 168                 uint32_t val[4];
 169         } immediates[64];
 170
 171         /* shader variants form a linked list: */
 172         struct ir3_shader_variant *next;
 173
 174         /* replicated here to avoid passing extra ptrs everywhere: */
 175         enum shader_t type;
 176         struct ir3_shader *shader;
 177 };
 178
 179 struct ir3_shader {
 180         enum shader_t type;
 181
 182         struct pipe_context *pctx;
 183         const struct tgsi_token *tokens;
 184
 185         struct ir3_shader_variant *variants;
 186
 187         /* so far, only used for blit_prog shader.. values for
 188          * VPC_VARYING_PS_REPL[i].MODE
 189          */
 190         uint32_t vpsrepl[4];
 191 };
 192
 193
 194 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 195                 const struct tgsi_token *tokens, enum shader_t type);
 196 void ir3_shader_destroy(struct ir3_shader *shader);
 197
 198 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 199                 struct ir3_shader_key key);
 200
 201 #endif /* IR3_SHADER_H_ */