src/gallium/drivers/freedreno/ir3/ir3_shader.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef IR3_SHADER_H_
  30 #define IR3_SHADER_H_
  31
  32 #include "pipe/p_state.h"
  33
  34 #include "ir3.h"
  35 #include "disasm.h"
  36
  37 /* driver param indices: */
  38 enum ir3_driver_param {
  39         IR3_DP_VTXID_BASE = 0,
  40 };
  41
  42 /* internal semantic used for passing vtxcnt to vertex shader to
  43  * implement transform feedback:
  44  */
  45 #define IR3_SEMANTIC_VTXCNT (TGSI_SEMANTIC_COUNT + 0)
  46
  47 typedef uint16_t ir3_semantic;  /* semantic name + index */
  48 static inline ir3_semantic
  49 ir3_semantic_name(uint8_t name, uint16_t index)
  50 {
  51         return (name << 8) | (index & 0xff);
  52 }
  53
  54 static inline uint8_t sem2name(ir3_semantic sem)
  55 {
  56         return sem >> 8;
  57 }
  58
  59 static inline uint16_t sem2idx(ir3_semantic sem)
  60 {
  61         return sem & 0xff;
  62 }
  63
  64 /* Configuration key used to identify a shader variant.. different
  65  * shader variants can be used to implement features not supported
  66  * in hw (two sided color), binning-pass vertex shader, etc.
  67  */
  68 struct ir3_shader_key {
  69         union {
  70                 struct {
  71                         /* do we need to check {v,f}saturate_{s,t,r}? */
  72                         unsigned has_per_samp : 1;
  73
  74                         /*
  75                          * Vertex shader variant parameters:
  76                          */
  77                         unsigned binning_pass : 1;
  78
  79                         /*
  80                          * Fragment shader variant parameters:
  81                          */
  82                         unsigned color_two_side : 1;
  83                         unsigned half_precision : 1;
  84                         /* used when shader needs to handle flat varyings (a4xx),
  85                          * for TGSI_INTERPOLATE_COLOR:
  86                          */
  87                         unsigned rasterflat : 1;
  88                 };
  89                 uint32_t global;
  90         };
  91
  92         /* bitmask of sampler which needs coords clamped for vertex
  93          * shader:
  94          */
  95         uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
  96
  97         /* bitmask of sampler which needs coords clamped for frag
  98          * shader:
  99          */
 100         uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
 101 };
 102
 103 static inline bool
 104 ir3_shader_key_equal(struct ir3_shader_key *a, struct ir3_shader_key *b)
 105 {
 106         /* slow-path if we need to check {v,f}saturate_{s,t,r} */
 107         if (a->has_per_samp || b->has_per_samp)
 108                 return memcmp(a, b, sizeof(struct ir3_shader_key)) == 0;
 109         return a->global == b->global;
 110 }
 111
 112 struct ir3_shader_variant {
 113         struct fd_bo *bo;
 114
 115         /* variant id (for debug) */
 116         uint32_t id;
 117
 118         struct ir3_shader_key key;
 119
 120         struct ir3_info info;
 121         struct ir3 *ir;
 122
 123         /* the instructions length is in units of instruction groups
 124          * (4 instructions for a3xx, 16 instructions for a4xx.. each
 125          * instruction is 2 dwords):
 126          */
 127         unsigned instrlen;
 128
 129         /* the constants length is in units of vec4's, and is the sum of
 130          * the uniforms and the built-in compiler constants
 131          */
 132         unsigned constlen;
 133
 134         /* About Linkage:
 135          *   + Let the frag shader determine the position/compmask for the
 136          *     varyings, since it is the place where we know if the varying
 137          *     is actually used, and if so, which components are used.  So
 138          *     what the hw calls "outloc" is taken from the "inloc" of the
 139          *     frag shader.
 140          *   + From the vert shader, we only need the output regid
 141          */
 142
 143         /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
 144          * to bary.f instructions
 145          */
 146         uint8_t pos_regid;
 147         bool frag_coord, frag_face, color0_mrt;
 148
 149         /* varyings/outputs: */
 150         unsigned outputs_count;
 151         struct {
 152                 ir3_semantic semantic;
 153                 uint8_t regid;
 154         } outputs[16 + 2];  /* +POSITION +PSIZE */
 155         bool writes_pos, writes_psize;
 156
 157         /* vertices/inputs: */
 158         unsigned inputs_count;
 159         struct {
 160                 ir3_semantic semantic;
 161                 uint8_t regid;
 162                 uint8_t compmask;
 163                 uint8_t ncomp;
 164                 /* In theory inloc of fs should match outloc of vs.  Or
 165                  * rather the outloc of the vs is 8 plus the offset passed
 166                  * to bary.f.  Presumably that +8 is to account for
 167                  * gl_Position/gl_PointSize?
 168                  *
 169                  * NOTE inloc is currently aligned to 4 (we don't try
 170                  * to pack varyings).  Changing this would likely break
 171                  * assumptions in few places (like setting up of flat
 172                  * shading in fd3_program) so be sure to check all the
 173                  * spots where inloc is used.
 174                  */
 175                 uint8_t inloc;
 176                 uint8_t bary;
 177                 uint8_t interpolate;
 178         } inputs[16 + 2];  /* +POSITION +FACE */
 179
 180         unsigned total_in;       /* sum of inputs (scalar) */
 181
 182         /* do we have one or more texture sample instructions: */
 183         bool has_samp;
 184
 185         /* do we have kill instructions: */
 186         bool has_kill;
 187
 188         /* const reg # of first immediate, ie. 1 == c1
 189          * (not regid, because TGSI thinks in terms of vec4 registers,
 190          * not scalar registers)
 191          */
 192         unsigned first_driver_param;
 193         unsigned first_immediate;
 194         unsigned immediates_count;
 195         struct {
 196                 uint32_t val[4];
 197         } immediates[64];
 198
 199         /* shader variants form a linked list: */
 200         struct ir3_shader_variant *next;
 201
 202         /* replicated here to avoid passing extra ptrs everywhere: */
 203         enum shader_t type;
 204         struct ir3_shader *shader;
 205 };
 206
 207 struct ir3_shader {
 208         enum shader_t type;
 209
 210         /* shader id (for debug): */
 211         uint32_t id;
 212         uint32_t variant_count;
 213
 214         struct ir3_compiler *compiler;
 215
 216         struct pipe_context *pctx;
 217         const struct tgsi_token *tokens;
 218         struct pipe_stream_output_info stream_output;
 219
 220         struct ir3_shader_variant *variants;
 221
 222         /* so far, only used for blit_prog shader.. values for
 223          * VPC_VARYING_PS_REPL[i].MODE
 224          */
 225         uint32_t vpsrepl[8];
 226 };
 227
 228 void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id);
 229
 230 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 231                 const struct pipe_shader_state *cso, enum shader_t type);
 232 void ir3_shader_destroy(struct ir3_shader *shader);
 233 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 234                 struct ir3_shader_key key);
 235 void ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin);
 236
 237 struct fd_ringbuffer;
 238 void ir3_emit_consts(struct ir3_shader_variant *v, struct fd_ringbuffer *ring,
 239                 const struct pipe_draw_info *info, uint32_t dirty);
 240
 241 static inline const char *
 242 ir3_shader_stage(struct ir3_shader *shader)
 243 {
 244         switch (shader->type) {
 245         case SHADER_VERTEX:     return "VERT";
 246         case SHADER_FRAGMENT:   return "FRAG";
 247         case SHADER_COMPUTE:    return "CL";
 248         default:
 249                 unreachable("invalid type");
 250                 return NULL;
 251         }
 252 }
 253
 254 /*
 255  * Helper/util:
 256  */
 257
 258 #include "pipe/p_shader_tokens.h"
 259
 260 static inline int
 261 ir3_find_output(const struct ir3_shader_variant *so, ir3_semantic semantic)
 262 {
 263         int j;
 264
 265         for (j = 0; j < so->outputs_count; j++)
 266                 if (so->outputs[j].semantic == semantic)
 267                         return j;
 268
 269         /* it seems optional to have a OUT.BCOLOR[n] for each OUT.COLOR[n]
 270          * in the vertex shader.. but the fragment shader doesn't know this
 271          * so  it will always have both IN.COLOR[n] and IN.BCOLOR[n].  So
 272          * at link time if there is no matching OUT.BCOLOR[n], we must map
 273          * OUT.COLOR[n] to IN.BCOLOR[n].  And visa versa if there is only
 274          * a OUT.BCOLOR[n] but no matching OUT.COLOR[n]
 275          */
 276         if (sem2name(semantic) == TGSI_SEMANTIC_BCOLOR) {
 277                 unsigned idx = sem2idx(semantic);
 278                 semantic = ir3_semantic_name(TGSI_SEMANTIC_COLOR, idx);
 279         } else if (sem2name(semantic) == TGSI_SEMANTIC_COLOR) {
 280                 unsigned idx = sem2idx(semantic);
 281                 semantic = ir3_semantic_name(TGSI_SEMANTIC_BCOLOR, idx);
 282         } else {
 283                 return 0;
 284         }
 285
 286         for (j = 0; j < so->outputs_count; j++)
 287                 if (so->outputs[j].semantic == semantic)
 288                         return j;
 289
 290         debug_assert(0);
 291
 292         return 0;
 293 }
 294
 295 static inline int
 296 ir3_next_varying(const struct ir3_shader_variant *so, int i)
 297 {
 298         while (++i < so->inputs_count)
 299                 if (so->inputs[i].compmask && so->inputs[i].bary)
 300                         break;
 301         return i;
 302 }
 303
 304 static inline uint32_t
 305 ir3_find_output_regid(const struct ir3_shader_variant *so, ir3_semantic semantic)
 306 {
 307         int j;
 308         for (j = 0; j < so->outputs_count; j++)
 309                 if (so->outputs[j].semantic == semantic)
 310                         return so->outputs[j].regid;
 311         return regid(63, 0);
 312 }
 313
 314 #endif /* IR3_SHADER_H_ */