1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 * Rob Clark <robclark@freedesktop.org>
32 #include "pipe/p_state.h"
33 #include "compiler/shader_enums.h"
34 #include "util/bitscan.h"
39 /* driver param indices: */
40 enum ir3_driver_param
{
41 IR3_DP_VTXID_BASE
= 0,
42 IR3_DP_VTXCNT_MAX
= 1,
43 /* user-clip-plane components, up to 8x vec4's: */
47 IR3_DP_COUNT
= 36 /* must be aligned to vec4 */
50 /* Configuration key used to identify a shader variant.. different
51 * shader variants can be used to implement features not supported
52 * in hw (two sided color), binning-pass vertex shader, etc.
54 struct ir3_shader_key
{
58 * Combined Vertex/Fragment shader parameters:
60 unsigned ucp_enables
: 8;
62 /* do we need to check {v,f}saturate_{s,t,r}? */
63 unsigned has_per_samp
: 1;
66 * Vertex shader variant parameters:
68 unsigned binning_pass
: 1;
69 unsigned vclamp_color
: 1;
72 * Fragment shader variant parameters:
74 unsigned color_two_side
: 1;
75 unsigned half_precision
: 1;
76 /* used when shader needs to handle flat varyings (a4xx)
77 * for front/back color inputs to frag shader:
79 unsigned rasterflat
: 1;
80 unsigned fclamp_color
: 1;
85 /* bitmask of sampler which needs coords clamped for vertex
88 uint16_t vsaturate_s
, vsaturate_t
, vsaturate_r
;
90 /* bitmask of sampler which needs coords clamped for frag
93 uint16_t fsaturate_s
, fsaturate_t
, fsaturate_r
;
95 /* bitmask of samplers which need astc srgb workaround: */
96 uint16_t vastc_srgb
, fastc_srgb
;
100 ir3_shader_key_equal(struct ir3_shader_key
*a
, struct ir3_shader_key
*b
)
102 /* slow-path if we need to check {v,f}saturate_{s,t,r} */
103 if (a
->has_per_samp
|| b
->has_per_samp
)
104 return memcmp(a
, b
, sizeof(struct ir3_shader_key
)) == 0;
105 return a
->global
== b
->global
;
108 /* will the two keys produce different lowering for a fragment shader? */
110 ir3_shader_key_changes_fs(struct ir3_shader_key
*key
, struct ir3_shader_key
*last_key
)
112 if (last_key
->has_per_samp
|| key
->has_per_samp
) {
113 if ((last_key
->fsaturate_s
!= key
->fsaturate_s
) ||
114 (last_key
->fsaturate_t
!= key
->fsaturate_t
) ||
115 (last_key
->fsaturate_r
!= key
->fsaturate_r
) ||
116 (last_key
->fastc_srgb
!= key
->fastc_srgb
))
120 if (last_key
->fclamp_color
!= key
->fclamp_color
)
123 if (last_key
->color_two_side
!= key
->color_two_side
)
126 if (last_key
->half_precision
!= key
->half_precision
)
129 if (last_key
->rasterflat
!= key
->rasterflat
)
132 if (last_key
->ucp_enables
!= key
->ucp_enables
)
138 /* will the two keys produce different lowering for a vertex shader? */
140 ir3_shader_key_changes_vs(struct ir3_shader_key
*key
, struct ir3_shader_key
*last_key
)
142 if (last_key
->has_per_samp
|| key
->has_per_samp
) {
143 if ((last_key
->vsaturate_s
!= key
->vsaturate_s
) ||
144 (last_key
->vsaturate_t
!= key
->vsaturate_t
) ||
145 (last_key
->vsaturate_r
!= key
->vsaturate_r
) ||
146 (last_key
->vastc_srgb
!= key
->vastc_srgb
))
150 if (last_key
->vclamp_color
!= key
->vclamp_color
)
153 if (last_key
->ucp_enables
!= key
->ucp_enables
)
159 struct ir3_shader_variant
{
162 /* variant id (for debug) */
165 struct ir3_shader_key key
;
167 struct ir3_info info
;
170 /* the instructions length is in units of instruction groups
171 * (4 instructions for a3xx, 16 instructions for a4xx.. each
172 * instruction is 2 dwords):
176 /* the constants length is in units of vec4's, and is the sum of
177 * the uniforms and the built-in compiler constants
181 /* number of uniforms (in vec4), not including built-in compiler
184 unsigned num_uniforms
;
188 * + Let the frag shader determine the position/compmask for the
189 * varyings, since it is the place where we know if the varying
190 * is actually used, and if so, which components are used. So
191 * what the hw calls "outloc" is taken from the "inloc" of the
193 * + From the vert shader, we only need the output regid
196 /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
197 * to bary.f instructions
200 bool frag_coord
, frag_face
, color0_mrt
;
202 /* NOTE: for input/outputs, slot is:
203 * gl_vert_attrib - for VS inputs
204 * gl_varying_slot - for VS output / FS input
205 * gl_frag_result - for FS output
208 /* varyings/outputs: */
209 unsigned outputs_count
;
213 } outputs
[16 + 2]; /* +POSITION +PSIZE */
214 bool writes_pos
, writes_psize
;
216 /* attributes (VS) / varyings (FS):
217 * Note that sysval's should come *after* normal inputs.
219 unsigned inputs_count
;
225 /* location of input (ie. offset passed to bary.f, etc). This
226 * matches the SP_VS_VPC_DST_REG.OUTLOCn value (a3xx and a4xx
227 * have the OUTLOCn value offset by 8, presumably to account
228 * for gl_Position/gl_PointSize)
231 /* vertex shader specific: */
232 bool sysval
: 1; /* slot is a gl_system_value */
233 /* fragment shader specific: */
234 bool bary
: 1; /* fetched varying (vs one loaded into reg) */
235 bool rasterflat
: 1; /* special handling for emit->rasterflat */
236 enum glsl_interp_mode interpolate
;
237 } inputs
[16 + 2]; /* +POSITION +FACE */
239 /* sum of input components (scalar). For frag shaders, it only counts
240 * the varying inputs:
244 /* For frag shaders, the total number of inputs (not scalar,
245 * ie. SP_VS_PARAM_REG.TOTALVSOUTVAR)
249 /* do we have one or more texture sample instructions: */
252 /* do we have kill instructions: */
255 /* Layout of constant registers, each section (in vec4). Pointer size
256 * is 32b (a3xx, a4xx), or 64b (a5xx+), which effects the size of the
257 * UBO and stream-out consts.
260 /* user const start at zero */
262 unsigned driver_param
;
267 unsigned immediates_count
;
272 /* for astc srgb workaround, the number/base of additional
273 * alpha tex states we need, and index of original tex states
276 unsigned base
, count
;
277 unsigned orig_idx
[16];
280 /* shader variants form a linked list: */
281 struct ir3_shader_variant
*next
;
283 /* replicated here to avoid passing extra ptrs everywhere: */
285 struct ir3_shader
*shader
;
288 typedef struct nir_shader nir_shader
;
293 /* shader id (for debug): */
295 uint32_t variant_count
;
297 /* so we know when we can disable TGSI related hacks: */
300 struct ir3_compiler
*compiler
;
303 struct pipe_stream_output_info stream_output
;
305 struct ir3_shader_variant
*variants
;
308 void * ir3_shader_assemble(struct ir3_shader_variant
*v
, uint32_t gpu_id
);
310 struct ir3_shader
* ir3_shader_create(struct ir3_compiler
*compiler
,
311 const struct pipe_shader_state
*cso
, enum shader_t type
,
312 struct pipe_debug_callback
*debug
);
313 void ir3_shader_destroy(struct ir3_shader
*shader
);
314 struct ir3_shader_variant
* ir3_shader_variant(struct ir3_shader
*shader
,
315 struct ir3_shader_key key
, struct pipe_debug_callback
*debug
);
316 void ir3_shader_disasm(struct ir3_shader_variant
*so
, uint32_t *bin
);
317 uint64_t ir3_shader_outputs(const struct ir3_shader
*so
);
319 struct fd_ringbuffer
;
321 void ir3_emit_vs_consts(const struct ir3_shader_variant
*v
, struct fd_ringbuffer
*ring
,
322 struct fd_context
*ctx
, const struct pipe_draw_info
*info
);
323 void ir3_emit_fs_consts(const struct ir3_shader_variant
*v
, struct fd_ringbuffer
*ring
,
324 struct fd_context
*ctx
);
326 static inline const char *
327 ir3_shader_stage(struct ir3_shader
*shader
)
329 switch (shader
->type
) {
330 case SHADER_VERTEX
: return "VERT";
331 case SHADER_FRAGMENT
: return "FRAG";
332 case SHADER_COMPUTE
: return "CL";
334 unreachable("invalid type");
343 #include "pipe/p_shader_tokens.h"
346 ir3_find_output(const struct ir3_shader_variant
*so
, gl_varying_slot slot
)
350 for (j
= 0; j
< so
->outputs_count
; j
++)
351 if (so
->outputs
[j
].slot
== slot
)
354 /* it seems optional to have a OUT.BCOLOR[n] for each OUT.COLOR[n]
355 * in the vertex shader.. but the fragment shader doesn't know this
356 * so it will always have both IN.COLOR[n] and IN.BCOLOR[n]. So
357 * at link time if there is no matching OUT.BCOLOR[n], we must map
358 * OUT.COLOR[n] to IN.BCOLOR[n]. And visa versa if there is only
359 * a OUT.BCOLOR[n] but no matching OUT.COLOR[n]
361 if (slot
== VARYING_SLOT_BFC0
) {
362 slot
= VARYING_SLOT_COL0
;
363 } else if (slot
== VARYING_SLOT_BFC1
) {
364 slot
= VARYING_SLOT_COL1
;
365 } else if (slot
== VARYING_SLOT_COL0
) {
366 slot
= VARYING_SLOT_BFC0
;
367 } else if (slot
== VARYING_SLOT_COL1
) {
368 slot
= VARYING_SLOT_BFC1
;
373 for (j
= 0; j
< so
->outputs_count
; j
++)
374 if (so
->outputs
[j
].slot
== slot
)
383 ir3_next_varying(const struct ir3_shader_variant
*so
, int i
)
385 while (++i
< so
->inputs_count
)
386 if (so
->inputs
[i
].compmask
&& so
->inputs
[i
].bary
)
391 struct ir3_shader_linkage
{
402 ir3_link_add(struct ir3_shader_linkage
*l
, uint8_t regid
, uint8_t compmask
, uint8_t loc
)
406 debug_assert(i
< ARRAY_SIZE(l
->var
));
408 l
->var
[i
].regid
= regid
;
409 l
->var
[i
].compmask
= compmask
;
411 l
->max_loc
= MAX2(l
->max_loc
, loc
+ util_last_bit(compmask
));
415 ir3_link_shaders(struct ir3_shader_linkage
*l
,
416 const struct ir3_shader_variant
*vs
,
417 const struct ir3_shader_variant
*fs
)
421 while (l
->cnt
< ARRAY_SIZE(l
->var
)) {
422 j
= ir3_next_varying(fs
, j
);
424 if (j
>= fs
->inputs_count
)
427 if (fs
->inputs
[j
].inloc
>= fs
->total_in
)
430 k
= ir3_find_output(vs
, fs
->inputs
[j
].slot
);
432 ir3_link_add(l
, vs
->outputs
[k
].regid
,
433 fs
->inputs
[j
].compmask
, fs
->inputs
[j
].inloc
);
437 static inline uint32_t
438 ir3_find_output_regid(const struct ir3_shader_variant
*so
, unsigned slot
)
441 for (j
= 0; j
< so
->outputs_count
; j
++)
442 if (so
->outputs
[j
].slot
== slot
)
443 return so
->outputs
[j
].regid
;
447 static inline uint32_t
448 ir3_find_sysval_regid(const struct ir3_shader_variant
*so
, unsigned slot
)
451 for (j
= 0; j
< so
->inputs_count
; j
++)
452 if (so
->inputs
[j
].sysval
&& (so
->inputs
[j
].slot
== slot
))
453 return so
->inputs
[j
].regid
;
457 #endif /* IR3_SHADER_H_ */