src/gallium/drivers/freedreno/ir3/ir3_shader.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef IR3_SHADER_H_
  30 #define IR3_SHADER_H_
  31
  32 #include "ir3.h"
  33 #include "disasm.h"
  34
  35 typedef uint16_t ir3_semantic;  /* semantic name + index */
  36 static inline ir3_semantic
  37 ir3_semantic_name(uint8_t name, uint16_t index)
  38 {
  39         return (name << 8) | (index & 0xff);
  40 }
  41
  42 static inline uint8_t sem2name(ir3_semantic sem)
  43 {
  44         return sem >> 8;
  45 }
  46
  47 static inline uint16_t sem2idx(ir3_semantic sem)
  48 {
  49         return sem & 0xff;
  50 }
  51
  52 /* Configuration key used to identify a shader variant.. different
  53  * shader variants can be used to implement features not supported
  54  * in hw (two sided color), binning-pass vertex shader, etc.
  55  */
  56 struct ir3_shader_key {
  57         /* bitmask of sampler which needs coords clamped for vertex
  58          * shader:
  59          */
  60         unsigned vsaturate_s, vsaturate_t, vsaturate_r;
  61
  62         /* bitmask of sampler which needs coords clamped for frag
  63          * shader:
  64          */
  65         unsigned fsaturate_s, fsaturate_t, fsaturate_r;
  66
  67         /*
  68          * Vertex shader variant parameters:
  69          */
  70         unsigned binning_pass : 1;
  71
  72         /*
  73          * Fragment shader variant parameters:
  74          */
  75         unsigned color_two_side : 1;
  76         unsigned half_precision : 1;
  77         /* For rendering to alpha, we need a bit of special handling
  78          * since the hw always takes gl_FragColor starting from x
  79          * component, rather than figuring out to take the w component.
  80          * We could be more clever and generate variants for other
  81          * render target formats (ie. luminance formats are xxx1), but
  82          * let's start with this and see how it goes:
  83          */
  84         unsigned alpha : 1;
  85 };
  86
  87 struct ir3_shader_variant {
  88         struct fd_bo *bo;
  89
  90         struct ir3_shader_key key;
  91
  92         struct ir3_info info;
  93         struct ir3 *ir;
  94
  95         /* the instructions length is in units of instruction groups
  96          * (4 instructions, 8 dwords):
  97          */
  98         unsigned instrlen;
  99
 100         /* the constants length is in units of vec4's, and is the sum of
 101          * the uniforms and the built-in compiler constants
 102          */
 103         unsigned constlen;
 104
 105         /* About Linkage:
 106          *   + Let the frag shader determine the position/compmask for the
 107          *     varyings, since it is the place where we know if the varying
 108          *     is actually used, and if so, which components are used.  So
 109          *     what the hw calls "outloc" is taken from the "inloc" of the
 110          *     frag shader.
 111          *   + From the vert shader, we only need the output regid
 112          */
 113
 114         /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
 115          * to bary.f instructions
 116          */
 117         uint8_t pos_regid;
 118         bool frag_coord, frag_face;
 119
 120         /* varyings/outputs: */
 121         unsigned outputs_count;
 122         struct {
 123                 ir3_semantic semantic;
 124                 uint8_t regid;
 125         } outputs[16 + 2];  /* +POSITION +PSIZE */
 126         bool writes_pos, writes_psize;
 127
 128         /* vertices/inputs: */
 129         unsigned inputs_count;
 130         struct {
 131                 ir3_semantic semantic;
 132                 uint8_t regid;
 133                 uint8_t compmask;
 134                 uint8_t ncomp;
 135                 /* In theory inloc of fs should match outloc of vs.  Or
 136                  * rather the outloc of the vs is 8 plus the offset passed
 137                  * to bary.f.  Presumably that +8 is to account for
 138                  * gl_Position/gl_PointSize?
 139                  *
 140                  * NOTE inloc is currently aligned to 4 (we don't try
 141                  * to pack varyings).  Changing this would likely break
 142                  * assumptions in few places (like setting up of flat
 143                  * shading in fd3_program) so be sure to check all the
 144                  * spots where inloc is used.
 145                  */
 146                 uint8_t inloc;
 147                 uint8_t bary;
 148                 uint8_t interpolate;
 149         } inputs[16 + 2];  /* +POSITION +FACE */
 150
 151         unsigned total_in;       /* sum of inputs (scalar) */
 152
 153         /* do we have one or more texture sample instructions: */
 154         bool has_samp;
 155
 156         /* const reg # of first immediate, ie. 1 == c1
 157          * (not regid, because TGSI thinks in terms of vec4 registers,
 158          * not scalar registers)
 159          */
 160         unsigned first_immediate;
 161         unsigned immediates_count;
 162         struct {
 163                 uint32_t val[4];
 164         } immediates[64];
 165
 166         /* shader variants form a linked list: */
 167         struct ir3_shader_variant *next;
 168
 169         /* replicated here to avoid passing extra ptrs everywhere: */
 170         enum shader_t type;
 171         struct ir3_shader *shader;
 172 };
 173
 174 struct ir3_shader {
 175         enum shader_t type;
 176
 177         struct pipe_context *pctx;
 178         const struct tgsi_token *tokens;
 179
 180         struct ir3_shader_variant *variants;
 181
 182         /* so far, only used for blit_prog shader.. values for
 183          * VPC_VARYING_PS_REPL[i].MODE
 184          */
 185         uint32_t vpsrepl[4];
 186 };
 187
 188
 189 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 190                 const struct tgsi_token *tokens, enum shader_t type);
 191 void ir3_shader_destroy(struct ir3_shader *shader);
 192
 193 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 194                 struct ir3_shader_key key);
 195
 196 #endif /* IR3_SHADER_H_ */