src/gallium/drivers/freedreno/ir3/ir3_shader.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef IR3_SHADER_H_
  30 #define IR3_SHADER_H_
  31
  32 #include "ir3.h"
  33 #include "disasm.h"
  34
  35 typedef uint16_t ir3_semantic;  /* semantic name + index */
  36 static inline ir3_semantic
  37 ir3_semantic_name(uint8_t name, uint16_t index)
  38 {
  39         return (name << 8) | (index & 0xff);
  40 }
  41
  42 static inline uint8_t sem2name(ir3_semantic sem)
  43 {
  44         return sem >> 8;
  45 }
  46
  47 static inline uint16_t sem2idx(ir3_semantic sem)
  48 {
  49         return sem & 0xff;
  50 }
  51
  52 /* Configuration key used to identify a shader variant.. different
  53  * shader variants can be used to implement features not supported
  54  * in hw (two sided color), binning-pass vertex shader, etc.
  55  */
  56 struct ir3_shader_key {
  57         union {
  58                 struct {
  59                         /* do we need to check {v,f}saturate_{s,t,r}? */
  60                         unsigned has_per_samp : 1;
  61
  62                         /*
  63                          * Vertex shader variant parameters:
  64                          */
  65                         unsigned binning_pass : 1;
  66
  67                         /*
  68                          * Fragment shader variant parameters:
  69                          */
  70                         unsigned color_two_side : 1;
  71                         unsigned half_precision : 1;
  72                         /* For rendering to alpha, we need a bit of special handling
  73                          * since the hw always takes gl_FragColor starting from x
  74                          * component, rather than figuring out to take the w component.
  75                          * We could be more clever and generate variants for other
  76                          * render target formats (ie. luminance formats are xxx1), but
  77                          * let's start with this and see how it goes:
  78                          */
  79                         unsigned alpha : 1;
  80                 };
  81                 uint32_t global;
  82         };
  83
  84         /* bitmask of sampler which needs coords clamped for vertex
  85          * shader:
  86          */
  87         uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
  88
  89         /* bitmask of sampler which needs coords clamped for frag
  90          * shader:
  91          */
  92         uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
  93
  94         /* bitmask of sampler which produces integer outputs:
  95          */
  96         uint16_t vinteger_s, finteger_s;
  97 };
  98
  99 static inline bool
 100 ir3_shader_key_equal(struct ir3_shader_key *a, struct ir3_shader_key *b)
 101 {
 102         /* slow-path if we need to check {v,f}saturate_{s,t,r} */
 103         if (a->has_per_samp || b->has_per_samp)
 104                 return memcmp(a, b, sizeof(struct ir3_shader_key)) == 0;
 105         return a->global == b->global;
 106 }
 107
 108 struct ir3_shader_variant {
 109         struct fd_bo *bo;
 110
 111         struct ir3_shader_key key;
 112
 113         struct ir3_info info;
 114         struct ir3 *ir;
 115
 116         /* the instructions length is in units of instruction groups
 117          * (4 instructions for a3xx, 16 instructions for a4xx.. each
 118          * instruction is 2 dwords):
 119          */
 120         unsigned instrlen;
 121
 122         /* the constants length is in units of vec4's, and is the sum of
 123          * the uniforms and the built-in compiler constants
 124          */
 125         unsigned constlen;
 126
 127         /* About Linkage:
 128          *   + Let the frag shader determine the position/compmask for the
 129          *     varyings, since it is the place where we know if the varying
 130          *     is actually used, and if so, which components are used.  So
 131          *     what the hw calls "outloc" is taken from the "inloc" of the
 132          *     frag shader.
 133          *   + From the vert shader, we only need the output regid
 134          */
 135
 136         /* for frag shader, pos_regid holds the frag_pos, ie. what is passed
 137          * to bary.f instructions
 138          */
 139         uint8_t pos_regid;
 140         bool frag_coord, frag_face;
 141
 142         /* varyings/outputs: */
 143         unsigned outputs_count;
 144         struct {
 145                 ir3_semantic semantic;
 146                 uint8_t regid;
 147         } outputs[16 + 2];  /* +POSITION +PSIZE */
 148         bool writes_pos, writes_psize;
 149
 150         /* vertices/inputs: */
 151         unsigned inputs_count;
 152         struct {
 153                 ir3_semantic semantic;
 154                 uint8_t regid;
 155                 uint8_t compmask;
 156                 uint8_t ncomp;
 157                 /* In theory inloc of fs should match outloc of vs.  Or
 158                  * rather the outloc of the vs is 8 plus the offset passed
 159                  * to bary.f.  Presumably that +8 is to account for
 160                  * gl_Position/gl_PointSize?
 161                  *
 162                  * NOTE inloc is currently aligned to 4 (we don't try
 163                  * to pack varyings).  Changing this would likely break
 164                  * assumptions in few places (like setting up of flat
 165                  * shading in fd3_program) so be sure to check all the
 166                  * spots where inloc is used.
 167                  */
 168                 uint8_t inloc;
 169                 uint8_t bary;
 170                 uint8_t interpolate;
 171         } inputs[16 + 2];  /* +POSITION +FACE */
 172
 173         unsigned total_in;       /* sum of inputs (scalar) */
 174
 175         /* do we have one or more texture sample instructions: */
 176         bool has_samp;
 177
 178         /* do we have kill instructions: */
 179         bool has_kill;
 180
 181         /* const reg # of first immediate, ie. 1 == c1
 182          * (not regid, because TGSI thinks in terms of vec4 registers,
 183          * not scalar registers)
 184          */
 185         unsigned first_immediate;
 186         unsigned immediates_count;
 187         struct {
 188                 uint32_t val[4];
 189         } immediates[64];
 190
 191         /* shader variants form a linked list: */
 192         struct ir3_shader_variant *next;
 193
 194         /* replicated here to avoid passing extra ptrs everywhere: */
 195         enum shader_t type;
 196         struct ir3_shader *shader;
 197 };
 198
 199 struct ir3_shader {
 200         enum shader_t type;
 201
 202         struct pipe_context *pctx;
 203         const struct tgsi_token *tokens;
 204
 205         struct ir3_shader_variant *variants;
 206
 207         /* so far, only used for blit_prog shader.. values for
 208          * VPC_VARYING_PS_REPL[i].MODE
 209          */
 210         uint32_t vpsrepl[8];
 211 };
 212
 213 void * ir3_shader_assemble(struct ir3_shader_variant *v, uint32_t gpu_id);
 214
 215 struct ir3_shader * ir3_shader_create(struct pipe_context *pctx,
 216                 const struct tgsi_token *tokens, enum shader_t type);
 217 void ir3_shader_destroy(struct ir3_shader *shader);
 218 uint32_t ir3_shader_gpuid(struct ir3_shader *shader);
 219 struct ir3_shader_variant * ir3_shader_variant(struct ir3_shader *shader,
 220                 struct ir3_shader_key key);
 221
 222 /*
 223  * Helper/util:
 224  */
 225
 226 static inline int
 227 ir3_find_output(const struct ir3_shader_variant *so, ir3_semantic semantic)
 228 {
 229         int j;
 230
 231         for (j = 0; j < so->outputs_count; j++)
 232                 if (so->outputs[j].semantic == semantic)
 233                         return j;
 234
 235         /* it seems optional to have a OUT.BCOLOR[n] for each OUT.COLOR[n]
 236          * in the vertex shader.. but the fragment shader doesn't know this
 237          * so  it will always have both IN.COLOR[n] and IN.BCOLOR[n].  So
 238          * at link time if there is no matching OUT.BCOLOR[n], we must map
 239          * OUT.COLOR[n] to IN.BCOLOR[n].  And visa versa if there is only
 240          * a OUT.BCOLOR[n] but no matching OUT.COLOR[n]
 241          */
 242         if (sem2name(semantic) == TGSI_SEMANTIC_BCOLOR) {
 243                 unsigned idx = sem2idx(semantic);
 244                 semantic = ir3_semantic_name(TGSI_SEMANTIC_COLOR, idx);
 245         } else if (sem2name(semantic) == TGSI_SEMANTIC_COLOR) {
 246                 unsigned idx = sem2idx(semantic);
 247                 semantic = ir3_semantic_name(TGSI_SEMANTIC_BCOLOR, idx);
 248         } else {
 249                 return 0;
 250         }
 251
 252         for (j = 0; j < so->outputs_count; j++)
 253                 if (so->outputs[j].semantic == semantic)
 254                         return j;
 255
 256         debug_assert(0);
 257
 258         return 0;
 259 }
 260
 261 static inline int
 262 ir3_next_varying(const struct ir3_shader_variant *so, int i)
 263 {
 264         while (++i < so->inputs_count)
 265                 if (so->inputs[i].compmask && so->inputs[i].bary)
 266                         break;
 267         return i;
 268 }
 269
 270 static inline uint32_t
 271 ir3_find_output_regid(const struct ir3_shader_variant *so, ir3_semantic semantic)
 272 {
 273         int j;
 274         for (j = 0; j < so->outputs_count; j++)
 275                 if (so->outputs[j].semantic == semantic)
 276                         return so->outputs[j].regid;
 277         return regid(63, 0);
 278 }
 279
 280 #endif /* IR3_SHADER_H_ */