i915g: fixup clear params emission
[mesa.git] / src / gallium / drivers / i915 / i915_clear.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
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11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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26 **************************************************************************/
27
28 /* Authors:
29 * Brian Paul
30 */
31
32
33 #include "util/u_clear.h"
34 #include "util/u_format.h"
35 #include "util/u_pack_color.h"
36 #include "i915_context.h"
37 #include "i915_screen.h"
38 #include "i915_reg.h"
39 #include "i915_batch.h"
40 #include "i915_resource.h"
41 #include "i915_state.h"
42
43 void
44 i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
45 const union pipe_color_union *color,
46 double depth, unsigned stencil,
47 unsigned destx, unsigned desty, unsigned width, unsigned height)
48 {
49 struct i915_context *i915 = i915_context(pipe);
50 uint32_t clear_params, clear_color, clear_depth, clear_stencil,
51 clear_color8888, packed_z_stencil;
52 union util_color u_color;
53 float f_depth = depth;
54 struct i915_texture *cbuf_tex, *depth_tex;
55
56 cbuf_tex = depth_tex = NULL;
57 clear_params = 0;
58
59 if (buffers & PIPE_CLEAR_COLOR) {
60 struct pipe_surface *cbuf = i915->framebuffer.cbufs[0];
61
62 clear_params |= CLEARPARAM_WRITE_COLOR;
63 cbuf_tex = i915_texture(cbuf->texture);
64
65 util_pack_color(color->f, cbuf->format, &u_color);
66 if (util_format_get_blocksize(cbuf_tex->b.b.format) == 4)
67 clear_color = u_color.ui;
68 else
69 clear_color = (u_color.ui & 0xffff) | (u_color.ui << 16);
70
71 /* correctly swizzle clear value */
72 if (i915->current.need_target_fixup)
73 util_pack_color(color->f, cbuf->format, &u_color);
74 else
75 util_pack_color(color->f, PIPE_FORMAT_B8G8R8A8_UNORM, &u_color);
76 clear_color8888 = u_color.ui;
77 } else
78 clear_color = clear_color8888 = 0;
79
80 clear_depth = clear_stencil = 0;
81 if (buffers & PIPE_CLEAR_DEPTH) {
82 struct pipe_surface *zbuf = i915->framebuffer.zsbuf;
83
84 clear_params |= CLEARPARAM_WRITE_DEPTH;
85 depth_tex = i915_texture(zbuf->texture);
86 packed_z_stencil = util_pack_z_stencil(depth_tex->b.b.format, depth, stencil);
87
88 if (util_format_get_blocksize(depth_tex->b.b.format) == 4) {
89 /* Avoid read-modify-write if there's no stencil. */
90 if (buffers & PIPE_CLEAR_STENCIL
91 || depth_tex->b.b.format != PIPE_FORMAT_Z24_UNORM_S8_USCALED) {
92 clear_params |= CLEARPARAM_WRITE_STENCIL;
93 clear_stencil = packed_z_stencil & 0xff;
94 clear_depth = packed_z_stencil;
95 } else
96 clear_depth = packed_z_stencil & 0xffffff00;
97 } else {
98 clear_depth = (clear_depth & 0xffff) | (clear_depth << 16);
99 }
100 }
101
102 if (i915->hardware_dirty)
103 i915_emit_hardware_state(i915);
104
105 if (!BEGIN_BATCH(7 + 7)) {
106 FLUSH_BATCH(NULL);
107
108 i915_emit_hardware_state(i915);
109 i915->vbo_flushed = 1;
110
111 assert(BEGIN_BATCH(7 + 7));
112 }
113
114 OUT_BATCH(_3DSTATE_CLEAR_PARAMETERS);
115 OUT_BATCH(clear_params | CLEARPARAM_CLEAR_RECT);
116 /* Used for zone init prim */
117 OUT_BATCH(clear_color);
118 OUT_BATCH(clear_depth);
119 /* Used for clear rect prim */
120 OUT_BATCH(clear_color8888);
121 OUT_BATCH_F(f_depth);
122 OUT_BATCH(clear_stencil);
123
124 OUT_BATCH(_3DPRIMITIVE | PRIM3D_CLEAR_RECT | 5);
125 OUT_BATCH_F(destx + width);
126 OUT_BATCH_F(desty + height);
127 OUT_BATCH_F(destx);
128 OUT_BATCH_F(desty + height);
129 OUT_BATCH_F(destx);
130 OUT_BATCH_F(desty);
131
132 /* Flush after clear, its expected to be a costly operation.
133 * This is not required, just a heuristic
134 */
135 FLUSH_BATCH(NULL);
136
137 i915->last_fired_vertices = i915->fired_vertices;
138 i915->fired_vertices = 0;
139 }
140
141 /**
142 * Clear the given buffers to the specified values.
143 * No masking, no scissor (clear entire buffer).
144 */
145 void
146 i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
147 const union pipe_color_union *color,
148 double depth, unsigned stencil)
149 {
150 util_clear(pipe, &i915_context(pipe)->framebuffer, buffers, color, depth,
151 stencil);
152 }
153
154 void
155 i915_clear_render(struct pipe_context *pipe, unsigned buffers,
156 const union pipe_color_union *color,
157 double depth, unsigned stencil)
158 {
159 struct i915_context *i915 = i915_context(pipe);
160
161 if (i915->dirty)
162 i915_update_derived(i915);
163
164 i915_clear_emit(pipe, buffers, color, depth, stencil,
165 0, 0, i915->framebuffer.width, i915->framebuffer.height);
166 }