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Merge commit 'origin/7.8'
[mesa.git] / src / gallium / drivers / i915 / i915_fpc_translate.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include <stdarg.h>
30
31 #include "i915_reg.h"
32 #include "i915_context.h"
33 #include "i915_fpc.h"
34
35 #include "pipe/p_shader_tokens.h"
36 #include "util/u_math.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_parse.h"
40 #include "tgsi/tgsi_dump.h"
41
42 #include "draw/draw_vertex.h"
43
44
45 /**
46 * Simple pass-through fragment shader to use when we don't have
47 * a real shader (or it fails to compile for some reason).
48 */
49 static unsigned passthrough[] =
50 {
51 _3DSTATE_PIXEL_SHADER_PROGRAM | ((2*3)-1),
52
53 /* declare input color:
54 */
55 (D0_DCL |
56 (REG_TYPE_T << D0_TYPE_SHIFT) |
57 (T_DIFFUSE << D0_NR_SHIFT) |
58 D0_CHANNEL_ALL),
59 0,
60 0,
61
62 /* move to output color:
63 */
64 (A0_MOV |
65 (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
66 A0_DEST_CHANNEL_ALL |
67 (REG_TYPE_T << A0_SRC0_TYPE_SHIFT) |
68 (T_DIFFUSE << A0_SRC0_NR_SHIFT)),
69 0x01230000, /* .xyzw */
70 0
71 };
72
73
74 /* 1, -1/3!, 1/5!, -1/7! */
75 static const float sin_constants[4] = { 1.0,
76 -1.0f / (3 * 2 * 1),
77 1.0f / (5 * 4 * 3 * 2 * 1),
78 -1.0f / (7 * 6 * 5 * 4 * 3 * 2 * 1)
79 };
80
81 /* 1, -1/2!, 1/4!, -1/6! */
82 static const float cos_constants[4] = { 1.0,
83 -1.0f / (2 * 1),
84 1.0f / (4 * 3 * 2 * 1),
85 -1.0f / (6 * 5 * 4 * 3 * 2 * 1)
86 };
87
88
89
90 /**
91 * component-wise negation of ureg
92 */
93 static INLINE int
94 negate(int reg, int x, int y, int z, int w)
95 {
96 /* Another neat thing about the UREG representation */
97 return reg ^ (((x & 1) << UREG_CHANNEL_X_NEGATE_SHIFT) |
98 ((y & 1) << UREG_CHANNEL_Y_NEGATE_SHIFT) |
99 ((z & 1) << UREG_CHANNEL_Z_NEGATE_SHIFT) |
100 ((w & 1) << UREG_CHANNEL_W_NEGATE_SHIFT));
101 }
102
103
104 /**
105 * In the event of a translation failure, we'll generate a simple color
106 * pass-through program.
107 */
108 static void
109 i915_use_passthrough_shader(struct i915_fragment_shader *fs)
110 {
111 fs->program = (uint *) MALLOC(sizeof(passthrough));
112 if (fs->program) {
113 memcpy(fs->program, passthrough, sizeof(passthrough));
114 fs->program_len = Elements(passthrough);
115 }
116 fs->num_constants = 0;
117 }
118
119
120 void
121 i915_program_error(struct i915_fp_compile *p, const char *msg, ...)
122 {
123 va_list args;
124 char buffer[1024];
125
126 debug_printf("i915_program_error: ");
127 va_start( args, msg );
128 util_vsnprintf( buffer, sizeof(buffer), msg, args );
129 va_end( args );
130 debug_printf("%s", buffer);
131 debug_printf("\n");
132
133 p->error = 1;
134 }
135
136
137
138 /**
139 * Construct a ureg for the given source register. Will emit
140 * constants, apply swizzling and negation as needed.
141 */
142 static uint
143 src_vector(struct i915_fp_compile *p,
144 const struct tgsi_full_src_register *source)
145 {
146 uint index = source->Register.Index;
147 uint src = 0, sem_name, sem_ind;
148
149 switch (source->Register.File) {
150 case TGSI_FILE_TEMPORARY:
151 if (source->Register.Index >= I915_MAX_TEMPORARY) {
152 i915_program_error(p, "Exceeded max temporary reg");
153 return 0;
154 }
155 src = UREG(REG_TYPE_R, index);
156 break;
157 case TGSI_FILE_INPUT:
158 /* XXX: Packing COL1, FOGC into a single attribute works for
159 * texenv programs, but will fail for real fragment programs
160 * that use these attributes and expect them to be a full 4
161 * components wide. Could use a texcoord to pass these
162 * attributes if necessary, but that won't work in the general
163 * case.
164 *
165 * We also use a texture coordinate to pass wpos when possible.
166 */
167
168 sem_name = p->shader->info.input_semantic_name[index];
169 sem_ind = p->shader->info.input_semantic_index[index];
170
171 switch (sem_name) {
172 case TGSI_SEMANTIC_POSITION:
173 debug_printf("SKIP SEM POS\n");
174 /*
175 assert(p->wpos_tex != -1);
176 src = i915_emit_decl(p, REG_TYPE_T, p->wpos_tex, D0_CHANNEL_ALL);
177 */
178 break;
179 case TGSI_SEMANTIC_COLOR:
180 if (sem_ind == 0) {
181 src = i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
182 }
183 else {
184 /* secondary color */
185 assert(sem_ind == 1);
186 src = i915_emit_decl(p, REG_TYPE_T, T_SPECULAR, D0_CHANNEL_XYZ);
187 src = swizzle(src, X, Y, Z, ONE);
188 }
189 break;
190 case TGSI_SEMANTIC_FOG:
191 src = i915_emit_decl(p, REG_TYPE_T, T_FOG_W, D0_CHANNEL_W);
192 src = swizzle(src, W, W, W, W);
193 break;
194 case TGSI_SEMANTIC_GENERIC:
195 /* usually a texcoord */
196 src = i915_emit_decl(p, REG_TYPE_T, T_TEX0 + sem_ind, D0_CHANNEL_ALL);
197 break;
198 default:
199 i915_program_error(p, "Bad source->Index");
200 return 0;
201 }
202 break;
203
204 case TGSI_FILE_IMMEDIATE:
205 assert(index < p->num_immediates);
206 index = p->immediates_map[index];
207 /* fall-through */
208 case TGSI_FILE_CONSTANT:
209 src = UREG(REG_TYPE_CONST, index);
210 break;
211
212 default:
213 i915_program_error(p, "Bad source->File");
214 return 0;
215 }
216
217 src = swizzle(src,
218 source->Register.SwizzleX,
219 source->Register.SwizzleY,
220 source->Register.SwizzleZ,
221 source->Register.SwizzleW);
222
223
224 /* There's both negate-all-components and per-component negation.
225 * Try to handle both here.
226 */
227 {
228 int n = source->Register.Negate;
229 src = negate(src, n, n, n, n);
230 }
231
232 /* no abs() */
233 #if 0
234 /* XXX assertions disabled to allow arbfplight.c to run */
235 /* XXX enable these assertions, or fix things */
236 assert(!source->Register.Absolute);
237 #endif
238 return src;
239 }
240
241
242 /**
243 * Construct a ureg for a destination register.
244 */
245 static uint
246 get_result_vector(struct i915_fp_compile *p,
247 const struct tgsi_full_dst_register *dest)
248 {
249 switch (dest->Register.File) {
250 case TGSI_FILE_OUTPUT:
251 {
252 uint sem_name = p->shader->info.output_semantic_name[dest->Register.Index];
253 switch (sem_name) {
254 case TGSI_SEMANTIC_POSITION:
255 return UREG(REG_TYPE_OD, 0);
256 case TGSI_SEMANTIC_COLOR:
257 return UREG(REG_TYPE_OC, 0);
258 default:
259 i915_program_error(p, "Bad inst->DstReg.Index/semantics");
260 return 0;
261 }
262 }
263 case TGSI_FILE_TEMPORARY:
264 return UREG(REG_TYPE_R, dest->Register.Index);
265 default:
266 i915_program_error(p, "Bad inst->DstReg.File");
267 return 0;
268 }
269 }
270
271
272 /**
273 * Compute flags for saturation and writemask.
274 */
275 static uint
276 get_result_flags(const struct tgsi_full_instruction *inst)
277 {
278 const uint writeMask
279 = inst->Dst[0].Register.WriteMask;
280 uint flags = 0x0;
281
282 if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE)
283 flags |= A0_DEST_SATURATE;
284
285 if (writeMask & TGSI_WRITEMASK_X)
286 flags |= A0_DEST_CHANNEL_X;
287 if (writeMask & TGSI_WRITEMASK_Y)
288 flags |= A0_DEST_CHANNEL_Y;
289 if (writeMask & TGSI_WRITEMASK_Z)
290 flags |= A0_DEST_CHANNEL_Z;
291 if (writeMask & TGSI_WRITEMASK_W)
292 flags |= A0_DEST_CHANNEL_W;
293
294 return flags;
295 }
296
297
298 /**
299 * Convert TGSI_TEXTURE_x token to DO_SAMPLE_TYPE_x token
300 */
301 static uint
302 translate_tex_src_target(struct i915_fp_compile *p, uint tex)
303 {
304 switch (tex) {
305 case TGSI_TEXTURE_SHADOW1D:
306 /* fall-through */
307 case TGSI_TEXTURE_1D:
308 return D0_SAMPLE_TYPE_2D;
309
310 case TGSI_TEXTURE_SHADOW2D:
311 /* fall-through */
312 case TGSI_TEXTURE_2D:
313 return D0_SAMPLE_TYPE_2D;
314
315 case TGSI_TEXTURE_SHADOWRECT:
316 /* fall-through */
317 case TGSI_TEXTURE_RECT:
318 return D0_SAMPLE_TYPE_2D;
319
320 case TGSI_TEXTURE_3D:
321 return D0_SAMPLE_TYPE_VOLUME;
322
323 case TGSI_TEXTURE_CUBE:
324 return D0_SAMPLE_TYPE_CUBE;
325
326 default:
327 i915_program_error(p, "TexSrc type");
328 return 0;
329 }
330 }
331
332
333 /**
334 * Generate texel lookup instruction.
335 */
336 static void
337 emit_tex(struct i915_fp_compile *p,
338 const struct tgsi_full_instruction *inst,
339 uint opcode)
340 {
341 uint texture = inst->Texture.Texture;
342 uint unit = inst->Src[1].Register.Index;
343 uint tex = translate_tex_src_target( p, texture );
344 uint sampler = i915_emit_decl(p, REG_TYPE_S, unit, tex);
345 uint coord = src_vector( p, &inst->Src[0]);
346
347 i915_emit_texld( p,
348 get_result_vector( p, &inst->Dst[0] ),
349 get_result_flags( inst ),
350 sampler,
351 coord,
352 opcode);
353 }
354
355
356 /**
357 * Generate a simple arithmetic instruction
358 * \param opcode the i915 opcode
359 * \param numArgs the number of input/src arguments
360 */
361 static void
362 emit_simple_arith(struct i915_fp_compile *p,
363 const struct tgsi_full_instruction *inst,
364 uint opcode, uint numArgs)
365 {
366 uint arg1, arg2, arg3;
367
368 assert(numArgs <= 3);
369
370 arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->Src[0] );
371 arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->Src[1] );
372 arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->Src[2] );
373
374 i915_emit_arith( p,
375 opcode,
376 get_result_vector( p, &inst->Dst[0]),
377 get_result_flags( inst ), 0,
378 arg1,
379 arg2,
380 arg3 );
381 }
382
383
384 /** As above, but swap the first two src regs */
385 static void
386 emit_simple_arith_swap2(struct i915_fp_compile *p,
387 const struct tgsi_full_instruction *inst,
388 uint opcode, uint numArgs)
389 {
390 struct tgsi_full_instruction inst2;
391
392 assert(numArgs == 2);
393
394 /* transpose first two registers */
395 inst2 = *inst;
396 inst2.Src[0] = inst->Src[1];
397 inst2.Src[1] = inst->Src[0];
398
399 emit_simple_arith(p, &inst2, opcode, numArgs);
400 }
401
402
403 #ifndef M_PI
404 #define M_PI 3.14159265358979323846
405 #endif
406
407 /*
408 * Translate TGSI instruction to i915 instruction.
409 *
410 * Possible concerns:
411 *
412 * SIN, COS -- could use another taylor step?
413 * LIT -- results seem a little different to sw mesa
414 * LOG -- different to mesa on negative numbers, but this is conformant.
415 */
416 static void
417 i915_translate_instruction(struct i915_fp_compile *p,
418 const struct tgsi_full_instruction *inst)
419 {
420 uint writemask;
421 uint src0, src1, src2, flags;
422 uint tmp = 0;
423
424 switch (inst->Instruction.Opcode) {
425 case TGSI_OPCODE_ABS:
426 src0 = src_vector(p, &inst->Src[0]);
427 i915_emit_arith(p,
428 A0_MAX,
429 get_result_vector(p, &inst->Dst[0]),
430 get_result_flags(inst), 0,
431 src0, negate(src0, 1, 1, 1, 1), 0);
432 break;
433
434 case TGSI_OPCODE_ADD:
435 emit_simple_arith(p, inst, A0_ADD, 2);
436 break;
437
438 case TGSI_OPCODE_CMP:
439 src0 = src_vector(p, &inst->Src[0]);
440 src1 = src_vector(p, &inst->Src[1]);
441 src2 = src_vector(p, &inst->Src[2]);
442 i915_emit_arith(p, A0_CMP,
443 get_result_vector(p, &inst->Dst[0]),
444 get_result_flags(inst),
445 0, src0, src2, src1); /* NOTE: order of src2, src1 */
446 break;
447
448 case TGSI_OPCODE_COS:
449 src0 = src_vector(p, &inst->Src[0]);
450 tmp = i915_get_utemp(p);
451
452 i915_emit_arith(p,
453 A0_MUL,
454 tmp, A0_DEST_CHANNEL_X, 0,
455 src0, i915_emit_const1f(p, 1.0f / (float) (M_PI * 2.0)), 0);
456
457 i915_emit_arith(p, A0_MOD, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
458
459 /* By choosing different taylor constants, could get rid of this mul:
460 */
461 i915_emit_arith(p,
462 A0_MUL,
463 tmp, A0_DEST_CHANNEL_X, 0,
464 tmp, i915_emit_const1f(p, (float) (M_PI * 2.0)), 0);
465
466 /*
467 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
468 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
469 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
470 * result = DP4 t0, cos_constants
471 */
472 i915_emit_arith(p,
473 A0_MUL,
474 tmp, A0_DEST_CHANNEL_XY, 0,
475 swizzle(tmp, X, X, ONE, ONE),
476 swizzle(tmp, X, ONE, ONE, ONE), 0);
477
478 i915_emit_arith(p,
479 A0_MUL,
480 tmp, A0_DEST_CHANNEL_XYZ, 0,
481 swizzle(tmp, X, Y, X, ONE),
482 swizzle(tmp, X, X, ONE, ONE), 0);
483
484 i915_emit_arith(p,
485 A0_MUL,
486 tmp, A0_DEST_CHANNEL_XYZ, 0,
487 swizzle(tmp, X, X, Z, ONE),
488 swizzle(tmp, Z, ONE, ONE, ONE), 0);
489
490 i915_emit_arith(p,
491 A0_DP4,
492 get_result_vector(p, &inst->Dst[0]),
493 get_result_flags(inst), 0,
494 swizzle(tmp, ONE, Z, Y, X),
495 i915_emit_const4fv(p, cos_constants), 0);
496 break;
497
498 case TGSI_OPCODE_DP3:
499 emit_simple_arith(p, inst, A0_DP3, 2);
500 break;
501
502 case TGSI_OPCODE_DP4:
503 emit_simple_arith(p, inst, A0_DP4, 2);
504 break;
505
506 case TGSI_OPCODE_DPH:
507 src0 = src_vector(p, &inst->Src[0]);
508 src1 = src_vector(p, &inst->Src[1]);
509
510 i915_emit_arith(p,
511 A0_DP4,
512 get_result_vector(p, &inst->Dst[0]),
513 get_result_flags(inst), 0,
514 swizzle(src0, X, Y, Z, ONE), src1, 0);
515 break;
516
517 case TGSI_OPCODE_DST:
518 src0 = src_vector(p, &inst->Src[0]);
519 src1 = src_vector(p, &inst->Src[1]);
520
521 /* result[0] = 1 * 1;
522 * result[1] = a[1] * b[1];
523 * result[2] = a[2] * 1;
524 * result[3] = 1 * b[3];
525 */
526 i915_emit_arith(p,
527 A0_MUL,
528 get_result_vector(p, &inst->Dst[0]),
529 get_result_flags(inst), 0,
530 swizzle(src0, ONE, Y, Z, ONE),
531 swizzle(src1, ONE, Y, ONE, W), 0);
532 break;
533
534 case TGSI_OPCODE_END:
535 /* no-op */
536 break;
537
538 case TGSI_OPCODE_EX2:
539 src0 = src_vector(p, &inst->Src[0]);
540
541 i915_emit_arith(p,
542 A0_EXP,
543 get_result_vector(p, &inst->Dst[0]),
544 get_result_flags(inst), 0,
545 swizzle(src0, X, X, X, X), 0, 0);
546 break;
547
548 case TGSI_OPCODE_FLR:
549 emit_simple_arith(p, inst, A0_FLR, 1);
550 break;
551
552 case TGSI_OPCODE_FRC:
553 emit_simple_arith(p, inst, A0_FRC, 1);
554 break;
555
556 case TGSI_OPCODE_KIL:
557 /* kill if src[0].x < 0 || src[0].y < 0 ... */
558 src0 = src_vector(p, &inst->Src[0]);
559 tmp = i915_get_utemp(p);
560
561 i915_emit_texld(p,
562 tmp, /* dest reg: a dummy reg */
563 A0_DEST_CHANNEL_ALL, /* dest writemask */
564 0, /* sampler */
565 src0, /* coord*/
566 T0_TEXKILL); /* opcode */
567 break;
568
569 case TGSI_OPCODE_KILP:
570 assert(0); /* not tested yet */
571 break;
572
573 case TGSI_OPCODE_LG2:
574 src0 = src_vector(p, &inst->Src[0]);
575
576 i915_emit_arith(p,
577 A0_LOG,
578 get_result_vector(p, &inst->Dst[0]),
579 get_result_flags(inst), 0,
580 swizzle(src0, X, X, X, X), 0, 0);
581 break;
582
583 case TGSI_OPCODE_LIT:
584 src0 = src_vector(p, &inst->Src[0]);
585 tmp = i915_get_utemp(p);
586
587 /* tmp = max( a.xyzw, a.00zw )
588 * XXX: Clamp tmp.w to -128..128
589 * tmp.y = log(tmp.y)
590 * tmp.y = tmp.w * tmp.y
591 * tmp.y = exp(tmp.y)
592 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
593 */
594 i915_emit_arith(p, A0_MAX, tmp, A0_DEST_CHANNEL_ALL, 0,
595 src0, swizzle(src0, ZERO, ZERO, Z, W), 0);
596
597 i915_emit_arith(p, A0_LOG, tmp, A0_DEST_CHANNEL_Y, 0,
598 swizzle(tmp, Y, Y, Y, Y), 0, 0);
599
600 i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_Y, 0,
601 swizzle(tmp, ZERO, Y, ZERO, ZERO),
602 swizzle(tmp, ZERO, W, ZERO, ZERO), 0);
603
604 i915_emit_arith(p, A0_EXP, tmp, A0_DEST_CHANNEL_Y, 0,
605 swizzle(tmp, Y, Y, Y, Y), 0, 0);
606
607 i915_emit_arith(p, A0_CMP,
608 get_result_vector(p, &inst->Dst[0]),
609 get_result_flags(inst), 0,
610 negate(swizzle(tmp, ONE, ONE, X, ONE), 0, 0, 1, 0),
611 swizzle(tmp, ONE, X, ZERO, ONE),
612 swizzle(tmp, ONE, X, Y, ONE));
613
614 break;
615
616 case TGSI_OPCODE_LRP:
617 src0 = src_vector(p, &inst->Src[0]);
618 src1 = src_vector(p, &inst->Src[1]);
619 src2 = src_vector(p, &inst->Src[2]);
620 flags = get_result_flags(inst);
621 tmp = i915_get_utemp(p);
622
623 /* b*a + c*(1-a)
624 *
625 * b*a + c - ca
626 *
627 * tmp = b*a + c,
628 * result = (-c)*a + tmp
629 */
630 i915_emit_arith(p, A0_MAD, tmp,
631 flags & A0_DEST_CHANNEL_ALL, 0, src1, src0, src2);
632
633 i915_emit_arith(p, A0_MAD,
634 get_result_vector(p, &inst->Dst[0]),
635 flags, 0, negate(src2, 1, 1, 1, 1), src0, tmp);
636 break;
637
638 case TGSI_OPCODE_MAD:
639 emit_simple_arith(p, inst, A0_MAD, 3);
640 break;
641
642 case TGSI_OPCODE_MAX:
643 emit_simple_arith(p, inst, A0_MAX, 2);
644 break;
645
646 case TGSI_OPCODE_MIN:
647 src0 = src_vector(p, &inst->Src[0]);
648 src1 = src_vector(p, &inst->Src[1]);
649 tmp = i915_get_utemp(p);
650 flags = get_result_flags(inst);
651
652 i915_emit_arith(p,
653 A0_MAX,
654 tmp, flags & A0_DEST_CHANNEL_ALL, 0,
655 negate(src0, 1, 1, 1, 1),
656 negate(src1, 1, 1, 1, 1), 0);
657
658 i915_emit_arith(p,
659 A0_MOV,
660 get_result_vector(p, &inst->Dst[0]),
661 flags, 0, negate(tmp, 1, 1, 1, 1), 0, 0);
662 break;
663
664 case TGSI_OPCODE_MOV:
665 emit_simple_arith(p, inst, A0_MOV, 1);
666 break;
667
668 case TGSI_OPCODE_MUL:
669 emit_simple_arith(p, inst, A0_MUL, 2);
670 break;
671
672 case TGSI_OPCODE_POW:
673 src0 = src_vector(p, &inst->Src[0]);
674 src1 = src_vector(p, &inst->Src[1]);
675 tmp = i915_get_utemp(p);
676 flags = get_result_flags(inst);
677
678 /* XXX: masking on intermediate values, here and elsewhere.
679 */
680 i915_emit_arith(p,
681 A0_LOG,
682 tmp, A0_DEST_CHANNEL_X, 0,
683 swizzle(src0, X, X, X, X), 0, 0);
684
685 i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_X, 0, tmp, src1, 0);
686
687 i915_emit_arith(p,
688 A0_EXP,
689 get_result_vector(p, &inst->Dst[0]),
690 flags, 0, swizzle(tmp, X, X, X, X), 0, 0);
691 break;
692
693 case TGSI_OPCODE_RET:
694 /* XXX: no-op? */
695 break;
696
697 case TGSI_OPCODE_RCP:
698 src0 = src_vector(p, &inst->Src[0]);
699
700 i915_emit_arith(p,
701 A0_RCP,
702 get_result_vector(p, &inst->Dst[0]),
703 get_result_flags(inst), 0,
704 swizzle(src0, X, X, X, X), 0, 0);
705 break;
706
707 case TGSI_OPCODE_RSQ:
708 src0 = src_vector(p, &inst->Src[0]);
709
710 i915_emit_arith(p,
711 A0_RSQ,
712 get_result_vector(p, &inst->Dst[0]),
713 get_result_flags(inst), 0,
714 swizzle(src0, X, X, X, X), 0, 0);
715 break;
716
717 case TGSI_OPCODE_SCS:
718 src0 = src_vector(p, &inst->Src[0]);
719 tmp = i915_get_utemp(p);
720
721 /*
722 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
723 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
724 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
725 * scs.x = DP4 t1, sin_constants
726 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
727 * scs.y = DP4 t1, cos_constants
728 */
729 i915_emit_arith(p,
730 A0_MUL,
731 tmp, A0_DEST_CHANNEL_XY, 0,
732 swizzle(src0, X, X, ONE, ONE),
733 swizzle(src0, X, ONE, ONE, ONE), 0);
734
735 i915_emit_arith(p,
736 A0_MUL,
737 tmp, A0_DEST_CHANNEL_ALL, 0,
738 swizzle(tmp, X, Y, X, Y),
739 swizzle(tmp, X, X, ONE, ONE), 0);
740
741 writemask = inst->Dst[0].Register.WriteMask;
742
743 if (writemask & TGSI_WRITEMASK_Y) {
744 uint tmp1;
745
746 if (writemask & TGSI_WRITEMASK_X)
747 tmp1 = i915_get_utemp(p);
748 else
749 tmp1 = tmp;
750
751 i915_emit_arith(p,
752 A0_MUL,
753 tmp1, A0_DEST_CHANNEL_ALL, 0,
754 swizzle(tmp, X, Y, Y, W),
755 swizzle(tmp, X, Z, ONE, ONE), 0);
756
757 i915_emit_arith(p,
758 A0_DP4,
759 get_result_vector(p, &inst->Dst[0]),
760 A0_DEST_CHANNEL_Y, 0,
761 swizzle(tmp1, W, Z, Y, X),
762 i915_emit_const4fv(p, sin_constants), 0);
763 }
764
765 if (writemask & TGSI_WRITEMASK_X) {
766 i915_emit_arith(p,
767 A0_MUL,
768 tmp, A0_DEST_CHANNEL_XYZ, 0,
769 swizzle(tmp, X, X, Z, ONE),
770 swizzle(tmp, Z, ONE, ONE, ONE), 0);
771
772 i915_emit_arith(p,
773 A0_DP4,
774 get_result_vector(p, &inst->Dst[0]),
775 A0_DEST_CHANNEL_X, 0,
776 swizzle(tmp, ONE, Z, Y, X),
777 i915_emit_const4fv(p, cos_constants), 0);
778 }
779 break;
780
781 case TGSI_OPCODE_SGE:
782 emit_simple_arith(p, inst, A0_SGE, 2);
783 break;
784
785 case TGSI_OPCODE_SLE:
786 /* like SGE, but swap reg0, reg1 */
787 emit_simple_arith_swap2(p, inst, A0_SGE, 2);
788 break;
789
790 case TGSI_OPCODE_SIN:
791 src0 = src_vector(p, &inst->Src[0]);
792 tmp = i915_get_utemp(p);
793
794 i915_emit_arith(p,
795 A0_MUL,
796 tmp, A0_DEST_CHANNEL_X, 0,
797 src0, i915_emit_const1f(p, 1.0f / (float) (M_PI * 2.0)), 0);
798
799 i915_emit_arith(p, A0_MOD, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
800
801 /* By choosing different taylor constants, could get rid of this mul:
802 */
803 i915_emit_arith(p,
804 A0_MUL,
805 tmp, A0_DEST_CHANNEL_X, 0,
806 tmp, i915_emit_const1f(p, (float) (M_PI * 2.0)), 0);
807
808 /*
809 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
810 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
811 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
812 * result = DP4 t1.wzyx, sin_constants
813 */
814 i915_emit_arith(p,
815 A0_MUL,
816 tmp, A0_DEST_CHANNEL_XY, 0,
817 swizzle(tmp, X, X, ONE, ONE),
818 swizzle(tmp, X, ONE, ONE, ONE), 0);
819
820 i915_emit_arith(p,
821 A0_MUL,
822 tmp, A0_DEST_CHANNEL_ALL, 0,
823 swizzle(tmp, X, Y, X, Y),
824 swizzle(tmp, X, X, ONE, ONE), 0);
825
826 i915_emit_arith(p,
827 A0_MUL,
828 tmp, A0_DEST_CHANNEL_ALL, 0,
829 swizzle(tmp, X, Y, Y, W),
830 swizzle(tmp, X, Z, ONE, ONE), 0);
831
832 i915_emit_arith(p,
833 A0_DP4,
834 get_result_vector(p, &inst->Dst[0]),
835 get_result_flags(inst), 0,
836 swizzle(tmp, W, Z, Y, X),
837 i915_emit_const4fv(p, sin_constants), 0);
838 break;
839
840 case TGSI_OPCODE_SLT:
841 emit_simple_arith(p, inst, A0_SLT, 2);
842 break;
843
844 case TGSI_OPCODE_SGT:
845 /* like SLT, but swap reg0, reg1 */
846 emit_simple_arith_swap2(p, inst, A0_SLT, 2);
847 break;
848
849 case TGSI_OPCODE_SUB:
850 src0 = src_vector(p, &inst->Src[0]);
851 src1 = src_vector(p, &inst->Src[1]);
852
853 i915_emit_arith(p,
854 A0_ADD,
855 get_result_vector(p, &inst->Dst[0]),
856 get_result_flags(inst), 0,
857 src0, negate(src1, 1, 1, 1, 1), 0);
858 break;
859
860 case TGSI_OPCODE_TEX:
861 emit_tex(p, inst, T0_TEXLD);
862 break;
863
864 case TGSI_OPCODE_TXB:
865 emit_tex(p, inst, T0_TEXLDB);
866 break;
867
868 case TGSI_OPCODE_TXP:
869 emit_tex(p, inst, T0_TEXLDP);
870 break;
871
872 case TGSI_OPCODE_XPD:
873 /* Cross product:
874 * result.x = src0.y * src1.z - src0.z * src1.y;
875 * result.y = src0.z * src1.x - src0.x * src1.z;
876 * result.z = src0.x * src1.y - src0.y * src1.x;
877 * result.w = undef;
878 */
879 src0 = src_vector(p, &inst->Src[0]);
880 src1 = src_vector(p, &inst->Src[1]);
881 tmp = i915_get_utemp(p);
882
883 i915_emit_arith(p,
884 A0_MUL,
885 tmp, A0_DEST_CHANNEL_ALL, 0,
886 swizzle(src0, Z, X, Y, ONE),
887 swizzle(src1, Y, Z, X, ONE), 0);
888
889 i915_emit_arith(p,
890 A0_MAD,
891 get_result_vector(p, &inst->Dst[0]),
892 get_result_flags(inst), 0,
893 swizzle(src0, Y, Z, X, ONE),
894 swizzle(src1, Z, X, Y, ONE),
895 negate(tmp, 1, 1, 1, 0));
896 break;
897
898 default:
899 i915_program_error(p, "bad opcode %d", inst->Instruction.Opcode);
900 p->error = 1;
901 return;
902 }
903
904 i915_release_utemps(p);
905 }
906
907
908 /**
909 * Translate TGSI fragment shader into i915 hardware instructions.
910 * \param p the translation state
911 * \param tokens the TGSI token array
912 */
913 static void
914 i915_translate_instructions(struct i915_fp_compile *p,
915 const struct tgsi_token *tokens)
916 {
917 struct i915_fragment_shader *ifs = p->shader;
918 struct tgsi_parse_context parse;
919
920 tgsi_parse_init( &parse, tokens );
921
922 while( !tgsi_parse_end_of_tokens( &parse ) ) {
923
924 tgsi_parse_token( &parse );
925
926 switch( parse.FullToken.Token.Type ) {
927 case TGSI_TOKEN_TYPE_DECLARATION:
928 if (parse.FullToken.FullDeclaration.Declaration.File
929 == TGSI_FILE_CONSTANT) {
930 uint i;
931 for (i = parse.FullToken.FullDeclaration.Range.First;
932 i <= parse.FullToken.FullDeclaration.Range.Last;
933 i++) {
934 assert(ifs->constant_flags[i] == 0x0);
935 ifs->constant_flags[i] = I915_CONSTFLAG_USER;
936 ifs->num_constants = MAX2(ifs->num_constants, i + 1);
937 }
938 }
939 else if (parse.FullToken.FullDeclaration.Declaration.File
940 == TGSI_FILE_TEMPORARY) {
941 uint i;
942 for (i = parse.FullToken.FullDeclaration.Range.First;
943 i <= parse.FullToken.FullDeclaration.Range.Last;
944 i++) {
945 assert(i < I915_MAX_TEMPORARY);
946 /* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
947 p->temp_flag |= (1 << i); /* mark temp as used */
948 }
949 }
950 break;
951
952 case TGSI_TOKEN_TYPE_IMMEDIATE:
953 {
954 const struct tgsi_full_immediate *imm
955 = &parse.FullToken.FullImmediate;
956 const uint pos = p->num_immediates++;
957 uint j;
958 assert( imm->Immediate.NrTokens <= 4 + 1 );
959 for (j = 0; j < imm->Immediate.NrTokens - 1; j++) {
960 p->immediates[pos][j] = imm->u[j].Float;
961 }
962 }
963 break;
964
965 case TGSI_TOKEN_TYPE_INSTRUCTION:
966 if (p->first_instruction) {
967 /* resolve location of immediates */
968 uint i, j;
969 for (i = 0; i < p->num_immediates; i++) {
970 /* find constant slot for this immediate */
971 for (j = 0; j < I915_MAX_CONSTANT; j++) {
972 if (ifs->constant_flags[j] == 0x0) {
973 memcpy(ifs->constants[j],
974 p->immediates[i],
975 4 * sizeof(float));
976 /*printf("immediate %d maps to const %d\n", i, j);*/
977 ifs->constant_flags[j] = 0xf; /* all four comps used */
978 p->immediates_map[i] = j;
979 ifs->num_constants = MAX2(ifs->num_constants, j + 1);
980 break;
981 }
982 }
983 }
984
985 p->first_instruction = FALSE;
986 }
987
988 i915_translate_instruction(p, &parse.FullToken.FullInstruction);
989 break;
990
991 default:
992 assert( 0 );
993 }
994
995 } /* while */
996
997 tgsi_parse_free (&parse);
998 }
999
1000
1001 static struct i915_fp_compile *
1002 i915_init_compile(struct i915_context *i915,
1003 struct i915_fragment_shader *ifs)
1004 {
1005 struct i915_fp_compile *p = CALLOC_STRUCT(i915_fp_compile);
1006
1007 p->shader = ifs;
1008
1009 /* Put new constants at end of const buffer, growing downward.
1010 * The problem is we don't know how many user-defined constants might
1011 * be specified with pipe->set_constant_buffer().
1012 * Should pre-scan the user's program to determine the highest-numbered
1013 * constant referenced.
1014 */
1015 ifs->num_constants = 0;
1016 memset(ifs->constant_flags, 0, sizeof(ifs->constant_flags));
1017
1018 p->first_instruction = TRUE;
1019
1020 p->nr_tex_indirect = 1; /* correct? */
1021 p->nr_tex_insn = 0;
1022 p->nr_alu_insn = 0;
1023 p->nr_decl_insn = 0;
1024
1025 p->csr = p->program;
1026 p->decl = p->declarations;
1027 p->decl_s = 0;
1028 p->decl_t = 0;
1029 p->temp_flag = ~0x0 << I915_MAX_TEMPORARY;
1030 p->utemp_flag = ~0x7;
1031
1032 p->wpos_tex = -1;
1033
1034 /* initialize the first program word */
1035 *(p->decl++) = _3DSTATE_PIXEL_SHADER_PROGRAM;
1036
1037 return p;
1038 }
1039
1040
1041 /* Copy compile results to the fragment program struct and destroy the
1042 * compilation context.
1043 */
1044 static void
1045 i915_fini_compile(struct i915_context *i915, struct i915_fp_compile *p)
1046 {
1047 struct i915_fragment_shader *ifs = p->shader;
1048 unsigned long program_size = (unsigned long) (p->csr - p->program);
1049 unsigned long decl_size = (unsigned long) (p->decl - p->declarations);
1050
1051 if (p->nr_tex_indirect > I915_MAX_TEX_INDIRECT)
1052 i915_program_error(p, "Exceeded max nr indirect texture lookups");
1053
1054 if (p->nr_tex_insn > I915_MAX_TEX_INSN)
1055 i915_program_error(p, "Exceeded max TEX instructions");
1056
1057 if (p->nr_alu_insn > I915_MAX_ALU_INSN)
1058 i915_program_error(p, "Exceeded max ALU instructions");
1059
1060 if (p->nr_decl_insn > I915_MAX_DECL_INSN)
1061 i915_program_error(p, "Exceeded max DECL instructions");
1062
1063 if (p->error) {
1064 p->NumNativeInstructions = 0;
1065 p->NumNativeAluInstructions = 0;
1066 p->NumNativeTexInstructions = 0;
1067 p->NumNativeTexIndirections = 0;
1068
1069 i915_use_passthrough_shader(ifs);
1070 }
1071 else {
1072 p->NumNativeInstructions
1073 = p->nr_alu_insn + p->nr_tex_insn + p->nr_decl_insn;
1074 p->NumNativeAluInstructions = p->nr_alu_insn;
1075 p->NumNativeTexInstructions = p->nr_tex_insn;
1076 p->NumNativeTexIndirections = p->nr_tex_indirect;
1077
1078 /* patch in the program length */
1079 p->declarations[0] |= program_size + decl_size - 2;
1080
1081 /* Copy compilation results to fragment program struct:
1082 */
1083 assert(!ifs->program);
1084 ifs->program
1085 = (uint *) MALLOC((program_size + decl_size) * sizeof(uint));
1086 if (ifs->program) {
1087 ifs->program_len = program_size + decl_size;
1088
1089 memcpy(ifs->program,
1090 p->declarations,
1091 decl_size * sizeof(uint));
1092
1093 memcpy(ifs->program + decl_size,
1094 p->program,
1095 program_size * sizeof(uint));
1096 }
1097 }
1098
1099 /* Release the compilation struct:
1100 */
1101 FREE(p);
1102 }
1103
1104
1105 /**
1106 * Find an unused texture coordinate slot to use for fragment WPOS.
1107 * Update p->fp->wpos_tex with the result (-1 if no used texcoord slot is found).
1108 */
1109 static void
1110 i915_find_wpos_space(struct i915_fp_compile *p)
1111 {
1112 #if 0
1113 const uint inputs
1114 = p->shader->inputs_read | (1 << TGSI_ATTRIB_POS); /*XXX hack*/
1115 uint i;
1116
1117 p->wpos_tex = -1;
1118
1119 if (inputs & (1 << TGSI_ATTRIB_POS)) {
1120 for (i = 0; i < I915_TEX_UNITS; i++) {
1121 if ((inputs & (1 << (TGSI_ATTRIB_TEX0 + i))) == 0) {
1122 p->wpos_tex = i;
1123 return;
1124 }
1125 }
1126
1127 i915_program_error(p, "No free texcoord for wpos value");
1128 }
1129 #else
1130 if (p->shader->info.input_semantic_name[0] == TGSI_SEMANTIC_POSITION) {
1131 /* frag shader using the fragment position input */
1132 #if 0
1133 assert(0);
1134 #endif
1135 }
1136 #endif
1137 }
1138
1139
1140
1141
1142 /**
1143 * Rather than trying to intercept and jiggle depth writes during
1144 * emit, just move the value into its correct position at the end of
1145 * the program:
1146 */
1147 static void
1148 i915_fixup_depth_write(struct i915_fp_compile *p)
1149 {
1150 /* XXX assuming pos/depth is always in output[0] */
1151 if (p->shader->info.output_semantic_name[0] == TGSI_SEMANTIC_POSITION) {
1152 const uint depth = UREG(REG_TYPE_OD, 0);
1153
1154 i915_emit_arith(p,
1155 A0_MOV, /* opcode */
1156 depth, /* dest reg */
1157 A0_DEST_CHANNEL_W, /* write mask */
1158 0, /* saturate? */
1159 swizzle(depth, X, Y, Z, Z), /* src0 */
1160 0, 0 /* src1, src2 */);
1161 }
1162 }
1163
1164
1165 void
1166 i915_translate_fragment_program( struct i915_context *i915,
1167 struct i915_fragment_shader *fs)
1168 {
1169 struct i915_fp_compile *p = i915_init_compile(i915, fs);
1170 const struct tgsi_token *tokens = fs->state.tokens;
1171
1172 i915_find_wpos_space(p);
1173
1174 #if 0
1175 tgsi_dump(tokens, 0);
1176 #endif
1177
1178 i915_translate_instructions(p, tokens);
1179 i915_fixup_depth_write(p);
1180
1181 i915_fini_compile(i915, p);
1182 }