1 /**************************************************************************
3 * Copyright 2007 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
32 #include "i915_context.h"
34 #include "i915_debug_private.h"
36 #include "pipe/p_shader_tokens.h"
37 #include "util/u_math.h"
38 #include "util/u_memory.h"
39 #include "util/u_string.h"
40 #include "tgsi/tgsi_parse.h"
41 #include "tgsi/tgsi_dump.h"
43 #include "draw/draw_vertex.h"
46 #define M_PI 3.14159265358979323846
50 * Simple pass-through fragment shader to use when we don't have
51 * a real shader (or it fails to compile for some reason).
53 static unsigned passthrough_decl
[] =
55 _3DSTATE_PIXEL_SHADER_PROGRAM
| ((2*3)-1),
57 /* declare input color:
60 (REG_TYPE_T
<< D0_TYPE_SHIFT
) |
61 (T_DIFFUSE
<< D0_NR_SHIFT
) |
67 static unsigned passthrough_program
[] =
69 /* move to output color:
72 (REG_TYPE_OC
<< A0_DEST_TYPE_SHIFT
) |
74 (REG_TYPE_T
<< A0_SRC0_TYPE_SHIFT
) |
75 (T_DIFFUSE
<< A0_SRC0_NR_SHIFT
)),
76 0x01230000, /* .xyzw */
81 /* 1, -1/3!, 1/5!, -1/7! */
82 static const float scs_sin_constants
[4] = { 1.0,
84 1.0f
/ (5 * 4 * 3 * 2 * 1),
85 -1.0f
/ (7 * 6 * 5 * 4 * 3 * 2 * 1)
88 /* 1, -1/2!, 1/4!, -1/6! */
89 static const float scs_cos_constants
[4] = { 1.0,
91 1.0f
/ (4 * 3 * 2 * 1),
92 -1.0f
/ (6 * 5 * 4 * 3 * 2 * 1)
95 /* 2*pi, -(2*pi)^3/3!, (2*pi)^5/5!, -(2*pi)^7/7! */
96 static const float sin_constants
[4] = { 2.0 * M_PI
,
97 -8.0f
* M_PI
* M_PI
* M_PI
/ (3 * 2 * 1),
98 32.0f
* M_PI
* M_PI
* M_PI
* M_PI
* M_PI
/ (5 * 4 * 3 * 2 * 1),
99 -128.0f
* M_PI
* M_PI
* M_PI
* M_PI
* M_PI
* M_PI
* M_PI
/ (7 * 6 * 5 * 4 * 3 * 2 * 1)
102 /* 1, -(2*pi)^2/2!, (2*pi)^4/4!, -(2*pi)^6/6! */
103 static const float cos_constants
[4] = { 1.0,
104 -4.0f
* M_PI
* M_PI
/ (2 * 1),
105 16.0f
* M_PI
* M_PI
* M_PI
* M_PI
/ (4 * 3 * 2 * 1),
106 -64.0f
* M_PI
* M_PI
* M_PI
* M_PI
* M_PI
* M_PI
/ (6 * 5 * 4 * 3 * 2 * 1)
112 * component-wise negation of ureg
115 negate(int reg
, int x
, int y
, int z
, int w
)
117 /* Another neat thing about the UREG representation */
118 return reg
^ (((x
& 1) << UREG_CHANNEL_X_NEGATE_SHIFT
) |
119 ((y
& 1) << UREG_CHANNEL_Y_NEGATE_SHIFT
) |
120 ((z
& 1) << UREG_CHANNEL_Z_NEGATE_SHIFT
) |
121 ((w
& 1) << UREG_CHANNEL_W_NEGATE_SHIFT
));
126 * In the event of a translation failure, we'll generate a simple color
127 * pass-through program.
130 i915_use_passthrough_shader(struct i915_fragment_shader
*fs
)
132 fs
->program
= (uint
*) MALLOC(sizeof(passthrough_program
));
133 fs
->decl
= (uint
*) MALLOC(sizeof(passthrough_decl
));
135 memcpy(fs
->program
, passthrough_program
, sizeof(passthrough_program
));
136 memcpy(fs
->decl
, passthrough_decl
, sizeof(passthrough_decl
));
137 fs
->program_len
= ARRAY_SIZE(passthrough_program
);
138 fs
->decl_len
= ARRAY_SIZE(passthrough_decl
);
140 fs
->num_constants
= 0;
145 i915_program_error(struct i915_fp_compile
*p
, const char *msg
, ...)
150 debug_printf("i915_program_error: ");
151 va_start( args
, msg
);
152 util_vsnprintf( buffer
, sizeof(buffer
), msg
, args
);
154 debug_printf("%s", buffer
);
160 static uint
get_mapping(struct i915_fragment_shader
* fs
, int unit
)
163 for (i
= 0; i
< I915_TEX_UNITS
; i
++)
165 if (fs
->generic_mapping
[i
] == -1) {
166 fs
->generic_mapping
[i
] = unit
;
169 if (fs
->generic_mapping
[i
] == unit
)
172 debug_printf("Exceeded max generics\n");
177 * Construct a ureg for the given source register. Will emit
178 * constants, apply swizzling and negation as needed.
181 src_vector(struct i915_fp_compile
*p
,
182 const struct i915_full_src_register
*source
,
183 struct i915_fragment_shader
*fs
)
185 uint index
= source
->Register
.Index
;
186 uint src
= 0, sem_name
, sem_ind
;
188 switch (source
->Register
.File
) {
189 case TGSI_FILE_TEMPORARY
:
190 if (source
->Register
.Index
>= I915_MAX_TEMPORARY
) {
191 i915_program_error(p
, "Exceeded max temporary reg");
194 src
= UREG(REG_TYPE_R
, index
);
196 case TGSI_FILE_INPUT
:
197 /* XXX: Packing COL1, FOGC into a single attribute works for
198 * texenv programs, but will fail for real fragment programs
199 * that use these attributes and expect them to be a full 4
200 * components wide. Could use a texcoord to pass these
201 * attributes if necessary, but that won't work in the general
204 * We also use a texture coordinate to pass wpos when possible.
207 sem_name
= p
->shader
->info
.input_semantic_name
[index
];
208 sem_ind
= p
->shader
->info
.input_semantic_index
[index
];
211 case TGSI_SEMANTIC_POSITION
:
214 int real_tex_unit
= get_mapping(fs
, I915_SEMANTIC_POS
);
215 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_ALL
);
218 case TGSI_SEMANTIC_COLOR
:
220 src
= i915_emit_decl(p
, REG_TYPE_T
, T_DIFFUSE
, D0_CHANNEL_ALL
);
223 /* secondary color */
224 assert(sem_ind
== 1);
225 src
= i915_emit_decl(p
, REG_TYPE_T
, T_SPECULAR
, D0_CHANNEL_XYZ
);
226 src
= swizzle(src
, X
, Y
, Z
, ONE
);
229 case TGSI_SEMANTIC_FOG
:
230 src
= i915_emit_decl(p
, REG_TYPE_T
, T_FOG_W
, D0_CHANNEL_W
);
231 src
= swizzle(src
, W
, W
, W
, W
);
233 case TGSI_SEMANTIC_GENERIC
:
235 int real_tex_unit
= get_mapping(fs
, sem_ind
);
236 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_ALL
);
239 case TGSI_SEMANTIC_FACE
:
241 /* for back/front faces */
242 int real_tex_unit
= get_mapping(fs
, I915_SEMANTIC_FACE
);
243 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_X
);
247 i915_program_error(p
, "Bad source->Index");
252 case TGSI_FILE_IMMEDIATE
:
253 assert(index
< p
->num_immediates
);
254 index
= p
->immediates_map
[index
];
256 case TGSI_FILE_CONSTANT
:
257 src
= UREG(REG_TYPE_CONST
, index
);
261 i915_program_error(p
, "Bad source->File");
266 source
->Register
.SwizzleX
,
267 source
->Register
.SwizzleY
,
268 source
->Register
.SwizzleZ
,
269 source
->Register
.SwizzleW
);
271 /* There's both negate-all-components and per-component negation.
272 * Try to handle both here.
275 int n
= source
->Register
.Negate
;
276 src
= negate(src
, n
, n
, n
, n
);
281 /* XXX assertions disabled to allow arbfplight.c to run */
282 /* XXX enable these assertions, or fix things */
283 assert(!source
->Register
.Absolute
);
285 if (source
->Register
.Absolute
)
286 debug_printf("Unhandled absolute value\n");
293 * Construct a ureg for a destination register.
296 get_result_vector(struct i915_fp_compile
*p
,
297 const struct i915_full_dst_register
*dest
)
299 switch (dest
->Register
.File
) {
300 case TGSI_FILE_OUTPUT
:
302 uint sem_name
= p
->shader
->info
.output_semantic_name
[dest
->Register
.Index
];
304 case TGSI_SEMANTIC_POSITION
:
305 return UREG(REG_TYPE_OD
, 0);
306 case TGSI_SEMANTIC_COLOR
:
307 return UREG(REG_TYPE_OC
, 0);
309 i915_program_error(p
, "Bad inst->DstReg.Index/semantics");
313 case TGSI_FILE_TEMPORARY
:
314 return UREG(REG_TYPE_R
, dest
->Register
.Index
);
316 i915_program_error(p
, "Bad inst->DstReg.File");
323 * Compute flags for saturation and writemask.
326 get_result_flags(const struct i915_full_instruction
*inst
)
329 = inst
->Dst
[0].Register
.WriteMask
;
332 if (inst
->Instruction
.Saturate
)
333 flags
|= A0_DEST_SATURATE
;
335 if (writeMask
& TGSI_WRITEMASK_X
)
336 flags
|= A0_DEST_CHANNEL_X
;
337 if (writeMask
& TGSI_WRITEMASK_Y
)
338 flags
|= A0_DEST_CHANNEL_Y
;
339 if (writeMask
& TGSI_WRITEMASK_Z
)
340 flags
|= A0_DEST_CHANNEL_Z
;
341 if (writeMask
& TGSI_WRITEMASK_W
)
342 flags
|= A0_DEST_CHANNEL_W
;
349 * Convert TGSI_TEXTURE_x token to DO_SAMPLE_TYPE_x token
352 translate_tex_src_target(struct i915_fp_compile
*p
, uint tex
)
355 case TGSI_TEXTURE_SHADOW1D
:
357 case TGSI_TEXTURE_1D
:
358 return D0_SAMPLE_TYPE_2D
;
360 case TGSI_TEXTURE_SHADOW2D
:
362 case TGSI_TEXTURE_2D
:
363 return D0_SAMPLE_TYPE_2D
;
365 case TGSI_TEXTURE_SHADOWRECT
:
367 case TGSI_TEXTURE_RECT
:
368 return D0_SAMPLE_TYPE_2D
;
370 case TGSI_TEXTURE_3D
:
371 return D0_SAMPLE_TYPE_VOLUME
;
373 case TGSI_TEXTURE_CUBE
:
374 return D0_SAMPLE_TYPE_CUBE
;
377 i915_program_error(p
, "TexSrc type");
383 * Return the number of coords needed to access a given TGSI_TEXTURE_*
386 i915_num_coords(uint tex
)
389 case TGSI_TEXTURE_SHADOW1D
:
390 case TGSI_TEXTURE_1D
:
393 case TGSI_TEXTURE_SHADOW2D
:
394 case TGSI_TEXTURE_2D
:
395 case TGSI_TEXTURE_SHADOWRECT
:
396 case TGSI_TEXTURE_RECT
:
399 case TGSI_TEXTURE_3D
:
400 case TGSI_TEXTURE_CUBE
:
404 debug_printf("Unknown texture target for num coords");
411 * Generate texel lookup instruction.
414 emit_tex(struct i915_fp_compile
*p
,
415 const struct i915_full_instruction
*inst
,
417 struct i915_fragment_shader
* fs
)
419 uint texture
= inst
->Texture
.Texture
;
420 uint unit
= inst
->Src
[1].Register
.Index
;
421 uint tex
= translate_tex_src_target( p
, texture
);
422 uint sampler
= i915_emit_decl(p
, REG_TYPE_S
, unit
, tex
);
423 uint coord
= src_vector( p
, &inst
->Src
[0], fs
);
426 get_result_vector( p
, &inst
->Dst
[0] ),
427 get_result_flags( inst
),
431 i915_num_coords(texture
) );
436 * Generate a simple arithmetic instruction
437 * \param opcode the i915 opcode
438 * \param numArgs the number of input/src arguments
441 emit_simple_arith(struct i915_fp_compile
*p
,
442 const struct i915_full_instruction
*inst
,
443 uint opcode
, uint numArgs
,
444 struct i915_fragment_shader
*fs
)
446 uint arg1
, arg2
, arg3
;
448 assert(numArgs
<= 3);
450 arg1
= (numArgs
< 1) ? 0 : src_vector( p
, &inst
->Src
[0], fs
);
451 arg2
= (numArgs
< 2) ? 0 : src_vector( p
, &inst
->Src
[1], fs
);
452 arg3
= (numArgs
< 3) ? 0 : src_vector( p
, &inst
->Src
[2], fs
);
456 get_result_vector( p
, &inst
->Dst
[0]),
457 get_result_flags( inst
), 0,
464 /** As above, but swap the first two src regs */
466 emit_simple_arith_swap2(struct i915_fp_compile
*p
,
467 const struct i915_full_instruction
*inst
,
468 uint opcode
, uint numArgs
,
469 struct i915_fragment_shader
*fs
)
471 struct i915_full_instruction inst2
;
473 assert(numArgs
== 2);
475 /* transpose first two registers */
477 inst2
.Src
[0] = inst
->Src
[1];
478 inst2
.Src
[1] = inst
->Src
[0];
480 emit_simple_arith(p
, &inst2
, opcode
, numArgs
, fs
);
484 * Translate TGSI instruction to i915 instruction.
488 * DDX, DDY -- return 0
489 * SIN, COS -- could use another taylor step?
490 * LIT -- results seem a little different to sw mesa
491 * LOG -- different to mesa on negative numbers, but this is conformant.
494 i915_translate_instruction(struct i915_fp_compile
*p
,
495 const struct i915_full_instruction
*inst
,
496 struct i915_fragment_shader
*fs
)
499 uint src0
, src1
, src2
, flags
;
502 switch (inst
->Instruction
.Opcode
) {
503 case TGSI_OPCODE_ADD
:
504 emit_simple_arith(p
, inst
, A0_ADD
, 2, fs
);
507 case TGSI_OPCODE_CEIL
:
508 src0
= src_vector(p
, &inst
->Src
[0], fs
);
509 tmp
= i915_get_utemp(p
);
510 flags
= get_result_flags(inst
);
514 flags
& A0_DEST_CHANNEL_ALL
, 0,
515 negate(src0
, 1, 1, 1, 1), 0, 0);
518 get_result_vector(p
, &inst
->Dst
[0]),
520 negate(tmp
, 1, 1, 1, 1), 0, 0);
523 case TGSI_OPCODE_CMP
:
524 src0
= src_vector(p
, &inst
->Src
[0], fs
);
525 src1
= src_vector(p
, &inst
->Src
[1], fs
);
526 src2
= src_vector(p
, &inst
->Src
[2], fs
);
527 i915_emit_arith(p
, A0_CMP
,
528 get_result_vector(p
, &inst
->Dst
[0]),
529 get_result_flags(inst
),
530 0, src0
, src2
, src1
); /* NOTE: order of src2, src1 */
533 case TGSI_OPCODE_COS
:
534 src0
= src_vector(p
, &inst
->Src
[0], fs
);
535 tmp
= i915_get_utemp(p
);
539 tmp
, A0_DEST_CHANNEL_X
, 0,
540 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
542 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
545 * t0.xy = MUL x.xx11, x.x111 ; x^2, x, 1, 1
546 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
547 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
548 * result = DP4 t0, cos_constants
552 tmp
, A0_DEST_CHANNEL_XY
, 0,
553 swizzle(tmp
, X
, X
, ONE
, ONE
),
554 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
558 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
559 swizzle(tmp
, X
, Y
, X
, ONE
),
560 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
564 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
565 swizzle(tmp
, X
, X
, Z
, ONE
),
566 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
570 get_result_vector(p
, &inst
->Dst
[0]),
571 get_result_flags(inst
), 0,
572 swizzle(tmp
, ONE
, Z
, Y
, X
),
573 i915_emit_const4fv(p
, cos_constants
), 0);
576 case TGSI_OPCODE_DDX
:
577 case TGSI_OPCODE_DDY
:
578 /* XXX We just output 0 here */
579 debug_printf("Punting DDX/DDY\n");
580 src0
= get_result_vector(p
, &inst
->Dst
[0]);
583 get_result_vector(p
, &inst
->Dst
[0]),
584 get_result_flags(inst
), 0,
585 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
), 0, 0);
588 case TGSI_OPCODE_DP2
:
589 src0
= src_vector(p
, &inst
->Src
[0], fs
);
590 src1
= src_vector(p
, &inst
->Src
[1], fs
);
594 get_result_vector(p
, &inst
->Dst
[0]),
595 get_result_flags(inst
), 0,
596 swizzle(src0
, X
, Y
, ZERO
, ZERO
), src1
, 0);
599 case TGSI_OPCODE_DP3
:
600 emit_simple_arith(p
, inst
, A0_DP3
, 2, fs
);
603 case TGSI_OPCODE_DP4
:
604 emit_simple_arith(p
, inst
, A0_DP4
, 2, fs
);
607 case TGSI_OPCODE_DST
:
608 src0
= src_vector(p
, &inst
->Src
[0], fs
);
609 src1
= src_vector(p
, &inst
->Src
[1], fs
);
611 /* result[0] = 1 * 1;
612 * result[1] = a[1] * b[1];
613 * result[2] = a[2] * 1;
614 * result[3] = 1 * b[3];
618 get_result_vector(p
, &inst
->Dst
[0]),
619 get_result_flags(inst
), 0,
620 swizzle(src0
, ONE
, Y
, Z
, ONE
),
621 swizzle(src1
, ONE
, Y
, ONE
, W
), 0);
624 case TGSI_OPCODE_END
:
628 case TGSI_OPCODE_EX2
:
629 src0
= src_vector(p
, &inst
->Src
[0], fs
);
633 get_result_vector(p
, &inst
->Dst
[0]),
634 get_result_flags(inst
), 0,
635 swizzle(src0
, X
, X
, X
, X
), 0, 0);
638 case TGSI_OPCODE_FLR
:
639 emit_simple_arith(p
, inst
, A0_FLR
, 1, fs
);
642 case TGSI_OPCODE_FRC
:
643 emit_simple_arith(p
, inst
, A0_FRC
, 1, fs
);
646 case TGSI_OPCODE_KILL_IF
:
647 /* kill if src[0].x < 0 || src[0].y < 0 ... */
648 src0
= src_vector(p
, &inst
->Src
[0], fs
);
649 tmp
= i915_get_utemp(p
);
652 tmp
, /* dest reg: a dummy reg */
653 A0_DEST_CHANNEL_ALL
, /* dest writemask */
656 T0_TEXKILL
, /* opcode */
660 case TGSI_OPCODE_KILL
:
661 /* unconditional kill */
662 tmp
= i915_get_utemp(p
);
665 tmp
, /* dest reg: a dummy reg */
666 A0_DEST_CHANNEL_ALL
, /* dest writemask */
668 negate(swizzle(0, ONE
, ONE
, ONE
, ONE
), 1, 1, 1, 1), /* coord */
669 T0_TEXKILL
, /* opcode */
673 case TGSI_OPCODE_LG2
:
674 src0
= src_vector(p
, &inst
->Src
[0], fs
);
678 get_result_vector(p
, &inst
->Dst
[0]),
679 get_result_flags(inst
), 0,
680 swizzle(src0
, X
, X
, X
, X
), 0, 0);
683 case TGSI_OPCODE_LIT
:
684 src0
= src_vector(p
, &inst
->Src
[0], fs
);
685 tmp
= i915_get_utemp(p
);
687 /* tmp = max( a.xyzw, a.00zw )
688 * XXX: Clamp tmp.w to -128..128
690 * tmp.y = tmp.w * tmp.y
692 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
694 i915_emit_arith(p
, A0_MAX
, tmp
, A0_DEST_CHANNEL_ALL
, 0,
695 src0
, swizzle(src0
, ZERO
, ZERO
, Z
, W
), 0);
697 i915_emit_arith(p
, A0_LOG
, tmp
, A0_DEST_CHANNEL_Y
, 0,
698 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
700 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_Y
, 0,
701 swizzle(tmp
, ZERO
, Y
, ZERO
, ZERO
),
702 swizzle(tmp
, ZERO
, W
, ZERO
, ZERO
), 0);
704 i915_emit_arith(p
, A0_EXP
, tmp
, A0_DEST_CHANNEL_Y
, 0,
705 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
707 i915_emit_arith(p
, A0_CMP
,
708 get_result_vector(p
, &inst
->Dst
[0]),
709 get_result_flags(inst
), 0,
710 negate(swizzle(tmp
, ONE
, ONE
, X
, ONE
), 0, 0, 1, 0),
711 swizzle(tmp
, ONE
, X
, ZERO
, ONE
),
712 swizzle(tmp
, ONE
, X
, Y
, ONE
));
716 case TGSI_OPCODE_LRP
:
717 src0
= src_vector(p
, &inst
->Src
[0], fs
);
718 src1
= src_vector(p
, &inst
->Src
[1], fs
);
719 src2
= src_vector(p
, &inst
->Src
[2], fs
);
720 flags
= get_result_flags(inst
);
721 tmp
= i915_get_utemp(p
);
728 * result = (-c)*a + tmp
730 i915_emit_arith(p
, A0_MAD
, tmp
,
731 flags
& A0_DEST_CHANNEL_ALL
, 0, src1
, src0
, src2
);
733 i915_emit_arith(p
, A0_MAD
,
734 get_result_vector(p
, &inst
->Dst
[0]),
735 flags
, 0, negate(src2
, 1, 1, 1, 1), src0
, tmp
);
738 case TGSI_OPCODE_MAD
:
739 emit_simple_arith(p
, inst
, A0_MAD
, 3, fs
);
742 case TGSI_OPCODE_MAX
:
743 emit_simple_arith(p
, inst
, A0_MAX
, 2, fs
);
746 case TGSI_OPCODE_MIN
:
747 emit_simple_arith(p
, inst
, A0_MIN
, 2, fs
);
750 case TGSI_OPCODE_MOV
:
751 emit_simple_arith(p
, inst
, A0_MOV
, 1, fs
);
754 case TGSI_OPCODE_MUL
:
755 emit_simple_arith(p
, inst
, A0_MUL
, 2, fs
);
758 case TGSI_OPCODE_NOP
:
761 case TGSI_OPCODE_POW
:
762 src0
= src_vector(p
, &inst
->Src
[0], fs
);
763 src1
= src_vector(p
, &inst
->Src
[1], fs
);
764 tmp
= i915_get_utemp(p
);
765 flags
= get_result_flags(inst
);
767 /* XXX: masking on intermediate values, here and elsewhere.
771 tmp
, A0_DEST_CHANNEL_X
, 0,
772 swizzle(src0
, X
, X
, X
, X
), 0, 0);
774 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, src1
, 0);
778 get_result_vector(p
, &inst
->Dst
[0]),
779 flags
, 0, swizzle(tmp
, X
, X
, X
, X
), 0, 0);
782 case TGSI_OPCODE_RET
:
786 case TGSI_OPCODE_RCP
:
787 src0
= src_vector(p
, &inst
->Src
[0], fs
);
791 get_result_vector(p
, &inst
->Dst
[0]),
792 get_result_flags(inst
), 0,
793 swizzle(src0
, X
, X
, X
, X
), 0, 0);
796 case TGSI_OPCODE_RSQ
:
797 src0
= src_vector(p
, &inst
->Src
[0], fs
);
801 get_result_vector(p
, &inst
->Dst
[0]),
802 get_result_flags(inst
), 0,
803 swizzle(src0
, X
, X
, X
, X
), 0, 0);
806 case TGSI_OPCODE_SCS
:
807 src0
= src_vector(p
, &inst
->Src
[0], fs
);
808 tmp
= i915_get_utemp(p
);
811 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
812 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
813 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
814 * scs.x = DP4 t1, scs_sin_constants
815 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
816 * scs.y = DP4 t1, scs_cos_constants
820 tmp
, A0_DEST_CHANNEL_XY
, 0,
821 swizzle(src0
, X
, X
, ONE
, ONE
),
822 swizzle(src0
, X
, ONE
, ONE
, ONE
), 0);
826 tmp
, A0_DEST_CHANNEL_ALL
, 0,
827 swizzle(tmp
, X
, Y
, X
, Y
),
828 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
830 writemask
= inst
->Dst
[0].Register
.WriteMask
;
832 if (writemask
& TGSI_WRITEMASK_Y
) {
835 if (writemask
& TGSI_WRITEMASK_X
)
836 tmp1
= i915_get_utemp(p
);
842 tmp1
, A0_DEST_CHANNEL_ALL
, 0,
843 swizzle(tmp
, X
, Y
, Y
, W
),
844 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
848 get_result_vector(p
, &inst
->Dst
[0]),
849 A0_DEST_CHANNEL_Y
, 0,
850 swizzle(tmp1
, W
, Z
, Y
, X
),
851 i915_emit_const4fv(p
, scs_sin_constants
), 0);
854 if (writemask
& TGSI_WRITEMASK_X
) {
857 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
858 swizzle(tmp
, X
, X
, Z
, ONE
),
859 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
863 get_result_vector(p
, &inst
->Dst
[0]),
864 A0_DEST_CHANNEL_X
, 0,
865 swizzle(tmp
, ONE
, Z
, Y
, X
),
866 i915_emit_const4fv(p
, scs_cos_constants
), 0);
870 case TGSI_OPCODE_SEQ
:
871 /* if we're both >= and <= then we're == */
872 src0
= src_vector(p
, &inst
->Src
[0], fs
);
873 src1
= src_vector(p
, &inst
->Src
[1], fs
);
874 tmp
= i915_get_utemp(p
);
878 tmp
, A0_DEST_CHANNEL_ALL
, 0,
884 get_result_vector(p
, &inst
->Dst
[0]),
885 A0_DEST_CHANNEL_ALL
, 0,
891 get_result_vector(p
, &inst
->Dst
[0]),
892 A0_DEST_CHANNEL_ALL
, 0,
893 get_result_vector(p
, &inst
->Dst
[0]),
898 case TGSI_OPCODE_SGE
:
899 emit_simple_arith(p
, inst
, A0_SGE
, 2, fs
);
902 case TGSI_OPCODE_SIN
:
903 src0
= src_vector(p
, &inst
->Src
[0], fs
);
904 tmp
= i915_get_utemp(p
);
908 tmp
, A0_DEST_CHANNEL_X
, 0,
909 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
911 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
914 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
915 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
916 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
917 * result = DP4 t1.wzyx, sin_constants
921 tmp
, A0_DEST_CHANNEL_XY
, 0,
922 swizzle(tmp
, X
, X
, ONE
, ONE
),
923 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
927 tmp
, A0_DEST_CHANNEL_ALL
, 0,
928 swizzle(tmp
, X
, Y
, X
, Y
),
929 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
933 tmp
, A0_DEST_CHANNEL_ALL
, 0,
934 swizzle(tmp
, X
, Y
, Y
, W
),
935 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
939 get_result_vector(p
, &inst
->Dst
[0]),
940 get_result_flags(inst
), 0,
941 swizzle(tmp
, W
, Z
, Y
, X
),
942 i915_emit_const4fv(p
, sin_constants
), 0);
945 case TGSI_OPCODE_SLE
:
946 /* like SGE, but swap reg0, reg1 */
947 emit_simple_arith_swap2(p
, inst
, A0_SGE
, 2, fs
);
950 case TGSI_OPCODE_SLT
:
951 emit_simple_arith(p
, inst
, A0_SLT
, 2, fs
);
954 case TGSI_OPCODE_SGT
:
955 /* like SLT, but swap reg0, reg1 */
956 emit_simple_arith_swap2(p
, inst
, A0_SLT
, 2, fs
);
959 case TGSI_OPCODE_SNE
:
960 /* if we're < or > then we're != */
961 src0
= src_vector(p
, &inst
->Src
[0], fs
);
962 src1
= src_vector(p
, &inst
->Src
[1], fs
);
963 tmp
= i915_get_utemp(p
);
968 A0_DEST_CHANNEL_ALL
, 0,
974 get_result_vector(p
, &inst
->Dst
[0]),
975 A0_DEST_CHANNEL_ALL
, 0,
981 get_result_vector(p
, &inst
->Dst
[0]),
982 A0_DEST_CHANNEL_ALL
, 0,
983 get_result_vector(p
, &inst
->Dst
[0]),
987 case TGSI_OPCODE_SSG
:
988 /* compute (src>0) - (src<0) */
989 src0
= src_vector(p
, &inst
->Src
[0], fs
);
990 tmp
= i915_get_utemp(p
);
995 A0_DEST_CHANNEL_ALL
, 0,
997 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
), 0);
1001 get_result_vector(p
, &inst
->Dst
[0]),
1002 A0_DEST_CHANNEL_ALL
, 0,
1003 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
),
1008 get_result_vector(p
, &inst
->Dst
[0]),
1009 A0_DEST_CHANNEL_ALL
, 0,
1010 get_result_vector(p
, &inst
->Dst
[0]),
1011 negate(tmp
, 1, 1, 1, 1), 0);
1014 case TGSI_OPCODE_TEX
:
1015 emit_tex(p
, inst
, T0_TEXLD
, fs
);
1018 case TGSI_OPCODE_TRUNC
:
1019 emit_simple_arith(p
, inst
, A0_TRC
, 1, fs
);
1022 case TGSI_OPCODE_TXB
:
1023 emit_tex(p
, inst
, T0_TEXLDB
, fs
);
1026 case TGSI_OPCODE_TXP
:
1027 emit_tex(p
, inst
, T0_TEXLDP
, fs
);
1031 i915_program_error(p
, "bad opcode %d", inst
->Instruction
.Opcode
);
1036 i915_release_utemps(p
);
1040 static void i915_translate_token(struct i915_fp_compile
*p
,
1041 const union i915_full_token
*token
,
1042 struct i915_fragment_shader
*fs
)
1044 struct i915_fragment_shader
*ifs
= p
->shader
;
1045 switch( token
->Token
.Type
) {
1046 case TGSI_TOKEN_TYPE_PROPERTY
:
1048 * We only support one cbuf, but we still need to ignore the property
1049 * correctly so we don't hit the assert at the end of the switch case.
1051 assert(token
->FullProperty
.Property
.PropertyName
==
1052 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
);
1055 case TGSI_TOKEN_TYPE_DECLARATION
:
1056 if (token
->FullDeclaration
.Declaration
.File
1057 == TGSI_FILE_CONSTANT
) {
1059 for (i
= token
->FullDeclaration
.Range
.First
;
1060 i
<= MIN2(token
->FullDeclaration
.Range
.Last
, I915_MAX_CONSTANT
- 1);
1062 assert(ifs
->constant_flags
[i
] == 0x0);
1063 ifs
->constant_flags
[i
] = I915_CONSTFLAG_USER
;
1064 ifs
->num_constants
= MAX2(ifs
->num_constants
, i
+ 1);
1067 else if (token
->FullDeclaration
.Declaration
.File
1068 == TGSI_FILE_TEMPORARY
) {
1070 for (i
= token
->FullDeclaration
.Range
.First
;
1071 i
<= token
->FullDeclaration
.Range
.Last
;
1073 if (i
>= I915_MAX_TEMPORARY
)
1074 debug_printf("Too many temps (%d)\n",i
);
1076 /* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
1077 p
->temp_flag
|= (1 << i
); /* mark temp as used */
1082 case TGSI_TOKEN_TYPE_IMMEDIATE
:
1084 const struct tgsi_full_immediate
*imm
1085 = &token
->FullImmediate
;
1086 const uint pos
= p
->num_immediates
++;
1088 assert( imm
->Immediate
.NrTokens
<= 4 + 1 );
1089 for (j
= 0; j
< imm
->Immediate
.NrTokens
- 1; j
++) {
1090 p
->immediates
[pos
][j
] = imm
->u
[j
].Float
;
1095 case TGSI_TOKEN_TYPE_INSTRUCTION
:
1096 if (p
->first_instruction
) {
1097 /* resolve location of immediates */
1099 for (i
= 0; i
< p
->num_immediates
; i
++) {
1100 /* find constant slot for this immediate */
1101 for (j
= 0; j
< I915_MAX_CONSTANT
; j
++) {
1102 if (ifs
->constant_flags
[j
] == 0x0) {
1103 memcpy(ifs
->constants
[j
],
1106 /*printf("immediate %d maps to const %d\n", i, j);*/
1107 ifs
->constant_flags
[j
] = 0xf; /* all four comps used */
1108 p
->immediates_map
[i
] = j
;
1109 ifs
->num_constants
= MAX2(ifs
->num_constants
, j
+ 1);
1115 p
->first_instruction
= FALSE
;
1118 i915_translate_instruction(p
, &token
->FullInstruction
, fs
);
1128 * Translate TGSI fragment shader into i915 hardware instructions.
1129 * \param p the translation state
1130 * \param tokens the TGSI token array
1133 i915_translate_instructions(struct i915_fp_compile
*p
,
1134 const struct i915_token_list
*tokens
,
1135 struct i915_fragment_shader
*fs
)
1138 for(i
= 0; i
<tokens
->NumTokens
; i
++) {
1139 i915_translate_token(p
, &tokens
->Tokens
[i
], fs
);
1144 static struct i915_fp_compile
*
1145 i915_init_compile(struct i915_context
*i915
,
1146 struct i915_fragment_shader
*ifs
)
1148 struct i915_fp_compile
*p
= CALLOC_STRUCT(i915_fp_compile
);
1153 /* Put new constants at end of const buffer, growing downward.
1154 * The problem is we don't know how many user-defined constants might
1155 * be specified with pipe->set_constant_buffer().
1156 * Should pre-scan the user's program to determine the highest-numbered
1157 * constant referenced.
1159 ifs
->num_constants
= 0;
1160 memset(ifs
->constant_flags
, 0, sizeof(ifs
->constant_flags
));
1162 memset(&p
->register_phases
, 0, sizeof(p
->register_phases
));
1164 for (i
= 0; i
< I915_TEX_UNITS
; i
++)
1165 ifs
->generic_mapping
[i
] = -1;
1167 p
->first_instruction
= TRUE
;
1169 p
->nr_tex_indirect
= 1; /* correct? */
1172 p
->nr_decl_insn
= 0;
1174 p
->csr
= p
->program
;
1175 p
->decl
= p
->declarations
;
1178 p
->temp_flag
= ~0x0 << I915_MAX_TEMPORARY
;
1179 p
->utemp_flag
= ~0x7;
1181 /* initialize the first program word */
1182 *(p
->decl
++) = _3DSTATE_PIXEL_SHADER_PROGRAM
;
1188 /* Copy compile results to the fragment program struct and destroy the
1189 * compilation context.
1192 i915_fini_compile(struct i915_context
*i915
, struct i915_fp_compile
*p
)
1194 struct i915_fragment_shader
*ifs
= p
->shader
;
1195 unsigned long program_size
= (unsigned long) (p
->csr
- p
->program
);
1196 unsigned long decl_size
= (unsigned long) (p
->decl
- p
->declarations
);
1198 if (p
->nr_tex_indirect
> I915_MAX_TEX_INDIRECT
)
1199 debug_printf("Exceeded max nr indirect texture lookups\n");
1201 if (p
->nr_tex_insn
> I915_MAX_TEX_INSN
)
1202 i915_program_error(p
, "Exceeded max TEX instructions");
1204 if (p
->nr_alu_insn
> I915_MAX_ALU_INSN
)
1205 i915_program_error(p
, "Exceeded max ALU instructions");
1207 if (p
->nr_decl_insn
> I915_MAX_DECL_INSN
)
1208 i915_program_error(p
, "Exceeded max DECL instructions");
1211 p
->NumNativeInstructions
= 0;
1212 p
->NumNativeAluInstructions
= 0;
1213 p
->NumNativeTexInstructions
= 0;
1214 p
->NumNativeTexIndirections
= 0;
1216 i915_use_passthrough_shader(ifs
);
1219 p
->NumNativeInstructions
1220 = p
->nr_alu_insn
+ p
->nr_tex_insn
+ p
->nr_decl_insn
;
1221 p
->NumNativeAluInstructions
= p
->nr_alu_insn
;
1222 p
->NumNativeTexInstructions
= p
->nr_tex_insn
;
1223 p
->NumNativeTexIndirections
= p
->nr_tex_indirect
;
1225 /* patch in the program length */
1226 p
->declarations
[0] |= program_size
+ decl_size
- 2;
1228 /* Copy compilation results to fragment program struct:
1231 assert(!ifs
->program
);
1234 = (uint
*) MALLOC(decl_size
* sizeof(uint
));
1236 = (uint
*) MALLOC(program_size
* sizeof(uint
));
1239 ifs
->decl_len
= decl_size
;
1243 decl_size
* sizeof(uint
));
1247 ifs
->program_len
= program_size
;
1249 memcpy(ifs
->program
,
1251 program_size
* sizeof(uint
));
1255 /* Release the compilation struct:
1265 * Rather than trying to intercept and jiggle depth writes during
1266 * emit, just move the value into its correct position at the end of
1270 i915_fixup_depth_write(struct i915_fp_compile
*p
)
1272 /* XXX assuming pos/depth is always in output[0] */
1273 if (p
->shader
->info
.output_semantic_name
[0] == TGSI_SEMANTIC_POSITION
) {
1274 const uint depth
= UREG(REG_TYPE_OD
, 0);
1277 A0_MOV
, /* opcode */
1278 depth
, /* dest reg */
1279 A0_DEST_CHANNEL_W
, /* write mask */
1281 swizzle(depth
, X
, Y
, Z
, Z
), /* src0 */
1282 0, 0 /* src1, src2 */);
1288 i915_translate_fragment_program( struct i915_context
*i915
,
1289 struct i915_fragment_shader
*fs
)
1291 struct i915_fp_compile
*p
;
1292 const struct tgsi_token
*tokens
= fs
->state
.tokens
;
1293 struct i915_token_list
* i_tokens
;
1296 tgsi_dump(tokens
, 0);
1299 /* hw doesn't seem to like empty frag programs, even when the depth write
1300 * fixup gets emitted below - may that one is fishy, too? */
1301 if (fs
->info
.num_instructions
== 1) {
1302 i915_use_passthrough_shader(fs
);
1307 p
= i915_init_compile(i915
, fs
);
1309 i_tokens
= i915_optimize(tokens
);
1310 i915_translate_instructions(p
, i_tokens
, fs
);
1311 i915_fixup_depth_write(p
);
1313 i915_fini_compile(i915
, p
);
1314 i915_optimize_free(i_tokens
);
1317 i915_disassemble_program(NULL
, fs
->program
, fs
->program_len
);