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[mesa.git] / src / gallium / drivers / i915 / i915_fpc_translate.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include <stdarg.h>
30
31 #include "i915_reg.h"
32 #include "i915_context.h"
33 #include "i915_fpc.h"
34
35 #include "pipe/p_shader_tokens.h"
36 #include "util/u_math.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_parse.h"
40 #include "tgsi/tgsi_dump.h"
41
42 #include "draw/draw_vertex.h"
43
44 #ifndef M_PI
45 #define M_PI 3.14159265358979323846
46 #endif
47
48 /**
49 * Simple pass-through fragment shader to use when we don't have
50 * a real shader (or it fails to compile for some reason).
51 */
52 static unsigned passthrough[] =
53 {
54 _3DSTATE_PIXEL_SHADER_PROGRAM | ((2*3)-1),
55
56 /* declare input color:
57 */
58 (D0_DCL |
59 (REG_TYPE_T << D0_TYPE_SHIFT) |
60 (T_DIFFUSE << D0_NR_SHIFT) |
61 D0_CHANNEL_ALL),
62 0,
63 0,
64
65 /* move to output color:
66 */
67 (A0_MOV |
68 (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
69 A0_DEST_CHANNEL_ALL |
70 (REG_TYPE_T << A0_SRC0_TYPE_SHIFT) |
71 (T_DIFFUSE << A0_SRC0_NR_SHIFT)),
72 0x01230000, /* .xyzw */
73 0
74 };
75
76
77 /* 1, -1/3!, 1/5!, -1/7! */
78 static const float scs_sin_constants[4] = { 1.0,
79 -1.0f / (3 * 2 * 1),
80 1.0f / (5 * 4 * 3 * 2 * 1),
81 -1.0f / (7 * 6 * 5 * 4 * 3 * 2 * 1)
82 };
83
84 /* 1, -1/2!, 1/4!, -1/6! */
85 static const float scs_cos_constants[4] = { 1.0,
86 -1.0f / (2 * 1),
87 1.0f / (4 * 3 * 2 * 1),
88 -1.0f / (6 * 5 * 4 * 3 * 2 * 1)
89 };
90
91 /* 2*pi, -(2*pi)^3/3!, (2*pi)^5/5!, -(2*pi)^7/7! */
92 static const float sin_constants[4] = { 2.0 * M_PI,
93 -8.0f * M_PI * M_PI * M_PI / (3 * 2 * 1),
94 32.0f * M_PI * M_PI * M_PI * M_PI * M_PI / (5 * 4 * 3 * 2 * 1),
95 -128.0f * M_PI * M_PI * M_PI * M_PI * M_PI * M_PI * M_PI / (7 * 6 * 5 * 4 * 3 * 2 * 1)
96 };
97
98 /* 1, -(2*pi)^2/2!, (2*pi)^4/4!, -(2*pi)^6/6! */
99 static const float cos_constants[4] = { 1.0,
100 -4.0f * M_PI * M_PI / (2 * 1),
101 16.0f * M_PI * M_PI * M_PI * M_PI / (4 * 3 * 2 * 1),
102 -64.0f * M_PI * M_PI * M_PI * M_PI * M_PI * M_PI / (6 * 5 * 4 * 3 * 2 * 1)
103 };
104
105
106
107 /**
108 * component-wise negation of ureg
109 */
110 static INLINE int
111 negate(int reg, int x, int y, int z, int w)
112 {
113 /* Another neat thing about the UREG representation */
114 return reg ^ (((x & 1) << UREG_CHANNEL_X_NEGATE_SHIFT) |
115 ((y & 1) << UREG_CHANNEL_Y_NEGATE_SHIFT) |
116 ((z & 1) << UREG_CHANNEL_Z_NEGATE_SHIFT) |
117 ((w & 1) << UREG_CHANNEL_W_NEGATE_SHIFT));
118 }
119
120
121 /**
122 * In the event of a translation failure, we'll generate a simple color
123 * pass-through program.
124 */
125 static void
126 i915_use_passthrough_shader(struct i915_fragment_shader *fs)
127 {
128 fs->program = (uint *) MALLOC(sizeof(passthrough));
129 if (fs->program) {
130 memcpy(fs->program, passthrough, sizeof(passthrough));
131 fs->program_len = Elements(passthrough);
132 }
133 fs->num_constants = 0;
134 }
135
136
137 void
138 i915_program_error(struct i915_fp_compile *p, const char *msg, ...)
139 {
140 va_list args;
141 char buffer[1024];
142
143 debug_printf("i915_program_error: ");
144 va_start( args, msg );
145 util_vsnprintf( buffer, sizeof(buffer), msg, args );
146 va_end( args );
147 debug_printf("%s", buffer);
148 debug_printf("\n");
149
150 p->error = 1;
151 }
152
153 static uint get_mapping(struct i915_fragment_shader* fs, int unit)
154 {
155 int i;
156 for (i = 0; i < I915_TEX_UNITS; i++)
157 {
158 if (fs->generic_mapping[i] == -1) {
159 fs->generic_mapping[i] = unit;
160 return i;
161 }
162 if (fs->generic_mapping[i] == unit)
163 return i;
164 }
165 debug_printf("Exceeded max generics\n");
166 return 0;
167 }
168
169 /**
170 * Construct a ureg for the given source register. Will emit
171 * constants, apply swizzling and negation as needed.
172 */
173 static uint
174 src_vector(struct i915_fp_compile *p,
175 const struct i915_full_src_register *source,
176 struct i915_fragment_shader* fs)
177 {
178 uint index = source->Register.Index;
179 uint src = 0, sem_name, sem_ind;
180
181 switch (source->Register.File) {
182 case TGSI_FILE_TEMPORARY:
183 if (source->Register.Index >= I915_MAX_TEMPORARY) {
184 i915_program_error(p, "Exceeded max temporary reg");
185 return 0;
186 }
187 src = UREG(REG_TYPE_R, index);
188 break;
189 case TGSI_FILE_INPUT:
190 /* XXX: Packing COL1, FOGC into a single attribute works for
191 * texenv programs, but will fail for real fragment programs
192 * that use these attributes and expect them to be a full 4
193 * components wide. Could use a texcoord to pass these
194 * attributes if necessary, but that won't work in the general
195 * case.
196 *
197 * We also use a texture coordinate to pass wpos when possible.
198 */
199
200 sem_name = p->shader->info.input_semantic_name[index];
201 sem_ind = p->shader->info.input_semantic_index[index];
202
203 switch (sem_name) {
204 case TGSI_SEMANTIC_POSITION:
205 {
206 /* for fragcoord */
207 int real_tex_unit = get_mapping(fs, I915_SEMANTIC_POS);
208 src = i915_emit_decl(p, REG_TYPE_T, T_TEX0 + real_tex_unit, D0_CHANNEL_ALL);
209 break;
210 }
211 case TGSI_SEMANTIC_COLOR:
212 if (sem_ind == 0) {
213 src = i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
214 }
215 else {
216 /* secondary color */
217 assert(sem_ind == 1);
218 src = i915_emit_decl(p, REG_TYPE_T, T_SPECULAR, D0_CHANNEL_XYZ);
219 src = swizzle(src, X, Y, Z, ONE);
220 }
221 break;
222 case TGSI_SEMANTIC_FOG:
223 src = i915_emit_decl(p, REG_TYPE_T, T_FOG_W, D0_CHANNEL_W);
224 src = swizzle(src, W, W, W, W);
225 break;
226 case TGSI_SEMANTIC_GENERIC:
227 {
228 int real_tex_unit = get_mapping(fs, sem_ind);
229 src = i915_emit_decl(p, REG_TYPE_T, T_TEX0 + real_tex_unit, D0_CHANNEL_ALL);
230 break;
231 }
232 case TGSI_SEMANTIC_FACE:
233 {
234 /* for back/front faces */
235 int real_tex_unit = get_mapping(fs, I915_SEMANTIC_FACE);
236 src = i915_emit_decl(p, REG_TYPE_T, T_TEX0 + real_tex_unit, D0_CHANNEL_X);
237 break;
238 }
239 default:
240 i915_program_error(p, "Bad source->Index");
241 return 0;
242 }
243 break;
244
245 case TGSI_FILE_IMMEDIATE:
246 assert(index < p->num_immediates);
247 index = p->immediates_map[index];
248 /* fall-through */
249 case TGSI_FILE_CONSTANT:
250 src = UREG(REG_TYPE_CONST, index);
251 break;
252
253 default:
254 i915_program_error(p, "Bad source->File");
255 return 0;
256 }
257
258 src = swizzle(src,
259 source->Register.SwizzleX,
260 source->Register.SwizzleY,
261 source->Register.SwizzleZ,
262 source->Register.SwizzleW);
263
264 /* There's both negate-all-components and per-component negation.
265 * Try to handle both here.
266 */
267 {
268 int n = source->Register.Negate;
269 src = negate(src, n, n, n, n);
270 }
271
272 /* no abs() */
273 #if 0
274 /* XXX assertions disabled to allow arbfplight.c to run */
275 /* XXX enable these assertions, or fix things */
276 assert(!source->Register.Absolute);
277 #endif
278 if (source->Register.Absolute)
279 debug_printf("Unhandled absolute value\n");
280
281 return src;
282 }
283
284
285 /**
286 * Construct a ureg for a destination register.
287 */
288 static uint
289 get_result_vector(struct i915_fp_compile *p,
290 const struct i915_full_dst_register *dest)
291 {
292 switch (dest->Register.File) {
293 case TGSI_FILE_OUTPUT:
294 {
295 uint sem_name = p->shader->info.output_semantic_name[dest->Register.Index];
296 switch (sem_name) {
297 case TGSI_SEMANTIC_POSITION:
298 return UREG(REG_TYPE_OD, 0);
299 case TGSI_SEMANTIC_COLOR:
300 return UREG(REG_TYPE_OC, 0);
301 default:
302 i915_program_error(p, "Bad inst->DstReg.Index/semantics");
303 return 0;
304 }
305 }
306 case TGSI_FILE_TEMPORARY:
307 return UREG(REG_TYPE_R, dest->Register.Index);
308 default:
309 i915_program_error(p, "Bad inst->DstReg.File");
310 return 0;
311 }
312 }
313
314
315 /**
316 * Compute flags for saturation and writemask.
317 */
318 static uint
319 get_result_flags(const struct i915_full_instruction *inst)
320 {
321 const uint writeMask
322 = inst->Dst[0].Register.WriteMask;
323 uint flags = 0x0;
324
325 if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE)
326 flags |= A0_DEST_SATURATE;
327
328 if (writeMask & TGSI_WRITEMASK_X)
329 flags |= A0_DEST_CHANNEL_X;
330 if (writeMask & TGSI_WRITEMASK_Y)
331 flags |= A0_DEST_CHANNEL_Y;
332 if (writeMask & TGSI_WRITEMASK_Z)
333 flags |= A0_DEST_CHANNEL_Z;
334 if (writeMask & TGSI_WRITEMASK_W)
335 flags |= A0_DEST_CHANNEL_W;
336
337 return flags;
338 }
339
340
341 /**
342 * Convert TGSI_TEXTURE_x token to DO_SAMPLE_TYPE_x token
343 */
344 static uint
345 translate_tex_src_target(struct i915_fp_compile *p, uint tex)
346 {
347 switch (tex) {
348 case TGSI_TEXTURE_SHADOW1D:
349 /* fall-through */
350 case TGSI_TEXTURE_1D:
351 return D0_SAMPLE_TYPE_2D;
352
353 case TGSI_TEXTURE_SHADOW2D:
354 /* fall-through */
355 case TGSI_TEXTURE_2D:
356 return D0_SAMPLE_TYPE_2D;
357
358 case TGSI_TEXTURE_SHADOWRECT:
359 /* fall-through */
360 case TGSI_TEXTURE_RECT:
361 return D0_SAMPLE_TYPE_2D;
362
363 case TGSI_TEXTURE_3D:
364 return D0_SAMPLE_TYPE_VOLUME;
365
366 case TGSI_TEXTURE_CUBE:
367 return D0_SAMPLE_TYPE_CUBE;
368
369 default:
370 i915_program_error(p, "TexSrc type");
371 return 0;
372 }
373 }
374
375 /**
376 * Return the number of coords needed to access a given TGSI_TEXTURE_*
377 */
378 static uint
379 texture_num_coords(struct i915_fp_compile *p, uint tex)
380 {
381 switch (tex) {
382 case TGSI_TEXTURE_SHADOW1D:
383 case TGSI_TEXTURE_1D:
384 return 1;
385
386 case TGSI_TEXTURE_SHADOW2D:
387 case TGSI_TEXTURE_2D:
388 case TGSI_TEXTURE_SHADOWRECT:
389 case TGSI_TEXTURE_RECT:
390 return 2;
391
392 case TGSI_TEXTURE_3D:
393 case TGSI_TEXTURE_CUBE:
394 return 3;
395
396 default:
397 i915_program_error(p, "Num coords");
398 return 2;
399 }
400 }
401
402
403 /**
404 * Generate texel lookup instruction.
405 */
406 static void
407 emit_tex(struct i915_fp_compile *p,
408 const struct i915_full_instruction *inst,
409 uint opcode,
410 struct i915_fragment_shader* fs)
411 {
412 uint texture = inst->Texture.Texture;
413 uint unit = inst->Src[1].Register.Index;
414 uint tex = translate_tex_src_target( p, texture );
415 uint sampler = i915_emit_decl(p, REG_TYPE_S, unit, tex);
416 uint coord = src_vector( p, &inst->Src[0], fs);
417
418 i915_emit_texld( p,
419 get_result_vector( p, &inst->Dst[0] ),
420 get_result_flags( inst ),
421 sampler,
422 coord,
423 opcode,
424 texture_num_coords(p, texture) );
425 }
426
427
428 /**
429 * Generate a simple arithmetic instruction
430 * \param opcode the i915 opcode
431 * \param numArgs the number of input/src arguments
432 */
433 static void
434 emit_simple_arith(struct i915_fp_compile *p,
435 const struct i915_full_instruction *inst,
436 uint opcode, uint numArgs,
437 struct i915_fragment_shader* fs)
438 {
439 uint arg1, arg2, arg3;
440
441 assert(numArgs <= 3);
442
443 arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->Src[0], fs );
444 arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->Src[1], fs );
445 arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->Src[2], fs );
446
447 i915_emit_arith( p,
448 opcode,
449 get_result_vector( p, &inst->Dst[0]),
450 get_result_flags( inst ), 0,
451 arg1,
452 arg2,
453 arg3 );
454 }
455
456
457 /** As above, but swap the first two src regs */
458 static void
459 emit_simple_arith_swap2(struct i915_fp_compile *p,
460 const struct i915_full_instruction *inst,
461 uint opcode, uint numArgs,
462 struct i915_fragment_shader* fs)
463 {
464 struct i915_full_instruction inst2;
465
466 assert(numArgs == 2);
467
468 /* transpose first two registers */
469 inst2 = *inst;
470 inst2.Src[0] = inst->Src[1];
471 inst2.Src[1] = inst->Src[0];
472
473 emit_simple_arith(p, &inst2, opcode, numArgs, fs);
474 }
475
476 /*
477 * Translate TGSI instruction to i915 instruction.
478 *
479 * Possible concerns:
480 *
481 * DDX, DDY -- return 0
482 * SIN, COS -- could use another taylor step?
483 * LIT -- results seem a little different to sw mesa
484 * LOG -- different to mesa on negative numbers, but this is conformant.
485 */
486 static void
487 i915_translate_instruction(struct i915_fp_compile *p,
488 const struct i915_full_instruction *inst,
489 struct i915_fragment_shader *fs)
490 {
491 uint writemask;
492 uint src0, src1, src2, flags;
493 uint tmp = 0;
494
495 switch (inst->Instruction.Opcode) {
496 case TGSI_OPCODE_ABS:
497 src0 = src_vector(p, &inst->Src[0], fs);
498 i915_emit_arith(p,
499 A0_MAX,
500 get_result_vector(p, &inst->Dst[0]),
501 get_result_flags(inst), 0,
502 src0, negate(src0, 1, 1, 1, 1), 0);
503 break;
504
505 case TGSI_OPCODE_ADD:
506 emit_simple_arith(p, inst, A0_ADD, 2, fs);
507 break;
508
509 case TGSI_OPCODE_CMP:
510 src0 = src_vector(p, &inst->Src[0], fs);
511 src1 = src_vector(p, &inst->Src[1], fs);
512 src2 = src_vector(p, &inst->Src[2], fs);
513 i915_emit_arith(p, A0_CMP,
514 get_result_vector(p, &inst->Dst[0]),
515 get_result_flags(inst),
516 0, src0, src2, src1); /* NOTE: order of src2, src1 */
517 break;
518
519 case TGSI_OPCODE_COS:
520 src0 = src_vector(p, &inst->Src[0], fs);
521 tmp = i915_get_utemp(p);
522
523 i915_emit_arith(p,
524 A0_MUL,
525 tmp, A0_DEST_CHANNEL_X, 0,
526 src0, i915_emit_const1f(p, 1.0f / (float) (M_PI * 2.0)), 0);
527
528 i915_emit_arith(p, A0_MOD, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
529
530 /*
531 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
532 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
533 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
534 * result = DP4 t0, cos_constants
535 */
536 i915_emit_arith(p,
537 A0_MUL,
538 tmp, A0_DEST_CHANNEL_XY, 0,
539 swizzle(tmp, X, X, ONE, ONE),
540 swizzle(tmp, X, ONE, ONE, ONE), 0);
541
542 i915_emit_arith(p,
543 A0_MUL,
544 tmp, A0_DEST_CHANNEL_XYZ, 0,
545 swizzle(tmp, X, Y, X, ONE),
546 swizzle(tmp, X, X, ONE, ONE), 0);
547
548 i915_emit_arith(p,
549 A0_MUL,
550 tmp, A0_DEST_CHANNEL_XYZ, 0,
551 swizzle(tmp, X, X, Z, ONE),
552 swizzle(tmp, Z, ONE, ONE, ONE), 0);
553
554 i915_emit_arith(p,
555 A0_DP4,
556 get_result_vector(p, &inst->Dst[0]),
557 get_result_flags(inst), 0,
558 swizzle(tmp, ONE, Z, Y, X),
559 i915_emit_const4fv(p, cos_constants), 0);
560 break;
561
562 case TGSI_OPCODE_DDX:
563 case TGSI_OPCODE_DDY:
564 /* XXX We just output 0 here */
565 debug_printf("Punting DDX/DDX\n");
566 src0 = get_result_vector(p, &inst->Dst[0]);
567 i915_emit_arith(p,
568 A0_MOV,
569 get_result_vector(p, &inst->Dst[0]),
570 get_result_flags(inst), 0,
571 swizzle(src0, ZERO, ZERO, ZERO, ZERO), 0, 0);
572 break;
573
574 case TGSI_OPCODE_DP2:
575 src0 = src_vector(p, &inst->Src[0], fs);
576 src1 = src_vector(p, &inst->Src[1], fs);
577
578 i915_emit_arith(p,
579 A0_DP3,
580 get_result_vector(p, &inst->Dst[0]),
581 get_result_flags(inst), 0,
582 swizzle(src0, X, Y, ZERO, ZERO), src1, 0);
583 break;
584
585 case TGSI_OPCODE_DP3:
586 emit_simple_arith(p, inst, A0_DP3, 2, fs);
587 break;
588
589 case TGSI_OPCODE_DP4:
590 emit_simple_arith(p, inst, A0_DP4, 2, fs);
591 break;
592
593 case TGSI_OPCODE_DPH:
594 src0 = src_vector(p, &inst->Src[0], fs);
595 src1 = src_vector(p, &inst->Src[1], fs);
596
597 i915_emit_arith(p,
598 A0_DP4,
599 get_result_vector(p, &inst->Dst[0]),
600 get_result_flags(inst), 0,
601 swizzle(src0, X, Y, Z, ONE), src1, 0);
602 break;
603
604 case TGSI_OPCODE_DST:
605 src0 = src_vector(p, &inst->Src[0], fs);
606 src1 = src_vector(p, &inst->Src[1], fs);
607
608 /* result[0] = 1 * 1;
609 * result[1] = a[1] * b[1];
610 * result[2] = a[2] * 1;
611 * result[3] = 1 * b[3];
612 */
613 i915_emit_arith(p,
614 A0_MUL,
615 get_result_vector(p, &inst->Dst[0]),
616 get_result_flags(inst), 0,
617 swizzle(src0, ONE, Y, Z, ONE),
618 swizzle(src1, ONE, Y, ONE, W), 0);
619 break;
620
621 case TGSI_OPCODE_END:
622 /* no-op */
623 break;
624
625 case TGSI_OPCODE_EX2:
626 src0 = src_vector(p, &inst->Src[0], fs);
627
628 i915_emit_arith(p,
629 A0_EXP,
630 get_result_vector(p, &inst->Dst[0]),
631 get_result_flags(inst), 0,
632 swizzle(src0, X, X, X, X), 0, 0);
633 break;
634
635 case TGSI_OPCODE_FLR:
636 emit_simple_arith(p, inst, A0_FLR, 1, fs);
637 break;
638
639 case TGSI_OPCODE_FRC:
640 emit_simple_arith(p, inst, A0_FRC, 1, fs);
641 break;
642
643 case TGSI_OPCODE_KIL:
644 /* kill if src[0].x < 0 || src[0].y < 0 ... */
645 src0 = src_vector(p, &inst->Src[0], fs);
646 tmp = i915_get_utemp(p);
647
648 i915_emit_texld(p,
649 tmp, /* dest reg: a dummy reg */
650 A0_DEST_CHANNEL_ALL, /* dest writemask */
651 0, /* sampler */
652 src0, /* coord*/
653 T0_TEXKILL, /* opcode */
654 1); /* num_coord */
655 break;
656
657 case TGSI_OPCODE_KILP:
658 assert(0); /* not tested yet */
659 break;
660
661 case TGSI_OPCODE_LG2:
662 src0 = src_vector(p, &inst->Src[0], fs);
663
664 i915_emit_arith(p,
665 A0_LOG,
666 get_result_vector(p, &inst->Dst[0]),
667 get_result_flags(inst), 0,
668 swizzle(src0, X, X, X, X), 0, 0);
669 break;
670
671 case TGSI_OPCODE_LIT:
672 src0 = src_vector(p, &inst->Src[0], fs);
673 tmp = i915_get_utemp(p);
674
675 /* tmp = max( a.xyzw, a.00zw )
676 * XXX: Clamp tmp.w to -128..128
677 * tmp.y = log(tmp.y)
678 * tmp.y = tmp.w * tmp.y
679 * tmp.y = exp(tmp.y)
680 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
681 */
682 i915_emit_arith(p, A0_MAX, tmp, A0_DEST_CHANNEL_ALL, 0,
683 src0, swizzle(src0, ZERO, ZERO, Z, W), 0);
684
685 i915_emit_arith(p, A0_LOG, tmp, A0_DEST_CHANNEL_Y, 0,
686 swizzle(tmp, Y, Y, Y, Y), 0, 0);
687
688 i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_Y, 0,
689 swizzle(tmp, ZERO, Y, ZERO, ZERO),
690 swizzle(tmp, ZERO, W, ZERO, ZERO), 0);
691
692 i915_emit_arith(p, A0_EXP, tmp, A0_DEST_CHANNEL_Y, 0,
693 swizzle(tmp, Y, Y, Y, Y), 0, 0);
694
695 i915_emit_arith(p, A0_CMP,
696 get_result_vector(p, &inst->Dst[0]),
697 get_result_flags(inst), 0,
698 negate(swizzle(tmp, ONE, ONE, X, ONE), 0, 0, 1, 0),
699 swizzle(tmp, ONE, X, ZERO, ONE),
700 swizzle(tmp, ONE, X, Y, ONE));
701
702 break;
703
704 case TGSI_OPCODE_LRP:
705 src0 = src_vector(p, &inst->Src[0], fs);
706 src1 = src_vector(p, &inst->Src[1], fs);
707 src2 = src_vector(p, &inst->Src[2], fs);
708 flags = get_result_flags(inst);
709 tmp = i915_get_utemp(p);
710
711 /* b*a + c*(1-a)
712 *
713 * b*a + c - ca
714 *
715 * tmp = b*a + c,
716 * result = (-c)*a + tmp
717 */
718 i915_emit_arith(p, A0_MAD, tmp,
719 flags & A0_DEST_CHANNEL_ALL, 0, src1, src0, src2);
720
721 i915_emit_arith(p, A0_MAD,
722 get_result_vector(p, &inst->Dst[0]),
723 flags, 0, negate(src2, 1, 1, 1, 1), src0, tmp);
724 break;
725
726 case TGSI_OPCODE_MAD:
727 emit_simple_arith(p, inst, A0_MAD, 3, fs);
728 break;
729
730 case TGSI_OPCODE_MAX:
731 emit_simple_arith(p, inst, A0_MAX, 2, fs);
732 break;
733
734 case TGSI_OPCODE_MIN:
735 src0 = src_vector(p, &inst->Src[0], fs);
736 src1 = src_vector(p, &inst->Src[1], fs);
737 tmp = i915_get_utemp(p);
738 flags = get_result_flags(inst);
739
740 i915_emit_arith(p,
741 A0_MAX,
742 tmp, flags & A0_DEST_CHANNEL_ALL, 0,
743 negate(src0, 1, 1, 1, 1),
744 negate(src1, 1, 1, 1, 1), 0);
745
746 i915_emit_arith(p,
747 A0_MOV,
748 get_result_vector(p, &inst->Dst[0]),
749 flags, 0, negate(tmp, 1, 1, 1, 1), 0, 0);
750 break;
751
752 case TGSI_OPCODE_MOV:
753 emit_simple_arith(p, inst, A0_MOV, 1, fs);
754 break;
755
756 case TGSI_OPCODE_MUL:
757 emit_simple_arith(p, inst, A0_MUL, 2, fs);
758 break;
759
760 case TGSI_OPCODE_NOP:
761 break;
762
763 case TGSI_OPCODE_POW:
764 src0 = src_vector(p, &inst->Src[0], fs);
765 src1 = src_vector(p, &inst->Src[1], fs);
766 tmp = i915_get_utemp(p);
767 flags = get_result_flags(inst);
768
769 /* XXX: masking on intermediate values, here and elsewhere.
770 */
771 i915_emit_arith(p,
772 A0_LOG,
773 tmp, A0_DEST_CHANNEL_X, 0,
774 swizzle(src0, X, X, X, X), 0, 0);
775
776 i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_X, 0, tmp, src1, 0);
777
778 i915_emit_arith(p,
779 A0_EXP,
780 get_result_vector(p, &inst->Dst[0]),
781 flags, 0, swizzle(tmp, X, X, X, X), 0, 0);
782 break;
783
784 case TGSI_OPCODE_RET:
785 /* XXX: no-op? */
786 break;
787
788 case TGSI_OPCODE_RCP:
789 src0 = src_vector(p, &inst->Src[0], fs);
790
791 i915_emit_arith(p,
792 A0_RCP,
793 get_result_vector(p, &inst->Dst[0]),
794 get_result_flags(inst), 0,
795 swizzle(src0, X, X, X, X), 0, 0);
796 break;
797
798 case TGSI_OPCODE_RSQ:
799 src0 = src_vector(p, &inst->Src[0], fs);
800
801 i915_emit_arith(p,
802 A0_RSQ,
803 get_result_vector(p, &inst->Dst[0]),
804 get_result_flags(inst), 0,
805 swizzle(src0, X, X, X, X), 0, 0);
806 break;
807
808 case TGSI_OPCODE_SCS:
809 src0 = src_vector(p, &inst->Src[0], fs);
810 tmp = i915_get_utemp(p);
811
812 /*
813 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
814 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
815 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
816 * scs.x = DP4 t1, scs_sin_constants
817 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
818 * scs.y = DP4 t1, scs_cos_constants
819 */
820 i915_emit_arith(p,
821 A0_MUL,
822 tmp, A0_DEST_CHANNEL_XY, 0,
823 swizzle(src0, X, X, ONE, ONE),
824 swizzle(src0, X, ONE, ONE, ONE), 0);
825
826 i915_emit_arith(p,
827 A0_MUL,
828 tmp, A0_DEST_CHANNEL_ALL, 0,
829 swizzle(tmp, X, Y, X, Y),
830 swizzle(tmp, X, X, ONE, ONE), 0);
831
832 writemask = inst->Dst[0].Register.WriteMask;
833
834 if (writemask & TGSI_WRITEMASK_Y) {
835 uint tmp1;
836
837 if (writemask & TGSI_WRITEMASK_X)
838 tmp1 = i915_get_utemp(p);
839 else
840 tmp1 = tmp;
841
842 i915_emit_arith(p,
843 A0_MUL,
844 tmp1, A0_DEST_CHANNEL_ALL, 0,
845 swizzle(tmp, X, Y, Y, W),
846 swizzle(tmp, X, Z, ONE, ONE), 0);
847
848 i915_emit_arith(p,
849 A0_DP4,
850 get_result_vector(p, &inst->Dst[0]),
851 A0_DEST_CHANNEL_Y, 0,
852 swizzle(tmp1, W, Z, Y, X),
853 i915_emit_const4fv(p, scs_sin_constants), 0);
854 }
855
856 if (writemask & TGSI_WRITEMASK_X) {
857 i915_emit_arith(p,
858 A0_MUL,
859 tmp, A0_DEST_CHANNEL_XYZ, 0,
860 swizzle(tmp, X, X, Z, ONE),
861 swizzle(tmp, Z, ONE, ONE, ONE), 0);
862
863 i915_emit_arith(p,
864 A0_DP4,
865 get_result_vector(p, &inst->Dst[0]),
866 A0_DEST_CHANNEL_X, 0,
867 swizzle(tmp, ONE, Z, Y, X),
868 i915_emit_const4fv(p, scs_cos_constants), 0);
869 }
870 break;
871
872 case TGSI_OPCODE_SEQ:
873 /* if we're both >= and <= then we're == */
874 src0 = src_vector(p, &inst->Src[0], fs);
875 src1 = src_vector(p, &inst->Src[1], fs);
876 tmp = i915_get_utemp(p);
877
878 i915_emit_arith(p,
879 A0_SGE,
880 tmp, A0_DEST_CHANNEL_ALL, 0,
881 src0,
882 src1, 0);
883
884 i915_emit_arith(p,
885 A0_SGE,
886 get_result_vector(p, &inst->Dst[0]),
887 A0_DEST_CHANNEL_ALL, 0,
888 src1,
889 src0, 0);
890
891 i915_emit_arith(p,
892 A0_MUL,
893 get_result_vector(p, &inst->Dst[0]),
894 A0_DEST_CHANNEL_ALL, 0,
895 get_result_vector(p, &inst->Dst[0]),
896 tmp, 0);
897
898 break;
899
900 case TGSI_OPCODE_SGE:
901 emit_simple_arith(p, inst, A0_SGE, 2, fs);
902 break;
903
904 case TGSI_OPCODE_SIN:
905 src0 = src_vector(p, &inst->Src[0], fs);
906 tmp = i915_get_utemp(p);
907
908 i915_emit_arith(p,
909 A0_MUL,
910 tmp, A0_DEST_CHANNEL_X, 0,
911 src0, i915_emit_const1f(p, 1.0f / (float) (M_PI * 2.0)), 0);
912
913 i915_emit_arith(p, A0_MOD, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
914
915 /*
916 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
917 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
918 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
919 * result = DP4 t1.wzyx, sin_constants
920 */
921 i915_emit_arith(p,
922 A0_MUL,
923 tmp, A0_DEST_CHANNEL_XY, 0,
924 swizzle(tmp, X, X, ONE, ONE),
925 swizzle(tmp, X, ONE, ONE, ONE), 0);
926
927 i915_emit_arith(p,
928 A0_MUL,
929 tmp, A0_DEST_CHANNEL_ALL, 0,
930 swizzle(tmp, X, Y, X, Y),
931 swizzle(tmp, X, X, ONE, ONE), 0);
932
933 i915_emit_arith(p,
934 A0_MUL,
935 tmp, A0_DEST_CHANNEL_ALL, 0,
936 swizzle(tmp, X, Y, Y, W),
937 swizzle(tmp, X, Z, ONE, ONE), 0);
938
939 i915_emit_arith(p,
940 A0_DP4,
941 get_result_vector(p, &inst->Dst[0]),
942 get_result_flags(inst), 0,
943 swizzle(tmp, W, Z, Y, X),
944 i915_emit_const4fv(p, sin_constants), 0);
945 break;
946
947 case TGSI_OPCODE_SLE:
948 /* like SGE, but swap reg0, reg1 */
949 emit_simple_arith_swap2(p, inst, A0_SGE, 2, fs);
950 break;
951
952 case TGSI_OPCODE_SLT:
953 emit_simple_arith(p, inst, A0_SLT, 2, fs);
954 break;
955
956 case TGSI_OPCODE_SGT:
957 /* like SLT, but swap reg0, reg1 */
958 emit_simple_arith_swap2(p, inst, A0_SLT, 2, fs);
959 break;
960
961 case TGSI_OPCODE_SNE:
962 /* if we're < or > then we're != */
963 src0 = src_vector(p, &inst->Src[0], fs);
964 src1 = src_vector(p, &inst->Src[1], fs);
965 tmp = i915_get_utemp(p);
966
967 i915_emit_arith(p,
968 A0_SLT,
969 tmp,
970 A0_DEST_CHANNEL_ALL, 0,
971 src0,
972 src1, 0);
973
974 i915_emit_arith(p,
975 A0_SLT,
976 get_result_vector(p, &inst->Dst[0]),
977 A0_DEST_CHANNEL_ALL, 0,
978 src1,
979 src0, 0);
980
981 i915_emit_arith(p,
982 A0_ADD,
983 get_result_vector(p, &inst->Dst[0]),
984 A0_DEST_CHANNEL_ALL, 0,
985 get_result_vector(p, &inst->Dst[0]),
986 tmp, 0);
987 break;
988
989 case TGSI_OPCODE_SSG:
990 /* compute (src>0) - (src<0) */
991 src0 = src_vector(p, &inst->Src[0], fs);
992 tmp = i915_get_utemp(p);
993
994 i915_emit_arith(p,
995 A0_SLT,
996 tmp,
997 A0_DEST_CHANNEL_ALL, 0,
998 src0,
999 swizzle(src0, ZERO, ZERO, ZERO, ZERO), 0);
1000
1001 i915_emit_arith(p,
1002 A0_SLT,
1003 get_result_vector(p, &inst->Dst[0]),
1004 A0_DEST_CHANNEL_ALL, 0,
1005 swizzle(src0, ZERO, ZERO, ZERO, ZERO),
1006 src0, 0);
1007
1008 i915_emit_arith(p,
1009 A0_ADD,
1010 get_result_vector(p, &inst->Dst[0]),
1011 A0_DEST_CHANNEL_ALL, 0,
1012 get_result_vector(p, &inst->Dst[0]),
1013 negate(tmp, 1, 1, 1, 1), 0);
1014 break;
1015
1016 case TGSI_OPCODE_SUB:
1017 src0 = src_vector(p, &inst->Src[0], fs);
1018 src1 = src_vector(p, &inst->Src[1], fs);
1019
1020 i915_emit_arith(p,
1021 A0_ADD,
1022 get_result_vector(p, &inst->Dst[0]),
1023 get_result_flags(inst), 0,
1024 src0, negate(src1, 1, 1, 1, 1), 0);
1025 break;
1026
1027 case TGSI_OPCODE_TEX:
1028 emit_tex(p, inst, T0_TEXLD, fs);
1029 break;
1030
1031 case TGSI_OPCODE_TRUNC:
1032 emit_simple_arith(p, inst, A0_TRC, 1, fs);
1033 break;
1034
1035 case TGSI_OPCODE_TXB:
1036 emit_tex(p, inst, T0_TEXLDB, fs);
1037 break;
1038
1039 case TGSI_OPCODE_TXP:
1040 emit_tex(p, inst, T0_TEXLDP, fs);
1041 break;
1042
1043 case TGSI_OPCODE_XPD:
1044 /* Cross product:
1045 * result.x = src0.y * src1.z - src0.z * src1.y;
1046 * result.y = src0.z * src1.x - src0.x * src1.z;
1047 * result.z = src0.x * src1.y - src0.y * src1.x;
1048 * result.w = undef;
1049 */
1050 src0 = src_vector(p, &inst->Src[0], fs);
1051 src1 = src_vector(p, &inst->Src[1], fs);
1052 tmp = i915_get_utemp(p);
1053
1054 i915_emit_arith(p,
1055 A0_MUL,
1056 tmp, A0_DEST_CHANNEL_ALL, 0,
1057 swizzle(src0, Z, X, Y, ONE),
1058 swizzle(src1, Y, Z, X, ONE), 0);
1059
1060 i915_emit_arith(p,
1061 A0_MAD,
1062 get_result_vector(p, &inst->Dst[0]),
1063 get_result_flags(inst), 0,
1064 swizzle(src0, Y, Z, X, ONE),
1065 swizzle(src1, Z, X, Y, ONE),
1066 negate(tmp, 1, 1, 1, 0));
1067 break;
1068
1069 default:
1070 i915_program_error(p, "bad opcode %d", inst->Instruction.Opcode);
1071 p->error = 1;
1072 return;
1073 }
1074
1075 i915_release_utemps(p);
1076 }
1077
1078
1079 static void i915_translate_token(struct i915_fp_compile *p,
1080 const union i915_full_token* token,
1081 struct i915_fragment_shader *fs)
1082 {
1083 struct i915_fragment_shader *ifs = p->shader;
1084 switch( token->Token.Type ) {
1085 case TGSI_TOKEN_TYPE_PROPERTY:
1086 /*
1087 * We only support one cbuf, but we still need to ignore the property
1088 * correctly so we don't hit the assert at the end of the switch case.
1089 */
1090 assert(token->FullProperty.Property.PropertyName ==
1091 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS);
1092 break;
1093
1094 case TGSI_TOKEN_TYPE_DECLARATION:
1095 if (token->FullDeclaration.Declaration.File
1096 == TGSI_FILE_CONSTANT) {
1097 uint i;
1098 for (i = token->FullDeclaration.Range.First;
1099 i <= token->FullDeclaration.Range.Last;
1100 i++) {
1101 assert(ifs->constant_flags[i] == 0x0);
1102 ifs->constant_flags[i] = I915_CONSTFLAG_USER;
1103 ifs->num_constants = MAX2(ifs->num_constants, i + 1);
1104 }
1105 }
1106 else if (token->FullDeclaration.Declaration.File
1107 == TGSI_FILE_TEMPORARY) {
1108 uint i;
1109 for (i = token->FullDeclaration.Range.First;
1110 i <= token->FullDeclaration.Range.Last;
1111 i++) {
1112 if (i >= I915_MAX_TEMPORARY)
1113 debug_printf("Too many temps (%d)\n",i);
1114 else
1115 /* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
1116 p->temp_flag |= (1 << i); /* mark temp as used */
1117 }
1118 }
1119 break;
1120
1121 case TGSI_TOKEN_TYPE_IMMEDIATE:
1122 {
1123 const struct tgsi_full_immediate *imm
1124 = &token->FullImmediate;
1125 const uint pos = p->num_immediates++;
1126 uint j;
1127 assert( imm->Immediate.NrTokens <= 4 + 1 );
1128 for (j = 0; j < imm->Immediate.NrTokens - 1; j++) {
1129 p->immediates[pos][j] = imm->u[j].Float;
1130 }
1131 }
1132 break;
1133
1134 case TGSI_TOKEN_TYPE_INSTRUCTION:
1135 if (p->first_instruction) {
1136 /* resolve location of immediates */
1137 uint i, j;
1138 for (i = 0; i < p->num_immediates; i++) {
1139 /* find constant slot for this immediate */
1140 for (j = 0; j < I915_MAX_CONSTANT; j++) {
1141 if (ifs->constant_flags[j] == 0x0) {
1142 memcpy(ifs->constants[j],
1143 p->immediates[i],
1144 4 * sizeof(float));
1145 /*printf("immediate %d maps to const %d\n", i, j);*/
1146 ifs->constant_flags[j] = 0xf; /* all four comps used */
1147 p->immediates_map[i] = j;
1148 ifs->num_constants = MAX2(ifs->num_constants, j + 1);
1149 break;
1150 }
1151 }
1152 }
1153
1154 p->first_instruction = FALSE;
1155 }
1156
1157 i915_translate_instruction(p, &token->FullInstruction, fs);
1158 break;
1159
1160 default:
1161 assert( 0 );
1162 }
1163
1164 }
1165
1166 /**
1167 * Translate TGSI fragment shader into i915 hardware instructions.
1168 * \param p the translation state
1169 * \param tokens the TGSI token array
1170 */
1171 static void
1172 i915_translate_instructions(struct i915_fp_compile *p,
1173 const struct i915_token_list *tokens,
1174 struct i915_fragment_shader *fs)
1175 {
1176 int i;
1177 for(i = 0; i<tokens->NumTokens; i++) {
1178 i915_translate_token(p, &tokens->Tokens[i], fs);
1179 }
1180 }
1181
1182
1183 static struct i915_fp_compile *
1184 i915_init_compile(struct i915_context *i915,
1185 struct i915_fragment_shader *ifs)
1186 {
1187 struct i915_fp_compile *p = CALLOC_STRUCT(i915_fp_compile);
1188 int i;
1189
1190 p->shader = ifs;
1191
1192 /* Put new constants at end of const buffer, growing downward.
1193 * The problem is we don't know how many user-defined constants might
1194 * be specified with pipe->set_constant_buffer().
1195 * Should pre-scan the user's program to determine the highest-numbered
1196 * constant referenced.
1197 */
1198 ifs->num_constants = 0;
1199 memset(ifs->constant_flags, 0, sizeof(ifs->constant_flags));
1200
1201 memset(&p->register_phases, 0, sizeof(p->register_phases));
1202
1203 for (i = 0; i < I915_TEX_UNITS; i++)
1204 ifs->generic_mapping[i] = -1;
1205
1206 p->first_instruction = TRUE;
1207
1208 p->nr_tex_indirect = 1; /* correct? */
1209 p->nr_tex_insn = 0;
1210 p->nr_alu_insn = 0;
1211 p->nr_decl_insn = 0;
1212
1213 p->csr = p->program;
1214 p->decl = p->declarations;
1215 p->decl_s = 0;
1216 p->decl_t = 0;
1217 p->temp_flag = ~0x0 << I915_MAX_TEMPORARY;
1218 p->utemp_flag = ~0x7;
1219
1220 /* initialize the first program word */
1221 *(p->decl++) = _3DSTATE_PIXEL_SHADER_PROGRAM;
1222
1223 return p;
1224 }
1225
1226
1227 /* Copy compile results to the fragment program struct and destroy the
1228 * compilation context.
1229 */
1230 static void
1231 i915_fini_compile(struct i915_context *i915, struct i915_fp_compile *p)
1232 {
1233 struct i915_fragment_shader *ifs = p->shader;
1234 unsigned long program_size = (unsigned long) (p->csr - p->program);
1235 unsigned long decl_size = (unsigned long) (p->decl - p->declarations);
1236
1237 if (p->nr_tex_indirect > I915_MAX_TEX_INDIRECT)
1238 debug_printf("Exceeded max nr indirect texture lookups\n");
1239
1240 if (p->nr_tex_insn > I915_MAX_TEX_INSN)
1241 i915_program_error(p, "Exceeded max TEX instructions");
1242
1243 if (p->nr_alu_insn > I915_MAX_ALU_INSN)
1244 i915_program_error(p, "Exceeded max ALU instructions");
1245
1246 if (p->nr_decl_insn > I915_MAX_DECL_INSN)
1247 i915_program_error(p, "Exceeded max DECL instructions");
1248
1249 if (p->error) {
1250 p->NumNativeInstructions = 0;
1251 p->NumNativeAluInstructions = 0;
1252 p->NumNativeTexInstructions = 0;
1253 p->NumNativeTexIndirections = 0;
1254
1255 i915_use_passthrough_shader(ifs);
1256 }
1257 else {
1258 p->NumNativeInstructions
1259 = p->nr_alu_insn + p->nr_tex_insn + p->nr_decl_insn;
1260 p->NumNativeAluInstructions = p->nr_alu_insn;
1261 p->NumNativeTexInstructions = p->nr_tex_insn;
1262 p->NumNativeTexIndirections = p->nr_tex_indirect;
1263
1264 /* patch in the program length */
1265 p->declarations[0] |= program_size + decl_size - 2;
1266
1267 /* Copy compilation results to fragment program struct:
1268 */
1269 assert(!ifs->program);
1270 ifs->program
1271 = (uint *) MALLOC((program_size + decl_size) * sizeof(uint));
1272 if (ifs->program) {
1273 ifs->program_len = program_size + decl_size;
1274
1275 memcpy(ifs->program,
1276 p->declarations,
1277 decl_size * sizeof(uint));
1278
1279 memcpy(ifs->program + decl_size,
1280 p->program,
1281 program_size * sizeof(uint));
1282 }
1283 }
1284
1285 /* Release the compilation struct:
1286 */
1287 FREE(p);
1288 }
1289
1290
1291
1292
1293
1294 /**
1295 * Rather than trying to intercept and jiggle depth writes during
1296 * emit, just move the value into its correct position at the end of
1297 * the program:
1298 */
1299 static void
1300 i915_fixup_depth_write(struct i915_fp_compile *p)
1301 {
1302 /* XXX assuming pos/depth is always in output[0] */
1303 if (p->shader->info.output_semantic_name[0] == TGSI_SEMANTIC_POSITION) {
1304 const uint depth = UREG(REG_TYPE_OD, 0);
1305
1306 i915_emit_arith(p,
1307 A0_MOV, /* opcode */
1308 depth, /* dest reg */
1309 A0_DEST_CHANNEL_W, /* write mask */
1310 0, /* saturate? */
1311 swizzle(depth, X, Y, Z, Z), /* src0 */
1312 0, 0 /* src1, src2 */);
1313 }
1314 }
1315
1316
1317 void
1318 i915_translate_fragment_program( struct i915_context *i915,
1319 struct i915_fragment_shader *fs)
1320 {
1321 struct i915_fp_compile *p;
1322 const struct tgsi_token *tokens = fs->state.tokens;
1323 struct i915_token_list* i_tokens;
1324
1325 #if 0
1326 tgsi_dump(tokens, 0);
1327 #endif
1328
1329 /* hw doesn't seem to like empty frag programs, even when the depth write
1330 * fixup gets emitted below - may that one is fishy, too? */
1331 if (fs->info.num_instructions == 1) {
1332 i915_use_passthrough_shader(fs);
1333
1334 return;
1335 }
1336
1337 p = i915_init_compile(i915, fs);
1338
1339 i_tokens = i915_optimize(tokens);
1340 i915_translate_instructions(p, i_tokens, fs);
1341 i915_fixup_depth_write(p);
1342
1343 i915_fini_compile(i915, p);
1344 i915_optimize_free(i_tokens);
1345
1346 #if 0
1347 i915_disassemble_program(NULL, fs->program, fs->program_len);
1348 #endif
1349 }