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[mesa.git] / src / gallium / drivers / i915 / i915_fpc_translate.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include <stdarg.h>
30
31 #include "i915_reg.h"
32 #include "i915_context.h"
33 #include "i915_fpc.h"
34
35 #include "pipe/p_shader_tokens.h"
36 #include "util/u_math.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_parse.h"
40 #include "tgsi/tgsi_dump.h"
41
42 #include "draw/draw_vertex.h"
43
44 #ifndef M_PI
45 #define M_PI 3.14159265358979323846
46 #endif
47
48 /**
49 * Simple pass-through fragment shader to use when we don't have
50 * a real shader (or it fails to compile for some reason).
51 */
52 static unsigned passthrough[] =
53 {
54 _3DSTATE_PIXEL_SHADER_PROGRAM | ((2*3)-1),
55
56 /* declare input color:
57 */
58 (D0_DCL |
59 (REG_TYPE_T << D0_TYPE_SHIFT) |
60 (T_DIFFUSE << D0_NR_SHIFT) |
61 D0_CHANNEL_ALL),
62 0,
63 0,
64
65 /* move to output color:
66 */
67 (A0_MOV |
68 (REG_TYPE_OC << A0_DEST_TYPE_SHIFT) |
69 A0_DEST_CHANNEL_ALL |
70 (REG_TYPE_T << A0_SRC0_TYPE_SHIFT) |
71 (T_DIFFUSE << A0_SRC0_NR_SHIFT)),
72 0x01230000, /* .xyzw */
73 0
74 };
75
76
77 /* 1, -1/3!, 1/5!, -1/7! */
78 static const float scs_sin_constants[4] = { 1.0,
79 -1.0f / (3 * 2 * 1),
80 1.0f / (5 * 4 * 3 * 2 * 1),
81 -1.0f / (7 * 6 * 5 * 4 * 3 * 2 * 1)
82 };
83
84 /* 1, -1/2!, 1/4!, -1/6! */
85 static const float scs_cos_constants[4] = { 1.0,
86 -1.0f / (2 * 1),
87 1.0f / (4 * 3 * 2 * 1),
88 -1.0f / (6 * 5 * 4 * 3 * 2 * 1)
89 };
90
91 /* 2*pi, -(2*pi)^3/3!, (2*pi)^5/5!, -(2*pi)^7/7! */
92 static const float sin_constants[4] = { 2.0 * M_PI,
93 -8.0f * M_PI * M_PI * M_PI / (3 * 2 * 1),
94 32.0f * M_PI * M_PI * M_PI * M_PI * M_PI / (5 * 4 * 3 * 2 * 1),
95 -128.0f * M_PI * M_PI * M_PI * M_PI * M_PI * M_PI * M_PI / (7 * 6 * 5 * 4 * 3 * 2 * 1)
96 };
97
98 /* 1, -(2*pi)^2/2!, (2*pi)^4/4!, -(2*pi)^6/6! */
99 static const float cos_constants[4] = { 1.0,
100 -4.0f * M_PI * M_PI / (2 * 1),
101 16.0f * M_PI * M_PI * M_PI * M_PI / (4 * 3 * 2 * 1),
102 -64.0f * M_PI * M_PI * M_PI * M_PI * M_PI * M_PI / (6 * 5 * 4 * 3 * 2 * 1)
103 };
104
105
106
107 /**
108 * component-wise negation of ureg
109 */
110 static INLINE int
111 negate(int reg, int x, int y, int z, int w)
112 {
113 /* Another neat thing about the UREG representation */
114 return reg ^ (((x & 1) << UREG_CHANNEL_X_NEGATE_SHIFT) |
115 ((y & 1) << UREG_CHANNEL_Y_NEGATE_SHIFT) |
116 ((z & 1) << UREG_CHANNEL_Z_NEGATE_SHIFT) |
117 ((w & 1) << UREG_CHANNEL_W_NEGATE_SHIFT));
118 }
119
120
121 /**
122 * In the event of a translation failure, we'll generate a simple color
123 * pass-through program.
124 */
125 static void
126 i915_use_passthrough_shader(struct i915_fragment_shader *fs)
127 {
128 fs->program = (uint *) MALLOC(sizeof(passthrough));
129 if (fs->program) {
130 memcpy(fs->program, passthrough, sizeof(passthrough));
131 fs->program_len = Elements(passthrough);
132 }
133 fs->num_constants = 0;
134 }
135
136
137 void
138 i915_program_error(struct i915_fp_compile *p, const char *msg, ...)
139 {
140 va_list args;
141 char buffer[1024];
142
143 debug_printf("i915_program_error: ");
144 va_start( args, msg );
145 util_vsnprintf( buffer, sizeof(buffer), msg, args );
146 va_end( args );
147 debug_printf("%s", buffer);
148 debug_printf("\n");
149
150 p->error = 1;
151 }
152
153 static uint get_mapping(struct i915_fragment_shader* fs, int unit)
154 {
155 int i;
156 for (i = 0; i < I915_TEX_UNITS; i++)
157 {
158 if (fs->generic_mapping[i] == -1) {
159 fs->generic_mapping[i] = unit;
160 return i;
161 }
162 if (fs->generic_mapping[i] == unit)
163 return i;
164 }
165 debug_printf("Exceeded max generics\n");
166 return 0;
167 }
168
169 /**
170 * Construct a ureg for the given source register. Will emit
171 * constants, apply swizzling and negation as needed.
172 */
173 static uint
174 src_vector(struct i915_fp_compile *p,
175 const struct i915_full_src_register *source,
176 struct i915_fragment_shader* fs)
177 {
178 uint index = source->Register.Index;
179 uint src = 0, sem_name, sem_ind;
180
181 switch (source->Register.File) {
182 case TGSI_FILE_TEMPORARY:
183 if (source->Register.Index >= I915_MAX_TEMPORARY) {
184 i915_program_error(p, "Exceeded max temporary reg");
185 return 0;
186 }
187 src = UREG(REG_TYPE_R, index);
188 break;
189 case TGSI_FILE_INPUT:
190 /* XXX: Packing COL1, FOGC into a single attribute works for
191 * texenv programs, but will fail for real fragment programs
192 * that use these attributes and expect them to be a full 4
193 * components wide. Could use a texcoord to pass these
194 * attributes if necessary, but that won't work in the general
195 * case.
196 *
197 * We also use a texture coordinate to pass wpos when possible.
198 */
199
200 sem_name = p->shader->info.input_semantic_name[index];
201 sem_ind = p->shader->info.input_semantic_index[index];
202
203 switch (sem_name) {
204 case TGSI_SEMANTIC_POSITION:
205 {
206 /* for fragcoord */
207 int real_tex_unit = get_mapping(fs, I915_SEMANTIC_POS);
208 src = i915_emit_decl(p, REG_TYPE_T, T_TEX0 + real_tex_unit, D0_CHANNEL_ALL);
209 break;
210 }
211 case TGSI_SEMANTIC_COLOR:
212 if (sem_ind == 0) {
213 src = i915_emit_decl(p, REG_TYPE_T, T_DIFFUSE, D0_CHANNEL_ALL);
214 }
215 else {
216 /* secondary color */
217 assert(sem_ind == 1);
218 src = i915_emit_decl(p, REG_TYPE_T, T_SPECULAR, D0_CHANNEL_XYZ);
219 src = swizzle(src, X, Y, Z, ONE);
220 }
221 break;
222 case TGSI_SEMANTIC_FOG:
223 src = i915_emit_decl(p, REG_TYPE_T, T_FOG_W, D0_CHANNEL_W);
224 src = swizzle(src, W, W, W, W);
225 break;
226 case TGSI_SEMANTIC_GENERIC:
227 {
228 int real_tex_unit = get_mapping(fs, sem_ind);
229 src = i915_emit_decl(p, REG_TYPE_T, T_TEX0 + real_tex_unit, D0_CHANNEL_ALL);
230 break;
231 }
232 case TGSI_SEMANTIC_FACE:
233 {
234 /* for back/front faces */
235 int real_tex_unit = get_mapping(fs, I915_SEMANTIC_FACE);
236 src = i915_emit_decl(p, REG_TYPE_T, T_TEX0 + real_tex_unit, D0_CHANNEL_X);
237 break;
238 }
239 default:
240 i915_program_error(p, "Bad source->Index");
241 return 0;
242 }
243 break;
244
245 case TGSI_FILE_IMMEDIATE:
246 assert(index < p->num_immediates);
247 index = p->immediates_map[index];
248 /* fall-through */
249 case TGSI_FILE_CONSTANT:
250 src = UREG(REG_TYPE_CONST, index);
251 break;
252
253 default:
254 i915_program_error(p, "Bad source->File");
255 return 0;
256 }
257
258 src = swizzle(src,
259 source->Register.SwizzleX,
260 source->Register.SwizzleY,
261 source->Register.SwizzleZ,
262 source->Register.SwizzleW);
263
264 /* There's both negate-all-components and per-component negation.
265 * Try to handle both here.
266 */
267 {
268 int n = source->Register.Negate;
269 src = negate(src, n, n, n, n);
270 }
271
272 /* no abs() */
273 #if 0
274 /* XXX assertions disabled to allow arbfplight.c to run */
275 /* XXX enable these assertions, or fix things */
276 assert(!source->Register.Absolute);
277 #endif
278 if (source->Register.Absolute)
279 debug_printf("Unhandled absolute value\n");
280
281 return src;
282 }
283
284
285 /**
286 * Construct a ureg for a destination register.
287 */
288 static uint
289 get_result_vector(struct i915_fp_compile *p,
290 const struct i915_full_dst_register *dest)
291 {
292 switch (dest->Register.File) {
293 case TGSI_FILE_OUTPUT:
294 {
295 uint sem_name = p->shader->info.output_semantic_name[dest->Register.Index];
296 switch (sem_name) {
297 case TGSI_SEMANTIC_POSITION:
298 return UREG(REG_TYPE_OD, 0);
299 case TGSI_SEMANTIC_COLOR:
300 return UREG(REG_TYPE_OC, 0);
301 default:
302 i915_program_error(p, "Bad inst->DstReg.Index/semantics");
303 return 0;
304 }
305 }
306 case TGSI_FILE_TEMPORARY:
307 return UREG(REG_TYPE_R, dest->Register.Index);
308 default:
309 i915_program_error(p, "Bad inst->DstReg.File");
310 return 0;
311 }
312 }
313
314
315 /**
316 * Compute flags for saturation and writemask.
317 */
318 static uint
319 get_result_flags(const struct i915_full_instruction *inst)
320 {
321 const uint writeMask
322 = inst->Dst[0].Register.WriteMask;
323 uint flags = 0x0;
324
325 if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE)
326 flags |= A0_DEST_SATURATE;
327
328 if (writeMask & TGSI_WRITEMASK_X)
329 flags |= A0_DEST_CHANNEL_X;
330 if (writeMask & TGSI_WRITEMASK_Y)
331 flags |= A0_DEST_CHANNEL_Y;
332 if (writeMask & TGSI_WRITEMASK_Z)
333 flags |= A0_DEST_CHANNEL_Z;
334 if (writeMask & TGSI_WRITEMASK_W)
335 flags |= A0_DEST_CHANNEL_W;
336
337 return flags;
338 }
339
340
341 /**
342 * Convert TGSI_TEXTURE_x token to DO_SAMPLE_TYPE_x token
343 */
344 static uint
345 translate_tex_src_target(struct i915_fp_compile *p, uint tex)
346 {
347 switch (tex) {
348 case TGSI_TEXTURE_SHADOW1D:
349 /* fall-through */
350 case TGSI_TEXTURE_1D:
351 return D0_SAMPLE_TYPE_2D;
352
353 case TGSI_TEXTURE_SHADOW2D:
354 /* fall-through */
355 case TGSI_TEXTURE_2D:
356 return D0_SAMPLE_TYPE_2D;
357
358 case TGSI_TEXTURE_SHADOWRECT:
359 /* fall-through */
360 case TGSI_TEXTURE_RECT:
361 return D0_SAMPLE_TYPE_2D;
362
363 case TGSI_TEXTURE_3D:
364 return D0_SAMPLE_TYPE_VOLUME;
365
366 case TGSI_TEXTURE_CUBE:
367 return D0_SAMPLE_TYPE_CUBE;
368
369 default:
370 i915_program_error(p, "TexSrc type");
371 return 0;
372 }
373 }
374
375 /**
376 * Return the number of coords needed to access a given TGSI_TEXTURE_*
377 */
378 static uint
379 texture_num_coords(struct i915_fp_compile *p, uint tex)
380 {
381 switch (tex) {
382 case TGSI_TEXTURE_SHADOW1D:
383 case TGSI_TEXTURE_1D:
384 return 1;
385
386 case TGSI_TEXTURE_SHADOW2D:
387 case TGSI_TEXTURE_2D:
388 case TGSI_TEXTURE_SHADOWRECT:
389 case TGSI_TEXTURE_RECT:
390 return 2;
391
392 case TGSI_TEXTURE_3D:
393 case TGSI_TEXTURE_CUBE:
394 return 3;
395
396 default:
397 i915_program_error(p, "Num coords");
398 return 2;
399 }
400 }
401
402
403 /**
404 * Generate texel lookup instruction.
405 */
406 static void
407 emit_tex(struct i915_fp_compile *p,
408 const struct i915_full_instruction *inst,
409 uint opcode,
410 struct i915_fragment_shader* fs)
411 {
412 uint texture = inst->Texture.Texture;
413 uint unit = inst->Src[1].Register.Index;
414 uint tex = translate_tex_src_target( p, texture );
415 uint sampler = i915_emit_decl(p, REG_TYPE_S, unit, tex);
416 uint coord = src_vector( p, &inst->Src[0], fs);
417
418 i915_emit_texld( p,
419 get_result_vector( p, &inst->Dst[0] ),
420 get_result_flags( inst ),
421 sampler,
422 coord,
423 opcode,
424 texture_num_coords(p, texture) );
425 }
426
427
428 /**
429 * Generate a simple arithmetic instruction
430 * \param opcode the i915 opcode
431 * \param numArgs the number of input/src arguments
432 */
433 static void
434 emit_simple_arith(struct i915_fp_compile *p,
435 const struct i915_full_instruction *inst,
436 uint opcode, uint numArgs,
437 struct i915_fragment_shader* fs)
438 {
439 uint arg1, arg2, arg3;
440
441 assert(numArgs <= 3);
442
443 arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->Src[0], fs );
444 arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->Src[1], fs );
445 arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->Src[2], fs );
446
447 i915_emit_arith( p,
448 opcode,
449 get_result_vector( p, &inst->Dst[0]),
450 get_result_flags( inst ), 0,
451 arg1,
452 arg2,
453 arg3 );
454 }
455
456
457 /** As above, but swap the first two src regs */
458 static void
459 emit_simple_arith_swap2(struct i915_fp_compile *p,
460 const struct i915_full_instruction *inst,
461 uint opcode, uint numArgs,
462 struct i915_fragment_shader* fs)
463 {
464 struct i915_full_instruction inst2;
465
466 assert(numArgs == 2);
467
468 /* transpose first two registers */
469 inst2 = *inst;
470 inst2.Src[0] = inst->Src[1];
471 inst2.Src[1] = inst->Src[0];
472
473 emit_simple_arith(p, &inst2, opcode, numArgs, fs);
474 }
475
476 /*
477 * Translate TGSI instruction to i915 instruction.
478 *
479 * Possible concerns:
480 *
481 * DDX, DDY -- return 0
482 * SIN, COS -- could use another taylor step?
483 * LIT -- results seem a little different to sw mesa
484 * LOG -- different to mesa on negative numbers, but this is conformant.
485 */
486 static void
487 i915_translate_instruction(struct i915_fp_compile *p,
488 const struct i915_full_instruction *inst,
489 struct i915_fragment_shader *fs)
490 {
491 uint writemask;
492 uint src0, src1, src2, flags;
493 uint tmp = 0;
494
495 switch (inst->Instruction.Opcode) {
496 case TGSI_OPCODE_ABS:
497 src0 = src_vector(p, &inst->Src[0], fs);
498 i915_emit_arith(p,
499 A0_MAX,
500 get_result_vector(p, &inst->Dst[0]),
501 get_result_flags(inst), 0,
502 src0, negate(src0, 1, 1, 1, 1), 0);
503 break;
504
505 case TGSI_OPCODE_ADD:
506 emit_simple_arith(p, inst, A0_ADD, 2, fs);
507 break;
508
509 case TGSI_OPCODE_CMP:
510 src0 = src_vector(p, &inst->Src[0], fs);
511 src1 = src_vector(p, &inst->Src[1], fs);
512 src2 = src_vector(p, &inst->Src[2], fs);
513 i915_emit_arith(p, A0_CMP,
514 get_result_vector(p, &inst->Dst[0]),
515 get_result_flags(inst),
516 0, src0, src2, src1); /* NOTE: order of src2, src1 */
517 break;
518
519 case TGSI_OPCODE_COS:
520 src0 = src_vector(p, &inst->Src[0], fs);
521 tmp = i915_get_utemp(p);
522
523 i915_emit_arith(p,
524 A0_MUL,
525 tmp, A0_DEST_CHANNEL_X, 0,
526 src0, i915_emit_const1f(p, 1.0f / (float) (M_PI * 2.0)), 0);
527
528 i915_emit_arith(p, A0_MOD, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
529
530 /*
531 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
532 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
533 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
534 * result = DP4 t0, cos_constants
535 */
536 i915_emit_arith(p,
537 A0_MUL,
538 tmp, A0_DEST_CHANNEL_XY, 0,
539 swizzle(tmp, X, X, ONE, ONE),
540 swizzle(tmp, X, ONE, ONE, ONE), 0);
541
542 i915_emit_arith(p,
543 A0_MUL,
544 tmp, A0_DEST_CHANNEL_XYZ, 0,
545 swizzle(tmp, X, Y, X, ONE),
546 swizzle(tmp, X, X, ONE, ONE), 0);
547
548 i915_emit_arith(p,
549 A0_MUL,
550 tmp, A0_DEST_CHANNEL_XYZ, 0,
551 swizzle(tmp, X, X, Z, ONE),
552 swizzle(tmp, Z, ONE, ONE, ONE), 0);
553
554 i915_emit_arith(p,
555 A0_DP4,
556 get_result_vector(p, &inst->Dst[0]),
557 get_result_flags(inst), 0,
558 swizzle(tmp, ONE, Z, Y, X),
559 i915_emit_const4fv(p, cos_constants), 0);
560 break;
561
562 case TGSI_OPCODE_DDX:
563 case TGSI_OPCODE_DDY:
564 /* XXX We just output 0 here */
565 debug_printf("Punting DDX/DDX\n");
566 src0 = get_result_vector(p, &inst->Dst[0]);
567 i915_emit_arith(p,
568 A0_MOV,
569 get_result_vector(p, &inst->Dst[0]),
570 get_result_flags(inst), 0,
571 swizzle(src0, ZERO, ZERO, ZERO, ZERO), 0, 0);
572 break;
573
574 case TGSI_OPCODE_DP2:
575 src0 = src_vector(p, &inst->Src[0], fs);
576 src1 = src_vector(p, &inst->Src[1], fs);
577
578 i915_emit_arith(p,
579 A0_DP3,
580 get_result_vector(p, &inst->Dst[0]),
581 get_result_flags(inst), 0,
582 swizzle(src0, X, Y, ZERO, ZERO), src1, 0);
583 break;
584
585 case TGSI_OPCODE_DP3:
586 emit_simple_arith(p, inst, A0_DP3, 2, fs);
587 break;
588
589 case TGSI_OPCODE_DP4:
590 emit_simple_arith(p, inst, A0_DP4, 2, fs);
591 break;
592
593 case TGSI_OPCODE_DPH:
594 src0 = src_vector(p, &inst->Src[0], fs);
595 src1 = src_vector(p, &inst->Src[1], fs);
596
597 i915_emit_arith(p,
598 A0_DP4,
599 get_result_vector(p, &inst->Dst[0]),
600 get_result_flags(inst), 0,
601 swizzle(src0, X, Y, Z, ONE), src1, 0);
602 break;
603
604 case TGSI_OPCODE_DST:
605 src0 = src_vector(p, &inst->Src[0], fs);
606 src1 = src_vector(p, &inst->Src[1], fs);
607
608 /* result[0] = 1 * 1;
609 * result[1] = a[1] * b[1];
610 * result[2] = a[2] * 1;
611 * result[3] = 1 * b[3];
612 */
613 i915_emit_arith(p,
614 A0_MUL,
615 get_result_vector(p, &inst->Dst[0]),
616 get_result_flags(inst), 0,
617 swizzle(src0, ONE, Y, Z, ONE),
618 swizzle(src1, ONE, Y, ONE, W), 0);
619 break;
620
621 case TGSI_OPCODE_END:
622 /* no-op */
623 break;
624
625 case TGSI_OPCODE_EX2:
626 src0 = src_vector(p, &inst->Src[0], fs);
627
628 i915_emit_arith(p,
629 A0_EXP,
630 get_result_vector(p, &inst->Dst[0]),
631 get_result_flags(inst), 0,
632 swizzle(src0, X, X, X, X), 0, 0);
633 break;
634
635 case TGSI_OPCODE_FLR:
636 emit_simple_arith(p, inst, A0_FLR, 1, fs);
637 break;
638
639 case TGSI_OPCODE_FRC:
640 emit_simple_arith(p, inst, A0_FRC, 1, fs);
641 break;
642
643 case TGSI_OPCODE_KIL:
644 /* kill if src[0].x < 0 || src[0].y < 0 ... */
645 src0 = src_vector(p, &inst->Src[0], fs);
646 tmp = i915_get_utemp(p);
647
648 i915_emit_texld(p,
649 tmp, /* dest reg: a dummy reg */
650 A0_DEST_CHANNEL_ALL, /* dest writemask */
651 0, /* sampler */
652 src0, /* coord*/
653 T0_TEXKILL, /* opcode */
654 1); /* num_coord */
655 break;
656
657 case TGSI_OPCODE_KILP:
658 /* We emit an unconditional kill; we may want to revisit
659 * if we ever implement conditionals.
660 */
661 i915_emit_texld(p,
662 tmp, /* dest reg: a dummy reg */
663 A0_DEST_CHANNEL_ALL, /* dest writemask */
664 0, /* sampler */
665 negate(swizzle(0, ONE, ONE, ONE, ONE), 1, 1, 1, 1), /* coord */
666 T0_TEXKILL, /* opcode */
667 1); /* num_coord */
668 break;
669
670 case TGSI_OPCODE_LG2:
671 src0 = src_vector(p, &inst->Src[0], fs);
672
673 i915_emit_arith(p,
674 A0_LOG,
675 get_result_vector(p, &inst->Dst[0]),
676 get_result_flags(inst), 0,
677 swizzle(src0, X, X, X, X), 0, 0);
678 break;
679
680 case TGSI_OPCODE_LIT:
681 src0 = src_vector(p, &inst->Src[0], fs);
682 tmp = i915_get_utemp(p);
683
684 /* tmp = max( a.xyzw, a.00zw )
685 * XXX: Clamp tmp.w to -128..128
686 * tmp.y = log(tmp.y)
687 * tmp.y = tmp.w * tmp.y
688 * tmp.y = exp(tmp.y)
689 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
690 */
691 i915_emit_arith(p, A0_MAX, tmp, A0_DEST_CHANNEL_ALL, 0,
692 src0, swizzle(src0, ZERO, ZERO, Z, W), 0);
693
694 i915_emit_arith(p, A0_LOG, tmp, A0_DEST_CHANNEL_Y, 0,
695 swizzle(tmp, Y, Y, Y, Y), 0, 0);
696
697 i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_Y, 0,
698 swizzle(tmp, ZERO, Y, ZERO, ZERO),
699 swizzle(tmp, ZERO, W, ZERO, ZERO), 0);
700
701 i915_emit_arith(p, A0_EXP, tmp, A0_DEST_CHANNEL_Y, 0,
702 swizzle(tmp, Y, Y, Y, Y), 0, 0);
703
704 i915_emit_arith(p, A0_CMP,
705 get_result_vector(p, &inst->Dst[0]),
706 get_result_flags(inst), 0,
707 negate(swizzle(tmp, ONE, ONE, X, ONE), 0, 0, 1, 0),
708 swizzle(tmp, ONE, X, ZERO, ONE),
709 swizzle(tmp, ONE, X, Y, ONE));
710
711 break;
712
713 case TGSI_OPCODE_LRP:
714 src0 = src_vector(p, &inst->Src[0], fs);
715 src1 = src_vector(p, &inst->Src[1], fs);
716 src2 = src_vector(p, &inst->Src[2], fs);
717 flags = get_result_flags(inst);
718 tmp = i915_get_utemp(p);
719
720 /* b*a + c*(1-a)
721 *
722 * b*a + c - ca
723 *
724 * tmp = b*a + c,
725 * result = (-c)*a + tmp
726 */
727 i915_emit_arith(p, A0_MAD, tmp,
728 flags & A0_DEST_CHANNEL_ALL, 0, src1, src0, src2);
729
730 i915_emit_arith(p, A0_MAD,
731 get_result_vector(p, &inst->Dst[0]),
732 flags, 0, negate(src2, 1, 1, 1, 1), src0, tmp);
733 break;
734
735 case TGSI_OPCODE_MAD:
736 emit_simple_arith(p, inst, A0_MAD, 3, fs);
737 break;
738
739 case TGSI_OPCODE_MAX:
740 emit_simple_arith(p, inst, A0_MAX, 2, fs);
741 break;
742
743 case TGSI_OPCODE_MIN:
744 src0 = src_vector(p, &inst->Src[0], fs);
745 src1 = src_vector(p, &inst->Src[1], fs);
746 tmp = i915_get_utemp(p);
747 flags = get_result_flags(inst);
748
749 i915_emit_arith(p,
750 A0_MAX,
751 tmp, flags & A0_DEST_CHANNEL_ALL, 0,
752 negate(src0, 1, 1, 1, 1),
753 negate(src1, 1, 1, 1, 1), 0);
754
755 i915_emit_arith(p,
756 A0_MOV,
757 get_result_vector(p, &inst->Dst[0]),
758 flags, 0, negate(tmp, 1, 1, 1, 1), 0, 0);
759 break;
760
761 case TGSI_OPCODE_MOV:
762 emit_simple_arith(p, inst, A0_MOV, 1, fs);
763 break;
764
765 case TGSI_OPCODE_MUL:
766 emit_simple_arith(p, inst, A0_MUL, 2, fs);
767 break;
768
769 case TGSI_OPCODE_NOP:
770 break;
771
772 case TGSI_OPCODE_POW:
773 src0 = src_vector(p, &inst->Src[0], fs);
774 src1 = src_vector(p, &inst->Src[1], fs);
775 tmp = i915_get_utemp(p);
776 flags = get_result_flags(inst);
777
778 /* XXX: masking on intermediate values, here and elsewhere.
779 */
780 i915_emit_arith(p,
781 A0_LOG,
782 tmp, A0_DEST_CHANNEL_X, 0,
783 swizzle(src0, X, X, X, X), 0, 0);
784
785 i915_emit_arith(p, A0_MUL, tmp, A0_DEST_CHANNEL_X, 0, tmp, src1, 0);
786
787 i915_emit_arith(p,
788 A0_EXP,
789 get_result_vector(p, &inst->Dst[0]),
790 flags, 0, swizzle(tmp, X, X, X, X), 0, 0);
791 break;
792
793 case TGSI_OPCODE_RET:
794 /* XXX: no-op? */
795 break;
796
797 case TGSI_OPCODE_RCP:
798 src0 = src_vector(p, &inst->Src[0], fs);
799
800 i915_emit_arith(p,
801 A0_RCP,
802 get_result_vector(p, &inst->Dst[0]),
803 get_result_flags(inst), 0,
804 swizzle(src0, X, X, X, X), 0, 0);
805 break;
806
807 case TGSI_OPCODE_RSQ:
808 src0 = src_vector(p, &inst->Src[0], fs);
809
810 i915_emit_arith(p,
811 A0_RSQ,
812 get_result_vector(p, &inst->Dst[0]),
813 get_result_flags(inst), 0,
814 swizzle(src0, X, X, X, X), 0, 0);
815 break;
816
817 case TGSI_OPCODE_SCS:
818 src0 = src_vector(p, &inst->Src[0], fs);
819 tmp = i915_get_utemp(p);
820
821 /*
822 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
823 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
824 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
825 * scs.x = DP4 t1, scs_sin_constants
826 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
827 * scs.y = DP4 t1, scs_cos_constants
828 */
829 i915_emit_arith(p,
830 A0_MUL,
831 tmp, A0_DEST_CHANNEL_XY, 0,
832 swizzle(src0, X, X, ONE, ONE),
833 swizzle(src0, X, ONE, ONE, ONE), 0);
834
835 i915_emit_arith(p,
836 A0_MUL,
837 tmp, A0_DEST_CHANNEL_ALL, 0,
838 swizzle(tmp, X, Y, X, Y),
839 swizzle(tmp, X, X, ONE, ONE), 0);
840
841 writemask = inst->Dst[0].Register.WriteMask;
842
843 if (writemask & TGSI_WRITEMASK_Y) {
844 uint tmp1;
845
846 if (writemask & TGSI_WRITEMASK_X)
847 tmp1 = i915_get_utemp(p);
848 else
849 tmp1 = tmp;
850
851 i915_emit_arith(p,
852 A0_MUL,
853 tmp1, A0_DEST_CHANNEL_ALL, 0,
854 swizzle(tmp, X, Y, Y, W),
855 swizzle(tmp, X, Z, ONE, ONE), 0);
856
857 i915_emit_arith(p,
858 A0_DP4,
859 get_result_vector(p, &inst->Dst[0]),
860 A0_DEST_CHANNEL_Y, 0,
861 swizzle(tmp1, W, Z, Y, X),
862 i915_emit_const4fv(p, scs_sin_constants), 0);
863 }
864
865 if (writemask & TGSI_WRITEMASK_X) {
866 i915_emit_arith(p,
867 A0_MUL,
868 tmp, A0_DEST_CHANNEL_XYZ, 0,
869 swizzle(tmp, X, X, Z, ONE),
870 swizzle(tmp, Z, ONE, ONE, ONE), 0);
871
872 i915_emit_arith(p,
873 A0_DP4,
874 get_result_vector(p, &inst->Dst[0]),
875 A0_DEST_CHANNEL_X, 0,
876 swizzle(tmp, ONE, Z, Y, X),
877 i915_emit_const4fv(p, scs_cos_constants), 0);
878 }
879 break;
880
881 case TGSI_OPCODE_SEQ:
882 /* if we're both >= and <= then we're == */
883 src0 = src_vector(p, &inst->Src[0], fs);
884 src1 = src_vector(p, &inst->Src[1], fs);
885 tmp = i915_get_utemp(p);
886
887 i915_emit_arith(p,
888 A0_SGE,
889 tmp, A0_DEST_CHANNEL_ALL, 0,
890 src0,
891 src1, 0);
892
893 i915_emit_arith(p,
894 A0_SGE,
895 get_result_vector(p, &inst->Dst[0]),
896 A0_DEST_CHANNEL_ALL, 0,
897 src1,
898 src0, 0);
899
900 i915_emit_arith(p,
901 A0_MUL,
902 get_result_vector(p, &inst->Dst[0]),
903 A0_DEST_CHANNEL_ALL, 0,
904 get_result_vector(p, &inst->Dst[0]),
905 tmp, 0);
906
907 break;
908
909 case TGSI_OPCODE_SGE:
910 emit_simple_arith(p, inst, A0_SGE, 2, fs);
911 break;
912
913 case TGSI_OPCODE_SIN:
914 src0 = src_vector(p, &inst->Src[0], fs);
915 tmp = i915_get_utemp(p);
916
917 i915_emit_arith(p,
918 A0_MUL,
919 tmp, A0_DEST_CHANNEL_X, 0,
920 src0, i915_emit_const1f(p, 1.0f / (float) (M_PI * 2.0)), 0);
921
922 i915_emit_arith(p, A0_MOD, tmp, A0_DEST_CHANNEL_X, 0, tmp, 0, 0);
923
924 /*
925 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
926 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
927 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
928 * result = DP4 t1.wzyx, sin_constants
929 */
930 i915_emit_arith(p,
931 A0_MUL,
932 tmp, A0_DEST_CHANNEL_XY, 0,
933 swizzle(tmp, X, X, ONE, ONE),
934 swizzle(tmp, X, ONE, ONE, ONE), 0);
935
936 i915_emit_arith(p,
937 A0_MUL,
938 tmp, A0_DEST_CHANNEL_ALL, 0,
939 swizzle(tmp, X, Y, X, Y),
940 swizzle(tmp, X, X, ONE, ONE), 0);
941
942 i915_emit_arith(p,
943 A0_MUL,
944 tmp, A0_DEST_CHANNEL_ALL, 0,
945 swizzle(tmp, X, Y, Y, W),
946 swizzle(tmp, X, Z, ONE, ONE), 0);
947
948 i915_emit_arith(p,
949 A0_DP4,
950 get_result_vector(p, &inst->Dst[0]),
951 get_result_flags(inst), 0,
952 swizzle(tmp, W, Z, Y, X),
953 i915_emit_const4fv(p, sin_constants), 0);
954 break;
955
956 case TGSI_OPCODE_SLE:
957 /* like SGE, but swap reg0, reg1 */
958 emit_simple_arith_swap2(p, inst, A0_SGE, 2, fs);
959 break;
960
961 case TGSI_OPCODE_SLT:
962 emit_simple_arith(p, inst, A0_SLT, 2, fs);
963 break;
964
965 case TGSI_OPCODE_SGT:
966 /* like SLT, but swap reg0, reg1 */
967 emit_simple_arith_swap2(p, inst, A0_SLT, 2, fs);
968 break;
969
970 case TGSI_OPCODE_SNE:
971 /* if we're < or > then we're != */
972 src0 = src_vector(p, &inst->Src[0], fs);
973 src1 = src_vector(p, &inst->Src[1], fs);
974 tmp = i915_get_utemp(p);
975
976 i915_emit_arith(p,
977 A0_SLT,
978 tmp,
979 A0_DEST_CHANNEL_ALL, 0,
980 src0,
981 src1, 0);
982
983 i915_emit_arith(p,
984 A0_SLT,
985 get_result_vector(p, &inst->Dst[0]),
986 A0_DEST_CHANNEL_ALL, 0,
987 src1,
988 src0, 0);
989
990 i915_emit_arith(p,
991 A0_ADD,
992 get_result_vector(p, &inst->Dst[0]),
993 A0_DEST_CHANNEL_ALL, 0,
994 get_result_vector(p, &inst->Dst[0]),
995 tmp, 0);
996 break;
997
998 case TGSI_OPCODE_SSG:
999 /* compute (src>0) - (src<0) */
1000 src0 = src_vector(p, &inst->Src[0], fs);
1001 tmp = i915_get_utemp(p);
1002
1003 i915_emit_arith(p,
1004 A0_SLT,
1005 tmp,
1006 A0_DEST_CHANNEL_ALL, 0,
1007 src0,
1008 swizzle(src0, ZERO, ZERO, ZERO, ZERO), 0);
1009
1010 i915_emit_arith(p,
1011 A0_SLT,
1012 get_result_vector(p, &inst->Dst[0]),
1013 A0_DEST_CHANNEL_ALL, 0,
1014 swizzle(src0, ZERO, ZERO, ZERO, ZERO),
1015 src0, 0);
1016
1017 i915_emit_arith(p,
1018 A0_ADD,
1019 get_result_vector(p, &inst->Dst[0]),
1020 A0_DEST_CHANNEL_ALL, 0,
1021 get_result_vector(p, &inst->Dst[0]),
1022 negate(tmp, 1, 1, 1, 1), 0);
1023 break;
1024
1025 case TGSI_OPCODE_SUB:
1026 src0 = src_vector(p, &inst->Src[0], fs);
1027 src1 = src_vector(p, &inst->Src[1], fs);
1028
1029 i915_emit_arith(p,
1030 A0_ADD,
1031 get_result_vector(p, &inst->Dst[0]),
1032 get_result_flags(inst), 0,
1033 src0, negate(src1, 1, 1, 1, 1), 0);
1034 break;
1035
1036 case TGSI_OPCODE_TEX:
1037 emit_tex(p, inst, T0_TEXLD, fs);
1038 break;
1039
1040 case TGSI_OPCODE_TRUNC:
1041 emit_simple_arith(p, inst, A0_TRC, 1, fs);
1042 break;
1043
1044 case TGSI_OPCODE_TXB:
1045 emit_tex(p, inst, T0_TEXLDB, fs);
1046 break;
1047
1048 case TGSI_OPCODE_TXP:
1049 emit_tex(p, inst, T0_TEXLDP, fs);
1050 break;
1051
1052 case TGSI_OPCODE_XPD:
1053 /* Cross product:
1054 * result.x = src0.y * src1.z - src0.z * src1.y;
1055 * result.y = src0.z * src1.x - src0.x * src1.z;
1056 * result.z = src0.x * src1.y - src0.y * src1.x;
1057 * result.w = undef;
1058 */
1059 src0 = src_vector(p, &inst->Src[0], fs);
1060 src1 = src_vector(p, &inst->Src[1], fs);
1061 tmp = i915_get_utemp(p);
1062
1063 i915_emit_arith(p,
1064 A0_MUL,
1065 tmp, A0_DEST_CHANNEL_ALL, 0,
1066 swizzle(src0, Z, X, Y, ONE),
1067 swizzle(src1, Y, Z, X, ONE), 0);
1068
1069 i915_emit_arith(p,
1070 A0_MAD,
1071 get_result_vector(p, &inst->Dst[0]),
1072 get_result_flags(inst), 0,
1073 swizzle(src0, Y, Z, X, ONE),
1074 swizzle(src1, Z, X, Y, ONE),
1075 negate(tmp, 1, 1, 1, 0));
1076 break;
1077
1078 default:
1079 i915_program_error(p, "bad opcode %d", inst->Instruction.Opcode);
1080 p->error = 1;
1081 return;
1082 }
1083
1084 i915_release_utemps(p);
1085 }
1086
1087
1088 static void i915_translate_token(struct i915_fp_compile *p,
1089 const union i915_full_token* token,
1090 struct i915_fragment_shader *fs)
1091 {
1092 struct i915_fragment_shader *ifs = p->shader;
1093 switch( token->Token.Type ) {
1094 case TGSI_TOKEN_TYPE_PROPERTY:
1095 /*
1096 * We only support one cbuf, but we still need to ignore the property
1097 * correctly so we don't hit the assert at the end of the switch case.
1098 */
1099 assert(token->FullProperty.Property.PropertyName ==
1100 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS);
1101 break;
1102
1103 case TGSI_TOKEN_TYPE_DECLARATION:
1104 if (token->FullDeclaration.Declaration.File
1105 == TGSI_FILE_CONSTANT) {
1106 uint i;
1107 for (i = token->FullDeclaration.Range.First;
1108 i <= token->FullDeclaration.Range.Last;
1109 i++) {
1110 assert(ifs->constant_flags[i] == 0x0);
1111 ifs->constant_flags[i] = I915_CONSTFLAG_USER;
1112 ifs->num_constants = MAX2(ifs->num_constants, i + 1);
1113 }
1114 }
1115 else if (token->FullDeclaration.Declaration.File
1116 == TGSI_FILE_TEMPORARY) {
1117 uint i;
1118 for (i = token->FullDeclaration.Range.First;
1119 i <= token->FullDeclaration.Range.Last;
1120 i++) {
1121 if (i >= I915_MAX_TEMPORARY)
1122 debug_printf("Too many temps (%d)\n",i);
1123 else
1124 /* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
1125 p->temp_flag |= (1 << i); /* mark temp as used */
1126 }
1127 }
1128 break;
1129
1130 case TGSI_TOKEN_TYPE_IMMEDIATE:
1131 {
1132 const struct tgsi_full_immediate *imm
1133 = &token->FullImmediate;
1134 const uint pos = p->num_immediates++;
1135 uint j;
1136 assert( imm->Immediate.NrTokens <= 4 + 1 );
1137 for (j = 0; j < imm->Immediate.NrTokens - 1; j++) {
1138 p->immediates[pos][j] = imm->u[j].Float;
1139 }
1140 }
1141 break;
1142
1143 case TGSI_TOKEN_TYPE_INSTRUCTION:
1144 if (p->first_instruction) {
1145 /* resolve location of immediates */
1146 uint i, j;
1147 for (i = 0; i < p->num_immediates; i++) {
1148 /* find constant slot for this immediate */
1149 for (j = 0; j < I915_MAX_CONSTANT; j++) {
1150 if (ifs->constant_flags[j] == 0x0) {
1151 memcpy(ifs->constants[j],
1152 p->immediates[i],
1153 4 * sizeof(float));
1154 /*printf("immediate %d maps to const %d\n", i, j);*/
1155 ifs->constant_flags[j] = 0xf; /* all four comps used */
1156 p->immediates_map[i] = j;
1157 ifs->num_constants = MAX2(ifs->num_constants, j + 1);
1158 break;
1159 }
1160 }
1161 }
1162
1163 p->first_instruction = FALSE;
1164 }
1165
1166 i915_translate_instruction(p, &token->FullInstruction, fs);
1167 break;
1168
1169 default:
1170 assert( 0 );
1171 }
1172
1173 }
1174
1175 /**
1176 * Translate TGSI fragment shader into i915 hardware instructions.
1177 * \param p the translation state
1178 * \param tokens the TGSI token array
1179 */
1180 static void
1181 i915_translate_instructions(struct i915_fp_compile *p,
1182 const struct i915_token_list *tokens,
1183 struct i915_fragment_shader *fs)
1184 {
1185 int i;
1186 for(i = 0; i<tokens->NumTokens; i++) {
1187 i915_translate_token(p, &tokens->Tokens[i], fs);
1188 }
1189 }
1190
1191
1192 static struct i915_fp_compile *
1193 i915_init_compile(struct i915_context *i915,
1194 struct i915_fragment_shader *ifs)
1195 {
1196 struct i915_fp_compile *p = CALLOC_STRUCT(i915_fp_compile);
1197 int i;
1198
1199 p->shader = ifs;
1200
1201 /* Put new constants at end of const buffer, growing downward.
1202 * The problem is we don't know how many user-defined constants might
1203 * be specified with pipe->set_constant_buffer().
1204 * Should pre-scan the user's program to determine the highest-numbered
1205 * constant referenced.
1206 */
1207 ifs->num_constants = 0;
1208 memset(ifs->constant_flags, 0, sizeof(ifs->constant_flags));
1209
1210 memset(&p->register_phases, 0, sizeof(p->register_phases));
1211
1212 for (i = 0; i < I915_TEX_UNITS; i++)
1213 ifs->generic_mapping[i] = -1;
1214
1215 p->first_instruction = TRUE;
1216
1217 p->nr_tex_indirect = 1; /* correct? */
1218 p->nr_tex_insn = 0;
1219 p->nr_alu_insn = 0;
1220 p->nr_decl_insn = 0;
1221
1222 p->csr = p->program;
1223 p->decl = p->declarations;
1224 p->decl_s = 0;
1225 p->decl_t = 0;
1226 p->temp_flag = ~0x0 << I915_MAX_TEMPORARY;
1227 p->utemp_flag = ~0x7;
1228
1229 /* initialize the first program word */
1230 *(p->decl++) = _3DSTATE_PIXEL_SHADER_PROGRAM;
1231
1232 return p;
1233 }
1234
1235
1236 /* Copy compile results to the fragment program struct and destroy the
1237 * compilation context.
1238 */
1239 static void
1240 i915_fini_compile(struct i915_context *i915, struct i915_fp_compile *p)
1241 {
1242 struct i915_fragment_shader *ifs = p->shader;
1243 unsigned long program_size = (unsigned long) (p->csr - p->program);
1244 unsigned long decl_size = (unsigned long) (p->decl - p->declarations);
1245
1246 if (p->nr_tex_indirect > I915_MAX_TEX_INDIRECT)
1247 debug_printf("Exceeded max nr indirect texture lookups\n");
1248
1249 if (p->nr_tex_insn > I915_MAX_TEX_INSN)
1250 i915_program_error(p, "Exceeded max TEX instructions");
1251
1252 if (p->nr_alu_insn > I915_MAX_ALU_INSN)
1253 i915_program_error(p, "Exceeded max ALU instructions");
1254
1255 if (p->nr_decl_insn > I915_MAX_DECL_INSN)
1256 i915_program_error(p, "Exceeded max DECL instructions");
1257
1258 if (p->error) {
1259 p->NumNativeInstructions = 0;
1260 p->NumNativeAluInstructions = 0;
1261 p->NumNativeTexInstructions = 0;
1262 p->NumNativeTexIndirections = 0;
1263
1264 i915_use_passthrough_shader(ifs);
1265 }
1266 else {
1267 p->NumNativeInstructions
1268 = p->nr_alu_insn + p->nr_tex_insn + p->nr_decl_insn;
1269 p->NumNativeAluInstructions = p->nr_alu_insn;
1270 p->NumNativeTexInstructions = p->nr_tex_insn;
1271 p->NumNativeTexIndirections = p->nr_tex_indirect;
1272
1273 /* patch in the program length */
1274 p->declarations[0] |= program_size + decl_size - 2;
1275
1276 /* Copy compilation results to fragment program struct:
1277 */
1278 assert(!ifs->program);
1279 ifs->program
1280 = (uint *) MALLOC((program_size + decl_size) * sizeof(uint));
1281 if (ifs->program) {
1282 ifs->program_len = program_size + decl_size;
1283
1284 memcpy(ifs->program,
1285 p->declarations,
1286 decl_size * sizeof(uint));
1287
1288 memcpy(ifs->program + decl_size,
1289 p->program,
1290 program_size * sizeof(uint));
1291 }
1292 }
1293
1294 /* Release the compilation struct:
1295 */
1296 FREE(p);
1297 }
1298
1299
1300
1301
1302
1303 /**
1304 * Rather than trying to intercept and jiggle depth writes during
1305 * emit, just move the value into its correct position at the end of
1306 * the program:
1307 */
1308 static void
1309 i915_fixup_depth_write(struct i915_fp_compile *p)
1310 {
1311 /* XXX assuming pos/depth is always in output[0] */
1312 if (p->shader->info.output_semantic_name[0] == TGSI_SEMANTIC_POSITION) {
1313 const uint depth = UREG(REG_TYPE_OD, 0);
1314
1315 i915_emit_arith(p,
1316 A0_MOV, /* opcode */
1317 depth, /* dest reg */
1318 A0_DEST_CHANNEL_W, /* write mask */
1319 0, /* saturate? */
1320 swizzle(depth, X, Y, Z, Z), /* src0 */
1321 0, 0 /* src1, src2 */);
1322 }
1323 }
1324
1325
1326 void
1327 i915_translate_fragment_program( struct i915_context *i915,
1328 struct i915_fragment_shader *fs)
1329 {
1330 struct i915_fp_compile *p;
1331 const struct tgsi_token *tokens = fs->state.tokens;
1332 struct i915_token_list* i_tokens;
1333
1334 #if 0
1335 tgsi_dump(tokens, 0);
1336 #endif
1337
1338 /* hw doesn't seem to like empty frag programs, even when the depth write
1339 * fixup gets emitted below - may that one is fishy, too? */
1340 if (fs->info.num_instructions == 1) {
1341 i915_use_passthrough_shader(fs);
1342
1343 return;
1344 }
1345
1346 p = i915_init_compile(i915, fs);
1347
1348 i_tokens = i915_optimize(tokens);
1349 i915_translate_instructions(p, i_tokens, fs);
1350 i915_fixup_depth_write(p);
1351
1352 i915_fini_compile(i915, p);
1353 i915_optimize_free(i_tokens);
1354
1355 #if 0
1356 i915_disassemble_program(NULL, fs->program, fs->program_len);
1357 #endif
1358 }