1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
32 #include "i915_context.h"
35 #include "pipe/p_shader_tokens.h"
36 #include "util/u_math.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_parse.h"
40 #include "tgsi/tgsi_dump.h"
42 #include "draw/draw_vertex.h"
46 * Simple pass-through fragment shader to use when we don't have
47 * a real shader (or it fails to compile for some reason).
49 static unsigned passthrough
[] =
51 _3DSTATE_PIXEL_SHADER_PROGRAM
| ((2*3)-1),
53 /* declare input color:
56 (REG_TYPE_T
<< D0_TYPE_SHIFT
) |
57 (T_DIFFUSE
<< D0_NR_SHIFT
) |
62 /* move to output color:
65 (REG_TYPE_OC
<< A0_DEST_TYPE_SHIFT
) |
67 (REG_TYPE_T
<< A0_SRC0_TYPE_SHIFT
) |
68 (T_DIFFUSE
<< A0_SRC0_NR_SHIFT
)),
69 0x01230000, /* .xyzw */
74 /* 1, -1/3!, 1/5!, -1/7! */
75 static const float sin_constants
[4] = { 1.0,
77 1.0f
/ (5 * 4 * 3 * 2 * 1),
78 -1.0f
/ (7 * 6 * 5 * 4 * 3 * 2 * 1)
81 /* 1, -1/2!, 1/4!, -1/6! */
82 static const float cos_constants
[4] = { 1.0,
84 1.0f
/ (4 * 3 * 2 * 1),
85 -1.0f
/ (6 * 5 * 4 * 3 * 2 * 1)
91 * component-wise negation of ureg
94 negate(int reg
, int x
, int y
, int z
, int w
)
96 /* Another neat thing about the UREG representation */
97 return reg
^ (((x
& 1) << UREG_CHANNEL_X_NEGATE_SHIFT
) |
98 ((y
& 1) << UREG_CHANNEL_Y_NEGATE_SHIFT
) |
99 ((z
& 1) << UREG_CHANNEL_Z_NEGATE_SHIFT
) |
100 ((w
& 1) << UREG_CHANNEL_W_NEGATE_SHIFT
));
105 * In the event of a translation failure, we'll generate a simple color
106 * pass-through program.
109 i915_use_passthrough_shader(struct i915_fragment_shader
*fs
)
111 fs
->program
= (uint
*) MALLOC(sizeof(passthrough
));
113 memcpy(fs
->program
, passthrough
, sizeof(passthrough
));
114 fs
->program_len
= Elements(passthrough
);
116 fs
->num_constants
= 0;
121 i915_program_error(struct i915_fp_compile
*p
, const char *msg
, ...)
126 debug_printf("i915_program_error: ");
127 va_start( args
, msg
);
128 util_vsnprintf( buffer
, sizeof(buffer
), msg
, args
);
130 debug_printf("%s", buffer
);
139 * Construct a ureg for the given source register. Will emit
140 * constants, apply swizzling and negation as needed.
143 src_vector(struct i915_fp_compile
*p
,
144 const struct tgsi_full_src_register
*source
)
146 uint index
= source
->Register
.Index
;
147 uint src
= 0, sem_name
, sem_ind
;
149 switch (source
->Register
.File
) {
150 case TGSI_FILE_TEMPORARY
:
151 if (source
->Register
.Index
>= I915_MAX_TEMPORARY
) {
152 i915_program_error(p
, "Exceeded max temporary reg");
155 src
= UREG(REG_TYPE_R
, index
);
157 case TGSI_FILE_INPUT
:
158 /* XXX: Packing COL1, FOGC into a single attribute works for
159 * texenv programs, but will fail for real fragment programs
160 * that use these attributes and expect them to be a full 4
161 * components wide. Could use a texcoord to pass these
162 * attributes if necessary, but that won't work in the general
165 * We also use a texture coordinate to pass wpos when possible.
168 sem_name
= p
->shader
->info
.input_semantic_name
[index
];
169 sem_ind
= p
->shader
->info
.input_semantic_index
[index
];
172 case TGSI_SEMANTIC_POSITION
:
173 debug_printf("SKIP SEM POS\n");
175 assert(p->wpos_tex != -1);
176 src = i915_emit_decl(p, REG_TYPE_T, p->wpos_tex, D0_CHANNEL_ALL);
179 case TGSI_SEMANTIC_COLOR
:
181 src
= i915_emit_decl(p
, REG_TYPE_T
, T_DIFFUSE
, D0_CHANNEL_ALL
);
184 /* secondary color */
185 assert(sem_ind
== 1);
186 src
= i915_emit_decl(p
, REG_TYPE_T
, T_SPECULAR
, D0_CHANNEL_XYZ
);
187 src
= swizzle(src
, X
, Y
, Z
, ONE
);
190 case TGSI_SEMANTIC_FOG
:
191 src
= i915_emit_decl(p
, REG_TYPE_T
, T_FOG_W
, D0_CHANNEL_W
);
192 src
= swizzle(src
, W
, W
, W
, W
);
194 case TGSI_SEMANTIC_GENERIC
:
195 /* usually a texcoord */
196 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ sem_ind
, D0_CHANNEL_ALL
);
199 i915_program_error(p
, "Bad source->Index");
204 case TGSI_FILE_IMMEDIATE
:
205 assert(index
< p
->num_immediates
);
206 index
= p
->immediates_map
[index
];
208 case TGSI_FILE_CONSTANT
:
209 src
= UREG(REG_TYPE_CONST
, index
);
213 i915_program_error(p
, "Bad source->File");
218 source
->Register
.SwizzleX
,
219 source
->Register
.SwizzleY
,
220 source
->Register
.SwizzleZ
,
221 source
->Register
.SwizzleW
);
224 /* There's both negate-all-components and per-component negation.
225 * Try to handle both here.
228 int n
= source
->Register
.Negate
;
229 src
= negate(src
, n
, n
, n
, n
);
234 /* XXX assertions disabled to allow arbfplight.c to run */
235 /* XXX enable these assertions, or fix things */
236 assert(!source
->Register
.Absolute
);
243 * Construct a ureg for a destination register.
246 get_result_vector(struct i915_fp_compile
*p
,
247 const struct tgsi_full_dst_register
*dest
)
249 switch (dest
->Register
.File
) {
250 case TGSI_FILE_OUTPUT
:
252 uint sem_name
= p
->shader
->info
.output_semantic_name
[dest
->Register
.Index
];
254 case TGSI_SEMANTIC_POSITION
:
255 return UREG(REG_TYPE_OD
, 0);
256 case TGSI_SEMANTIC_COLOR
:
257 return UREG(REG_TYPE_OC
, 0);
259 i915_program_error(p
, "Bad inst->DstReg.Index/semantics");
263 case TGSI_FILE_TEMPORARY
:
264 return UREG(REG_TYPE_R
, dest
->Register
.Index
);
266 i915_program_error(p
, "Bad inst->DstReg.File");
273 * Compute flags for saturation and writemask.
276 get_result_flags(const struct tgsi_full_instruction
*inst
)
279 = inst
->Dst
[0].Register
.WriteMask
;
282 if (inst
->Instruction
.Saturate
== TGSI_SAT_ZERO_ONE
)
283 flags
|= A0_DEST_SATURATE
;
285 if (writeMask
& TGSI_WRITEMASK_X
)
286 flags
|= A0_DEST_CHANNEL_X
;
287 if (writeMask
& TGSI_WRITEMASK_Y
)
288 flags
|= A0_DEST_CHANNEL_Y
;
289 if (writeMask
& TGSI_WRITEMASK_Z
)
290 flags
|= A0_DEST_CHANNEL_Z
;
291 if (writeMask
& TGSI_WRITEMASK_W
)
292 flags
|= A0_DEST_CHANNEL_W
;
299 * Convert TGSI_TEXTURE_x token to DO_SAMPLE_TYPE_x token
302 translate_tex_src_target(struct i915_fp_compile
*p
, uint tex
)
305 case TGSI_TEXTURE_SHADOW1D
:
307 case TGSI_TEXTURE_1D
:
308 return D0_SAMPLE_TYPE_2D
;
310 case TGSI_TEXTURE_SHADOW2D
:
312 case TGSI_TEXTURE_2D
:
313 return D0_SAMPLE_TYPE_2D
;
315 case TGSI_TEXTURE_SHADOWRECT
:
317 case TGSI_TEXTURE_RECT
:
318 return D0_SAMPLE_TYPE_2D
;
320 case TGSI_TEXTURE_3D
:
321 return D0_SAMPLE_TYPE_VOLUME
;
323 case TGSI_TEXTURE_CUBE
:
324 return D0_SAMPLE_TYPE_CUBE
;
327 i915_program_error(p
, "TexSrc type");
334 * Generate texel lookup instruction.
337 emit_tex(struct i915_fp_compile
*p
,
338 const struct tgsi_full_instruction
*inst
,
341 uint texture
= inst
->Texture
.Texture
;
342 uint unit
= inst
->Src
[1].Register
.Index
;
343 uint tex
= translate_tex_src_target( p
, texture
);
344 uint sampler
= i915_emit_decl(p
, REG_TYPE_S
, unit
, tex
);
345 uint coord
= src_vector( p
, &inst
->Src
[0]);
348 get_result_vector( p
, &inst
->Dst
[0] ),
349 get_result_flags( inst
),
357 * Generate a simple arithmetic instruction
358 * \param opcode the i915 opcode
359 * \param numArgs the number of input/src arguments
362 emit_simple_arith(struct i915_fp_compile
*p
,
363 const struct tgsi_full_instruction
*inst
,
364 uint opcode
, uint numArgs
)
366 uint arg1
, arg2
, arg3
;
368 assert(numArgs
<= 3);
370 arg1
= (numArgs
< 1) ? 0 : src_vector( p
, &inst
->Src
[0] );
371 arg2
= (numArgs
< 2) ? 0 : src_vector( p
, &inst
->Src
[1] );
372 arg3
= (numArgs
< 3) ? 0 : src_vector( p
, &inst
->Src
[2] );
376 get_result_vector( p
, &inst
->Dst
[0]),
377 get_result_flags( inst
), 0,
384 /** As above, but swap the first two src regs */
386 emit_simple_arith_swap2(struct i915_fp_compile
*p
,
387 const struct tgsi_full_instruction
*inst
,
388 uint opcode
, uint numArgs
)
390 struct tgsi_full_instruction inst2
;
392 assert(numArgs
== 2);
394 /* transpose first two registers */
396 inst2
.Src
[0] = inst
->Src
[1];
397 inst2
.Src
[1] = inst
->Src
[0];
399 emit_simple_arith(p
, &inst2
, opcode
, numArgs
);
404 #define M_PI 3.14159265358979323846
408 * Translate TGSI instruction to i915 instruction.
412 * SIN, COS -- could use another taylor step?
413 * LIT -- results seem a little different to sw mesa
414 * LOG -- different to mesa on negative numbers, but this is conformant.
417 i915_translate_instruction(struct i915_fp_compile
*p
,
418 const struct tgsi_full_instruction
*inst
)
421 uint src0
, src1
, src2
, flags
;
424 switch (inst
->Instruction
.Opcode
) {
425 case TGSI_OPCODE_ABS
:
426 src0
= src_vector(p
, &inst
->Src
[0]);
429 get_result_vector(p
, &inst
->Dst
[0]),
430 get_result_flags(inst
), 0,
431 src0
, negate(src0
, 1, 1, 1, 1), 0);
434 case TGSI_OPCODE_ADD
:
435 emit_simple_arith(p
, inst
, A0_ADD
, 2);
438 case TGSI_OPCODE_CMP
:
439 src0
= src_vector(p
, &inst
->Src
[0]);
440 src1
= src_vector(p
, &inst
->Src
[1]);
441 src2
= src_vector(p
, &inst
->Src
[2]);
442 i915_emit_arith(p
, A0_CMP
,
443 get_result_vector(p
, &inst
->Dst
[0]),
444 get_result_flags(inst
),
445 0, src0
, src2
, src1
); /* NOTE: order of src2, src1 */
448 case TGSI_OPCODE_COS
:
449 src0
= src_vector(p
, &inst
->Src
[0]);
450 tmp
= i915_get_utemp(p
);
454 tmp
, A0_DEST_CHANNEL_X
, 0,
455 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
457 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
459 /* By choosing different taylor constants, could get rid of this mul:
463 tmp
, A0_DEST_CHANNEL_X
, 0,
464 tmp
, i915_emit_const1f(p
, (float) (M_PI
* 2.0)), 0);
467 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
468 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
469 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
470 * result = DP4 t0, cos_constants
474 tmp
, A0_DEST_CHANNEL_XY
, 0,
475 swizzle(tmp
, X
, X
, ONE
, ONE
),
476 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
480 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
481 swizzle(tmp
, X
, Y
, X
, ONE
),
482 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
486 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
487 swizzle(tmp
, X
, X
, Z
, ONE
),
488 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
492 get_result_vector(p
, &inst
->Dst
[0]),
493 get_result_flags(inst
), 0,
494 swizzle(tmp
, ONE
, Z
, Y
, X
),
495 i915_emit_const4fv(p
, cos_constants
), 0);
498 case TGSI_OPCODE_DP3
:
499 emit_simple_arith(p
, inst
, A0_DP3
, 2);
502 case TGSI_OPCODE_DP4
:
503 emit_simple_arith(p
, inst
, A0_DP4
, 2);
506 case TGSI_OPCODE_DPH
:
507 src0
= src_vector(p
, &inst
->Src
[0]);
508 src1
= src_vector(p
, &inst
->Src
[1]);
512 get_result_vector(p
, &inst
->Dst
[0]),
513 get_result_flags(inst
), 0,
514 swizzle(src0
, X
, Y
, Z
, ONE
), src1
, 0);
517 case TGSI_OPCODE_DST
:
518 src0
= src_vector(p
, &inst
->Src
[0]);
519 src1
= src_vector(p
, &inst
->Src
[1]);
521 /* result[0] = 1 * 1;
522 * result[1] = a[1] * b[1];
523 * result[2] = a[2] * 1;
524 * result[3] = 1 * b[3];
528 get_result_vector(p
, &inst
->Dst
[0]),
529 get_result_flags(inst
), 0,
530 swizzle(src0
, ONE
, Y
, Z
, ONE
),
531 swizzle(src1
, ONE
, Y
, ONE
, W
), 0);
534 case TGSI_OPCODE_END
:
538 case TGSI_OPCODE_EX2
:
539 src0
= src_vector(p
, &inst
->Src
[0]);
543 get_result_vector(p
, &inst
->Dst
[0]),
544 get_result_flags(inst
), 0,
545 swizzle(src0
, X
, X
, X
, X
), 0, 0);
548 case TGSI_OPCODE_FLR
:
549 emit_simple_arith(p
, inst
, A0_FLR
, 1);
552 case TGSI_OPCODE_FRC
:
553 emit_simple_arith(p
, inst
, A0_FRC
, 1);
556 case TGSI_OPCODE_KIL
:
557 /* kill if src[0].x < 0 || src[0].y < 0 ... */
558 src0
= src_vector(p
, &inst
->Src
[0]);
559 tmp
= i915_get_utemp(p
);
562 tmp
, /* dest reg: a dummy reg */
563 A0_DEST_CHANNEL_ALL
, /* dest writemask */
566 T0_TEXKILL
); /* opcode */
569 case TGSI_OPCODE_KILP
:
570 assert(0); /* not tested yet */
573 case TGSI_OPCODE_LG2
:
574 src0
= src_vector(p
, &inst
->Src
[0]);
578 get_result_vector(p
, &inst
->Dst
[0]),
579 get_result_flags(inst
), 0,
580 swizzle(src0
, X
, X
, X
, X
), 0, 0);
583 case TGSI_OPCODE_LIT
:
584 src0
= src_vector(p
, &inst
->Src
[0]);
585 tmp
= i915_get_utemp(p
);
587 /* tmp = max( a.xyzw, a.00zw )
588 * XXX: Clamp tmp.w to -128..128
590 * tmp.y = tmp.w * tmp.y
592 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
594 i915_emit_arith(p
, A0_MAX
, tmp
, A0_DEST_CHANNEL_ALL
, 0,
595 src0
, swizzle(src0
, ZERO
, ZERO
, Z
, W
), 0);
597 i915_emit_arith(p
, A0_LOG
, tmp
, A0_DEST_CHANNEL_Y
, 0,
598 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
600 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_Y
, 0,
601 swizzle(tmp
, ZERO
, Y
, ZERO
, ZERO
),
602 swizzle(tmp
, ZERO
, W
, ZERO
, ZERO
), 0);
604 i915_emit_arith(p
, A0_EXP
, tmp
, A0_DEST_CHANNEL_Y
, 0,
605 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
607 i915_emit_arith(p
, A0_CMP
,
608 get_result_vector(p
, &inst
->Dst
[0]),
609 get_result_flags(inst
), 0,
610 negate(swizzle(tmp
, ONE
, ONE
, X
, ONE
), 0, 0, 1, 0),
611 swizzle(tmp
, ONE
, X
, ZERO
, ONE
),
612 swizzle(tmp
, ONE
, X
, Y
, ONE
));
616 case TGSI_OPCODE_LRP
:
617 src0
= src_vector(p
, &inst
->Src
[0]);
618 src1
= src_vector(p
, &inst
->Src
[1]);
619 src2
= src_vector(p
, &inst
->Src
[2]);
620 flags
= get_result_flags(inst
);
621 tmp
= i915_get_utemp(p
);
628 * result = (-c)*a + tmp
630 i915_emit_arith(p
, A0_MAD
, tmp
,
631 flags
& A0_DEST_CHANNEL_ALL
, 0, src1
, src0
, src2
);
633 i915_emit_arith(p
, A0_MAD
,
634 get_result_vector(p
, &inst
->Dst
[0]),
635 flags
, 0, negate(src2
, 1, 1, 1, 1), src0
, tmp
);
638 case TGSI_OPCODE_MAD
:
639 emit_simple_arith(p
, inst
, A0_MAD
, 3);
642 case TGSI_OPCODE_MAX
:
643 emit_simple_arith(p
, inst
, A0_MAX
, 2);
646 case TGSI_OPCODE_MIN
:
647 src0
= src_vector(p
, &inst
->Src
[0]);
648 src1
= src_vector(p
, &inst
->Src
[1]);
649 tmp
= i915_get_utemp(p
);
650 flags
= get_result_flags(inst
);
654 tmp
, flags
& A0_DEST_CHANNEL_ALL
, 0,
655 negate(src0
, 1, 1, 1, 1),
656 negate(src1
, 1, 1, 1, 1), 0);
660 get_result_vector(p
, &inst
->Dst
[0]),
661 flags
, 0, negate(tmp
, 1, 1, 1, 1), 0, 0);
664 case TGSI_OPCODE_MOV
:
665 emit_simple_arith(p
, inst
, A0_MOV
, 1);
668 case TGSI_OPCODE_MUL
:
669 emit_simple_arith(p
, inst
, A0_MUL
, 2);
672 case TGSI_OPCODE_POW
:
673 src0
= src_vector(p
, &inst
->Src
[0]);
674 src1
= src_vector(p
, &inst
->Src
[1]);
675 tmp
= i915_get_utemp(p
);
676 flags
= get_result_flags(inst
);
678 /* XXX: masking on intermediate values, here and elsewhere.
682 tmp
, A0_DEST_CHANNEL_X
, 0,
683 swizzle(src0
, X
, X
, X
, X
), 0, 0);
685 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, src1
, 0);
689 get_result_vector(p
, &inst
->Dst
[0]),
690 flags
, 0, swizzle(tmp
, X
, X
, X
, X
), 0, 0);
693 case TGSI_OPCODE_RET
:
697 case TGSI_OPCODE_RCP
:
698 src0
= src_vector(p
, &inst
->Src
[0]);
702 get_result_vector(p
, &inst
->Dst
[0]),
703 get_result_flags(inst
), 0,
704 swizzle(src0
, X
, X
, X
, X
), 0, 0);
707 case TGSI_OPCODE_RSQ
:
708 src0
= src_vector(p
, &inst
->Src
[0]);
712 get_result_vector(p
, &inst
->Dst
[0]),
713 get_result_flags(inst
), 0,
714 swizzle(src0
, X
, X
, X
, X
), 0, 0);
717 case TGSI_OPCODE_SCS
:
718 src0
= src_vector(p
, &inst
->Src
[0]);
719 tmp
= i915_get_utemp(p
);
722 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
723 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
724 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
725 * scs.x = DP4 t1, sin_constants
726 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
727 * scs.y = DP4 t1, cos_constants
731 tmp
, A0_DEST_CHANNEL_XY
, 0,
732 swizzle(src0
, X
, X
, ONE
, ONE
),
733 swizzle(src0
, X
, ONE
, ONE
, ONE
), 0);
737 tmp
, A0_DEST_CHANNEL_ALL
, 0,
738 swizzle(tmp
, X
, Y
, X
, Y
),
739 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
741 writemask
= inst
->Dst
[0].Register
.WriteMask
;
743 if (writemask
& TGSI_WRITEMASK_Y
) {
746 if (writemask
& TGSI_WRITEMASK_X
)
747 tmp1
= i915_get_utemp(p
);
753 tmp1
, A0_DEST_CHANNEL_ALL
, 0,
754 swizzle(tmp
, X
, Y
, Y
, W
),
755 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
759 get_result_vector(p
, &inst
->Dst
[0]),
760 A0_DEST_CHANNEL_Y
, 0,
761 swizzle(tmp1
, W
, Z
, Y
, X
),
762 i915_emit_const4fv(p
, sin_constants
), 0);
765 if (writemask
& TGSI_WRITEMASK_X
) {
768 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
769 swizzle(tmp
, X
, X
, Z
, ONE
),
770 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
774 get_result_vector(p
, &inst
->Dst
[0]),
775 A0_DEST_CHANNEL_X
, 0,
776 swizzle(tmp
, ONE
, Z
, Y
, X
),
777 i915_emit_const4fv(p
, cos_constants
), 0);
781 case TGSI_OPCODE_SGE
:
782 emit_simple_arith(p
, inst
, A0_SGE
, 2);
785 case TGSI_OPCODE_SLE
:
786 /* like SGE, but swap reg0, reg1 */
787 emit_simple_arith_swap2(p
, inst
, A0_SGE
, 2);
790 case TGSI_OPCODE_SIN
:
791 src0
= src_vector(p
, &inst
->Src
[0]);
792 tmp
= i915_get_utemp(p
);
796 tmp
, A0_DEST_CHANNEL_X
, 0,
797 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
799 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
801 /* By choosing different taylor constants, could get rid of this mul:
805 tmp
, A0_DEST_CHANNEL_X
, 0,
806 tmp
, i915_emit_const1f(p
, (float) (M_PI
* 2.0)), 0);
809 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
810 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
811 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
812 * result = DP4 t1.wzyx, sin_constants
816 tmp
, A0_DEST_CHANNEL_XY
, 0,
817 swizzle(tmp
, X
, X
, ONE
, ONE
),
818 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
822 tmp
, A0_DEST_CHANNEL_ALL
, 0,
823 swizzle(tmp
, X
, Y
, X
, Y
),
824 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
828 tmp
, A0_DEST_CHANNEL_ALL
, 0,
829 swizzle(tmp
, X
, Y
, Y
, W
),
830 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
834 get_result_vector(p
, &inst
->Dst
[0]),
835 get_result_flags(inst
), 0,
836 swizzle(tmp
, W
, Z
, Y
, X
),
837 i915_emit_const4fv(p
, sin_constants
), 0);
840 case TGSI_OPCODE_SLT
:
841 emit_simple_arith(p
, inst
, A0_SLT
, 2);
844 case TGSI_OPCODE_SGT
:
845 /* like SLT, but swap reg0, reg1 */
846 emit_simple_arith_swap2(p
, inst
, A0_SLT
, 2);
849 case TGSI_OPCODE_SUB
:
850 src0
= src_vector(p
, &inst
->Src
[0]);
851 src1
= src_vector(p
, &inst
->Src
[1]);
855 get_result_vector(p
, &inst
->Dst
[0]),
856 get_result_flags(inst
), 0,
857 src0
, negate(src1
, 1, 1, 1, 1), 0);
860 case TGSI_OPCODE_TEX
:
861 emit_tex(p
, inst
, T0_TEXLD
);
864 case TGSI_OPCODE_TXB
:
865 emit_tex(p
, inst
, T0_TEXLDB
);
868 case TGSI_OPCODE_TXP
:
869 emit_tex(p
, inst
, T0_TEXLDP
);
872 case TGSI_OPCODE_XPD
:
874 * result.x = src0.y * src1.z - src0.z * src1.y;
875 * result.y = src0.z * src1.x - src0.x * src1.z;
876 * result.z = src0.x * src1.y - src0.y * src1.x;
879 src0
= src_vector(p
, &inst
->Src
[0]);
880 src1
= src_vector(p
, &inst
->Src
[1]);
881 tmp
= i915_get_utemp(p
);
885 tmp
, A0_DEST_CHANNEL_ALL
, 0,
886 swizzle(src0
, Z
, X
, Y
, ONE
),
887 swizzle(src1
, Y
, Z
, X
, ONE
), 0);
891 get_result_vector(p
, &inst
->Dst
[0]),
892 get_result_flags(inst
), 0,
893 swizzle(src0
, Y
, Z
, X
, ONE
),
894 swizzle(src1
, Z
, X
, Y
, ONE
),
895 negate(tmp
, 1, 1, 1, 0));
899 i915_program_error(p
, "bad opcode %d", inst
->Instruction
.Opcode
);
904 i915_release_utemps(p
);
909 * Translate TGSI fragment shader into i915 hardware instructions.
910 * \param p the translation state
911 * \param tokens the TGSI token array
914 i915_translate_instructions(struct i915_fp_compile
*p
,
915 const struct tgsi_token
*tokens
)
917 struct i915_fragment_shader
*ifs
= p
->shader
;
918 struct tgsi_parse_context parse
;
920 tgsi_parse_init( &parse
, tokens
);
922 while( !tgsi_parse_end_of_tokens( &parse
) ) {
924 tgsi_parse_token( &parse
);
926 switch( parse
.FullToken
.Token
.Type
) {
927 case TGSI_TOKEN_TYPE_DECLARATION
:
928 if (parse
.FullToken
.FullDeclaration
.Declaration
.File
929 == TGSI_FILE_CONSTANT
) {
931 for (i
= parse
.FullToken
.FullDeclaration
.Range
.First
;
932 i
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
934 assert(ifs
->constant_flags
[i
] == 0x0);
935 ifs
->constant_flags
[i
] = I915_CONSTFLAG_USER
;
936 ifs
->num_constants
= MAX2(ifs
->num_constants
, i
+ 1);
939 else if (parse
.FullToken
.FullDeclaration
.Declaration
.File
940 == TGSI_FILE_TEMPORARY
) {
942 for (i
= parse
.FullToken
.FullDeclaration
.Range
.First
;
943 i
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
945 assert(i
< I915_MAX_TEMPORARY
);
946 /* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
947 p
->temp_flag
|= (1 << i
); /* mark temp as used */
952 case TGSI_TOKEN_TYPE_IMMEDIATE
:
954 const struct tgsi_full_immediate
*imm
955 = &parse
.FullToken
.FullImmediate
;
956 const uint pos
= p
->num_immediates
++;
958 assert( imm
->Immediate
.NrTokens
<= 4 + 1 );
959 for (j
= 0; j
< imm
->Immediate
.NrTokens
- 1; j
++) {
960 p
->immediates
[pos
][j
] = imm
->u
[j
].Float
;
965 case TGSI_TOKEN_TYPE_INSTRUCTION
:
966 if (p
->first_instruction
) {
967 /* resolve location of immediates */
969 for (i
= 0; i
< p
->num_immediates
; i
++) {
970 /* find constant slot for this immediate */
971 for (j
= 0; j
< I915_MAX_CONSTANT
; j
++) {
972 if (ifs
->constant_flags
[j
] == 0x0) {
973 memcpy(ifs
->constants
[j
],
976 /*printf("immediate %d maps to const %d\n", i, j);*/
977 ifs
->constant_flags
[j
] = 0xf; /* all four comps used */
978 p
->immediates_map
[i
] = j
;
979 ifs
->num_constants
= MAX2(ifs
->num_constants
, j
+ 1);
985 p
->first_instruction
= FALSE
;
988 i915_translate_instruction(p
, &parse
.FullToken
.FullInstruction
);
997 tgsi_parse_free (&parse
);
1001 static struct i915_fp_compile
*
1002 i915_init_compile(struct i915_context
*i915
,
1003 struct i915_fragment_shader
*ifs
)
1005 struct i915_fp_compile
*p
= CALLOC_STRUCT(i915_fp_compile
);
1009 /* Put new constants at end of const buffer, growing downward.
1010 * The problem is we don't know how many user-defined constants might
1011 * be specified with pipe->set_constant_buffer().
1012 * Should pre-scan the user's program to determine the highest-numbered
1013 * constant referenced.
1015 ifs
->num_constants
= 0;
1016 memset(ifs
->constant_flags
, 0, sizeof(ifs
->constant_flags
));
1018 p
->first_instruction
= TRUE
;
1020 p
->nr_tex_indirect
= 1; /* correct? */
1023 p
->nr_decl_insn
= 0;
1025 p
->csr
= p
->program
;
1026 p
->decl
= p
->declarations
;
1029 p
->temp_flag
= ~0x0 << I915_MAX_TEMPORARY
;
1030 p
->utemp_flag
= ~0x7;
1034 /* initialize the first program word */
1035 *(p
->decl
++) = _3DSTATE_PIXEL_SHADER_PROGRAM
;
1041 /* Copy compile results to the fragment program struct and destroy the
1042 * compilation context.
1045 i915_fini_compile(struct i915_context
*i915
, struct i915_fp_compile
*p
)
1047 struct i915_fragment_shader
*ifs
= p
->shader
;
1048 unsigned long program_size
= (unsigned long) (p
->csr
- p
->program
);
1049 unsigned long decl_size
= (unsigned long) (p
->decl
- p
->declarations
);
1051 if (p
->nr_tex_indirect
> I915_MAX_TEX_INDIRECT
)
1052 i915_program_error(p
, "Exceeded max nr indirect texture lookups");
1054 if (p
->nr_tex_insn
> I915_MAX_TEX_INSN
)
1055 i915_program_error(p
, "Exceeded max TEX instructions");
1057 if (p
->nr_alu_insn
> I915_MAX_ALU_INSN
)
1058 i915_program_error(p
, "Exceeded max ALU instructions");
1060 if (p
->nr_decl_insn
> I915_MAX_DECL_INSN
)
1061 i915_program_error(p
, "Exceeded max DECL instructions");
1064 p
->NumNativeInstructions
= 0;
1065 p
->NumNativeAluInstructions
= 0;
1066 p
->NumNativeTexInstructions
= 0;
1067 p
->NumNativeTexIndirections
= 0;
1069 i915_use_passthrough_shader(ifs
);
1072 p
->NumNativeInstructions
1073 = p
->nr_alu_insn
+ p
->nr_tex_insn
+ p
->nr_decl_insn
;
1074 p
->NumNativeAluInstructions
= p
->nr_alu_insn
;
1075 p
->NumNativeTexInstructions
= p
->nr_tex_insn
;
1076 p
->NumNativeTexIndirections
= p
->nr_tex_indirect
;
1078 /* patch in the program length */
1079 p
->declarations
[0] |= program_size
+ decl_size
- 2;
1081 /* Copy compilation results to fragment program struct:
1083 assert(!ifs
->program
);
1085 = (uint
*) MALLOC((program_size
+ decl_size
) * sizeof(uint
));
1087 ifs
->program_len
= program_size
+ decl_size
;
1089 memcpy(ifs
->program
,
1091 decl_size
* sizeof(uint
));
1093 memcpy(ifs
->program
+ decl_size
,
1095 program_size
* sizeof(uint
));
1099 /* Release the compilation struct:
1106 * Find an unused texture coordinate slot to use for fragment WPOS.
1107 * Update p->fp->wpos_tex with the result (-1 if no used texcoord slot is found).
1110 i915_find_wpos_space(struct i915_fp_compile
*p
)
1114 = p
->shader
->inputs_read
| (1 << TGSI_ATTRIB_POS
); /*XXX hack*/
1119 if (inputs
& (1 << TGSI_ATTRIB_POS
)) {
1120 for (i
= 0; i
< I915_TEX_UNITS
; i
++) {
1121 if ((inputs
& (1 << (TGSI_ATTRIB_TEX0
+ i
))) == 0) {
1127 i915_program_error(p
, "No free texcoord for wpos value");
1130 if (p
->shader
->info
.input_semantic_name
[0] == TGSI_SEMANTIC_POSITION
) {
1131 /* frag shader using the fragment position input */
1143 * Rather than trying to intercept and jiggle depth writes during
1144 * emit, just move the value into its correct position at the end of
1148 i915_fixup_depth_write(struct i915_fp_compile
*p
)
1150 /* XXX assuming pos/depth is always in output[0] */
1151 if (p
->shader
->info
.output_semantic_name
[0] == TGSI_SEMANTIC_POSITION
) {
1152 const uint depth
= UREG(REG_TYPE_OD
, 0);
1155 A0_MOV
, /* opcode */
1156 depth
, /* dest reg */
1157 A0_DEST_CHANNEL_W
, /* write mask */
1159 swizzle(depth
, X
, Y
, Z
, Z
), /* src0 */
1160 0, 0 /* src1, src2 */);
1166 i915_translate_fragment_program( struct i915_context
*i915
,
1167 struct i915_fragment_shader
*fs
)
1169 struct i915_fp_compile
*p
= i915_init_compile(i915
, fs
);
1170 const struct tgsi_token
*tokens
= fs
->state
.tokens
;
1172 i915_find_wpos_space(p
);
1175 tgsi_dump(tokens
, 0);
1178 i915_translate_instructions(p
, tokens
);
1179 i915_fixup_depth_write(p
);
1181 i915_fini_compile(i915
, p
);