1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
32 #include "i915_context.h"
35 #include "pipe/p_shader_tokens.h"
36 #include "util/u_math.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_parse.h"
40 #include "tgsi/tgsi_dump.h"
42 #include "draw/draw_vertex.h"
46 * Simple pass-through fragment shader to use when we don't have
47 * a real shader (or it fails to compile for some reason).
49 static unsigned passthrough
[] =
51 _3DSTATE_PIXEL_SHADER_PROGRAM
| ((2*3)-1),
53 /* declare input color:
56 (REG_TYPE_T
<< D0_TYPE_SHIFT
) |
57 (T_DIFFUSE
<< D0_NR_SHIFT
) |
62 /* move to output color:
65 (REG_TYPE_OC
<< A0_DEST_TYPE_SHIFT
) |
67 (REG_TYPE_T
<< A0_SRC0_TYPE_SHIFT
) |
68 (T_DIFFUSE
<< A0_SRC0_NR_SHIFT
)),
69 0x01230000, /* .xyzw */
74 /* 1, -1/3!, 1/5!, -1/7! */
75 static const float sin_constants
[4] = { 1.0,
77 1.0f
/ (5 * 4 * 3 * 2 * 1),
78 -1.0f
/ (7 * 6 * 5 * 4 * 3 * 2 * 1)
81 /* 1, -1/2!, 1/4!, -1/6! */
82 static const float cos_constants
[4] = { 1.0,
84 1.0f
/ (4 * 3 * 2 * 1),
85 -1.0f
/ (6 * 5 * 4 * 3 * 2 * 1)
91 * component-wise negation of ureg
94 negate(int reg
, int x
, int y
, int z
, int w
)
96 /* Another neat thing about the UREG representation */
97 return reg
^ (((x
& 1) << UREG_CHANNEL_X_NEGATE_SHIFT
) |
98 ((y
& 1) << UREG_CHANNEL_Y_NEGATE_SHIFT
) |
99 ((z
& 1) << UREG_CHANNEL_Z_NEGATE_SHIFT
) |
100 ((w
& 1) << UREG_CHANNEL_W_NEGATE_SHIFT
));
105 * In the event of a translation failure, we'll generate a simple color
106 * pass-through program.
109 i915_use_passthrough_shader(struct i915_fragment_shader
*fs
)
111 fs
->program
= (uint
*) MALLOC(sizeof(passthrough
));
113 memcpy(fs
->program
, passthrough
, sizeof(passthrough
));
114 fs
->program_len
= Elements(passthrough
);
116 fs
->num_constants
= 0;
121 i915_program_error(struct i915_fp_compile
*p
, const char *msg
, ...)
126 debug_printf("i915_program_error: ");
127 va_start( args
, msg
);
128 util_vsnprintf( buffer
, sizeof(buffer
), msg
, args
);
130 debug_printf("%s", buffer
);
136 static uint
get_mapping(struct i915_fragment_shader
* fs
, int unit
)
139 for (i
= 0; i
< I915_TEX_UNITS
; i
++)
141 if (fs
->generic_mapping
[i
] == -1) {
142 fs
->generic_mapping
[i
] = unit
;
145 if (fs
->generic_mapping
[i
] == unit
)
148 debug_printf("Exceeded max generics\n");
153 * Construct a ureg for the given source register. Will emit
154 * constants, apply swizzling and negation as needed.
157 src_vector(struct i915_fp_compile
*p
,
158 const struct tgsi_full_src_register
*source
,
159 struct i915_fragment_shader
* fs
)
161 uint index
= source
->Register
.Index
;
162 uint src
= 0, sem_name
, sem_ind
;
164 switch (source
->Register
.File
) {
165 case TGSI_FILE_TEMPORARY
:
166 if (source
->Register
.Index
>= I915_MAX_TEMPORARY
) {
167 i915_program_error(p
, "Exceeded max temporary reg");
170 src
= UREG(REG_TYPE_R
, index
);
172 case TGSI_FILE_INPUT
:
173 /* XXX: Packing COL1, FOGC into a single attribute works for
174 * texenv programs, but will fail for real fragment programs
175 * that use these attributes and expect them to be a full 4
176 * components wide. Could use a texcoord to pass these
177 * attributes if necessary, but that won't work in the general
180 * We also use a texture coordinate to pass wpos when possible.
183 sem_name
= p
->shader
->info
.input_semantic_name
[index
];
184 sem_ind
= p
->shader
->info
.input_semantic_index
[index
];
187 case TGSI_SEMANTIC_POSITION
:
190 int real_tex_unit
= get_mapping(fs
, I915_SEMANTIC_POS
);
191 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_ALL
);
194 case TGSI_SEMANTIC_COLOR
:
196 src
= i915_emit_decl(p
, REG_TYPE_T
, T_DIFFUSE
, D0_CHANNEL_ALL
);
199 /* secondary color */
200 assert(sem_ind
== 1);
201 src
= i915_emit_decl(p
, REG_TYPE_T
, T_SPECULAR
, D0_CHANNEL_XYZ
);
202 src
= swizzle(src
, X
, Y
, Z
, ONE
);
205 case TGSI_SEMANTIC_FOG
:
206 src
= i915_emit_decl(p
, REG_TYPE_T
, T_FOG_W
, D0_CHANNEL_W
);
207 src
= swizzle(src
, W
, W
, W
, W
);
209 case TGSI_SEMANTIC_GENERIC
:
211 int real_tex_unit
= get_mapping(fs
, sem_ind
);
212 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_ALL
);
215 case TGSI_SEMANTIC_FACE
:
217 /* for back/front faces */
218 int real_tex_unit
= get_mapping(fs
, I915_SEMANTIC_FACE
);
219 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_X
);
223 i915_program_error(p
, "Bad source->Index");
228 case TGSI_FILE_IMMEDIATE
:
229 assert(index
< p
->num_immediates
);
230 index
= p
->immediates_map
[index
];
232 case TGSI_FILE_CONSTANT
:
233 src
= UREG(REG_TYPE_CONST
, index
);
237 i915_program_error(p
, "Bad source->File");
242 source
->Register
.SwizzleX
,
243 source
->Register
.SwizzleY
,
244 source
->Register
.SwizzleZ
,
245 source
->Register
.SwizzleW
);
247 /* There's both negate-all-components and per-component negation.
248 * Try to handle both here.
251 int n
= source
->Register
.Negate
;
252 src
= negate(src
, n
, n
, n
, n
);
257 /* XXX assertions disabled to allow arbfplight.c to run */
258 /* XXX enable these assertions, or fix things */
259 assert(!source
->Register
.Absolute
);
266 * Construct a ureg for a destination register.
269 get_result_vector(struct i915_fp_compile
*p
,
270 const struct tgsi_full_dst_register
*dest
)
272 switch (dest
->Register
.File
) {
273 case TGSI_FILE_OUTPUT
:
275 uint sem_name
= p
->shader
->info
.output_semantic_name
[dest
->Register
.Index
];
277 case TGSI_SEMANTIC_POSITION
:
278 return UREG(REG_TYPE_OD
, 0);
279 case TGSI_SEMANTIC_COLOR
:
280 return UREG(REG_TYPE_OC
, 0);
282 i915_program_error(p
, "Bad inst->DstReg.Index/semantics");
286 case TGSI_FILE_TEMPORARY
:
287 return UREG(REG_TYPE_R
, dest
->Register
.Index
);
289 i915_program_error(p
, "Bad inst->DstReg.File");
296 * Compute flags for saturation and writemask.
299 get_result_flags(const struct tgsi_full_instruction
*inst
)
302 = inst
->Dst
[0].Register
.WriteMask
;
305 if (inst
->Instruction
.Saturate
== TGSI_SAT_ZERO_ONE
)
306 flags
|= A0_DEST_SATURATE
;
308 if (writeMask
& TGSI_WRITEMASK_X
)
309 flags
|= A0_DEST_CHANNEL_X
;
310 if (writeMask
& TGSI_WRITEMASK_Y
)
311 flags
|= A0_DEST_CHANNEL_Y
;
312 if (writeMask
& TGSI_WRITEMASK_Z
)
313 flags
|= A0_DEST_CHANNEL_Z
;
314 if (writeMask
& TGSI_WRITEMASK_W
)
315 flags
|= A0_DEST_CHANNEL_W
;
322 * Convert TGSI_TEXTURE_x token to DO_SAMPLE_TYPE_x token
325 translate_tex_src_target(struct i915_fp_compile
*p
, uint tex
)
328 case TGSI_TEXTURE_SHADOW1D
:
330 case TGSI_TEXTURE_1D
:
331 return D0_SAMPLE_TYPE_2D
;
333 case TGSI_TEXTURE_SHADOW2D
:
335 case TGSI_TEXTURE_2D
:
336 return D0_SAMPLE_TYPE_2D
;
338 case TGSI_TEXTURE_SHADOWRECT
:
340 case TGSI_TEXTURE_RECT
:
341 return D0_SAMPLE_TYPE_2D
;
343 case TGSI_TEXTURE_3D
:
344 return D0_SAMPLE_TYPE_VOLUME
;
346 case TGSI_TEXTURE_CUBE
:
347 return D0_SAMPLE_TYPE_CUBE
;
350 i915_program_error(p
, "TexSrc type");
357 * Generate texel lookup instruction.
360 emit_tex(struct i915_fp_compile
*p
,
361 const struct tgsi_full_instruction
*inst
,
363 struct i915_fragment_shader
* fs
)
365 uint texture
= inst
->Texture
.Texture
;
366 uint unit
= inst
->Src
[1].Register
.Index
;
367 uint tex
= translate_tex_src_target( p
, texture
);
368 uint sampler
= i915_emit_decl(p
, REG_TYPE_S
, unit
, tex
);
369 uint coord
= src_vector( p
, &inst
->Src
[0], fs
);
372 get_result_vector( p
, &inst
->Dst
[0] ),
373 get_result_flags( inst
),
381 * Generate a simple arithmetic instruction
382 * \param opcode the i915 opcode
383 * \param numArgs the number of input/src arguments
386 emit_simple_arith(struct i915_fp_compile
*p
,
387 const struct tgsi_full_instruction
*inst
,
388 uint opcode
, uint numArgs
,
389 struct i915_fragment_shader
* fs
)
391 uint arg1
, arg2
, arg3
;
393 assert(numArgs
<= 3);
395 arg1
= (numArgs
< 1) ? 0 : src_vector( p
, &inst
->Src
[0], fs
);
396 arg2
= (numArgs
< 2) ? 0 : src_vector( p
, &inst
->Src
[1], fs
);
397 arg3
= (numArgs
< 3) ? 0 : src_vector( p
, &inst
->Src
[2], fs
);
401 get_result_vector( p
, &inst
->Dst
[0]),
402 get_result_flags( inst
), 0,
409 /** As above, but swap the first two src regs */
411 emit_simple_arith_swap2(struct i915_fp_compile
*p
,
412 const struct tgsi_full_instruction
*inst
,
413 uint opcode
, uint numArgs
,
414 struct i915_fragment_shader
* fs
)
416 struct tgsi_full_instruction inst2
;
418 assert(numArgs
== 2);
420 /* transpose first two registers */
422 inst2
.Src
[0] = inst
->Src
[1];
423 inst2
.Src
[1] = inst
->Src
[0];
425 emit_simple_arith(p
, &inst2
, opcode
, numArgs
, fs
);
430 #define M_PI 3.14159265358979323846
434 * Translate TGSI instruction to i915 instruction.
438 * SIN, COS -- could use another taylor step?
439 * LIT -- results seem a little different to sw mesa
440 * LOG -- different to mesa on negative numbers, but this is conformant.
443 i915_translate_instruction(struct i915_fp_compile
*p
,
444 const struct tgsi_full_instruction
*inst
,
445 struct i915_fragment_shader
*fs
)
448 uint src0
, src1
, src2
, flags
;
451 switch (inst
->Instruction
.Opcode
) {
452 case TGSI_OPCODE_ABS
:
453 src0
= src_vector(p
, &inst
->Src
[0], fs
);
456 get_result_vector(p
, &inst
->Dst
[0]),
457 get_result_flags(inst
), 0,
458 src0
, negate(src0
, 1, 1, 1, 1), 0);
461 case TGSI_OPCODE_ADD
:
462 emit_simple_arith(p
, inst
, A0_ADD
, 2, fs
);
465 case TGSI_OPCODE_CMP
:
466 src0
= src_vector(p
, &inst
->Src
[0], fs
);
467 src1
= src_vector(p
, &inst
->Src
[1], fs
);
468 src2
= src_vector(p
, &inst
->Src
[2], fs
);
469 i915_emit_arith(p
, A0_CMP
,
470 get_result_vector(p
, &inst
->Dst
[0]),
471 get_result_flags(inst
),
472 0, src0
, src2
, src1
); /* NOTE: order of src2, src1 */
475 case TGSI_OPCODE_COS
:
476 src0
= src_vector(p
, &inst
->Src
[0], fs
);
477 tmp
= i915_get_utemp(p
);
481 tmp
, A0_DEST_CHANNEL_X
, 0,
482 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
484 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
486 /* By choosing different taylor constants, could get rid of this mul:
490 tmp
, A0_DEST_CHANNEL_X
, 0,
491 tmp
, i915_emit_const1f(p
, (float) (M_PI
* 2.0)), 0);
494 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
495 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
496 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
497 * result = DP4 t0, cos_constants
501 tmp
, A0_DEST_CHANNEL_XY
, 0,
502 swizzle(tmp
, X
, X
, ONE
, ONE
),
503 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
507 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
508 swizzle(tmp
, X
, Y
, X
, ONE
),
509 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
513 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
514 swizzle(tmp
, X
, X
, Z
, ONE
),
515 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
519 get_result_vector(p
, &inst
->Dst
[0]),
520 get_result_flags(inst
), 0,
521 swizzle(tmp
, ONE
, Z
, Y
, X
),
522 i915_emit_const4fv(p
, cos_constants
), 0);
525 case TGSI_OPCODE_DDX
:
526 case TGSI_OPCODE_DDY
:
527 /* XXX We just output 0 here */
528 debug_printf("Punting DDX/DDX\n");
529 src0
= get_result_vector(p
, &inst
->Dst
[0]);
532 get_result_vector(p
, &inst
->Dst
[0]),
533 get_result_flags(inst
), 0,
534 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
), 0, 0);
537 case TGSI_OPCODE_DP2
:
538 src0
= src_vector(p
, &inst
->Src
[0], fs
);
539 src1
= src_vector(p
, &inst
->Src
[1], fs
);
543 get_result_vector(p
, &inst
->Dst
[0]),
544 get_result_flags(inst
), 0,
545 swizzle(src0
, X
, Y
, ZERO
, ZERO
), src1
, 0);
548 case TGSI_OPCODE_DP3
:
549 emit_simple_arith(p
, inst
, A0_DP3
, 2, fs
);
552 case TGSI_OPCODE_DP4
:
553 emit_simple_arith(p
, inst
, A0_DP4
, 2, fs
);
556 case TGSI_OPCODE_DPH
:
557 src0
= src_vector(p
, &inst
->Src
[0], fs
);
558 src1
= src_vector(p
, &inst
->Src
[1], fs
);
562 get_result_vector(p
, &inst
->Dst
[0]),
563 get_result_flags(inst
), 0,
564 swizzle(src0
, X
, Y
, Z
, ONE
), src1
, 0);
567 case TGSI_OPCODE_DST
:
568 src0
= src_vector(p
, &inst
->Src
[0], fs
);
569 src1
= src_vector(p
, &inst
->Src
[1], fs
);
571 /* result[0] = 1 * 1;
572 * result[1] = a[1] * b[1];
573 * result[2] = a[2] * 1;
574 * result[3] = 1 * b[3];
578 get_result_vector(p
, &inst
->Dst
[0]),
579 get_result_flags(inst
), 0,
580 swizzle(src0
, ONE
, Y
, Z
, ONE
),
581 swizzle(src1
, ONE
, Y
, ONE
, W
), 0);
584 case TGSI_OPCODE_END
:
588 case TGSI_OPCODE_EX2
:
589 src0
= src_vector(p
, &inst
->Src
[0], fs
);
593 get_result_vector(p
, &inst
->Dst
[0]),
594 get_result_flags(inst
), 0,
595 swizzle(src0
, X
, X
, X
, X
), 0, 0);
598 case TGSI_OPCODE_FLR
:
599 emit_simple_arith(p
, inst
, A0_FLR
, 1, fs
);
602 case TGSI_OPCODE_FRC
:
603 emit_simple_arith(p
, inst
, A0_FRC
, 1, fs
);
606 case TGSI_OPCODE_KIL
:
607 /* kill if src[0].x < 0 || src[0].y < 0 ... */
608 src0
= src_vector(p
, &inst
->Src
[0], fs
);
609 tmp
= i915_get_utemp(p
);
612 tmp
, /* dest reg: a dummy reg */
613 A0_DEST_CHANNEL_ALL
, /* dest writemask */
616 T0_TEXKILL
); /* opcode */
619 case TGSI_OPCODE_KILP
:
620 assert(0); /* not tested yet */
623 case TGSI_OPCODE_LG2
:
624 src0
= src_vector(p
, &inst
->Src
[0], fs
);
628 get_result_vector(p
, &inst
->Dst
[0]),
629 get_result_flags(inst
), 0,
630 swizzle(src0
, X
, X
, X
, X
), 0, 0);
633 case TGSI_OPCODE_LIT
:
634 src0
= src_vector(p
, &inst
->Src
[0], fs
);
635 tmp
= i915_get_utemp(p
);
637 /* tmp = max( a.xyzw, a.00zw )
638 * XXX: Clamp tmp.w to -128..128
640 * tmp.y = tmp.w * tmp.y
642 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
644 i915_emit_arith(p
, A0_MAX
, tmp
, A0_DEST_CHANNEL_ALL
, 0,
645 src0
, swizzle(src0
, ZERO
, ZERO
, Z
, W
), 0);
647 i915_emit_arith(p
, A0_LOG
, tmp
, A0_DEST_CHANNEL_Y
, 0,
648 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
650 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_Y
, 0,
651 swizzle(tmp
, ZERO
, Y
, ZERO
, ZERO
),
652 swizzle(tmp
, ZERO
, W
, ZERO
, ZERO
), 0);
654 i915_emit_arith(p
, A0_EXP
, tmp
, A0_DEST_CHANNEL_Y
, 0,
655 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
657 i915_emit_arith(p
, A0_CMP
,
658 get_result_vector(p
, &inst
->Dst
[0]),
659 get_result_flags(inst
), 0,
660 negate(swizzle(tmp
, ONE
, ONE
, X
, ONE
), 0, 0, 1, 0),
661 swizzle(tmp
, ONE
, X
, ZERO
, ONE
),
662 swizzle(tmp
, ONE
, X
, Y
, ONE
));
666 case TGSI_OPCODE_LRP
:
667 src0
= src_vector(p
, &inst
->Src
[0], fs
);
668 src1
= src_vector(p
, &inst
->Src
[1], fs
);
669 src2
= src_vector(p
, &inst
->Src
[2], fs
);
670 flags
= get_result_flags(inst
);
671 tmp
= i915_get_utemp(p
);
678 * result = (-c)*a + tmp
680 i915_emit_arith(p
, A0_MAD
, tmp
,
681 flags
& A0_DEST_CHANNEL_ALL
, 0, src1
, src0
, src2
);
683 i915_emit_arith(p
, A0_MAD
,
684 get_result_vector(p
, &inst
->Dst
[0]),
685 flags
, 0, negate(src2
, 1, 1, 1, 1), src0
, tmp
);
688 case TGSI_OPCODE_MAD
:
689 emit_simple_arith(p
, inst
, A0_MAD
, 3, fs
);
692 case TGSI_OPCODE_MAX
:
693 emit_simple_arith(p
, inst
, A0_MAX
, 2, fs
);
696 case TGSI_OPCODE_MIN
:
697 src0
= src_vector(p
, &inst
->Src
[0], fs
);
698 src1
= src_vector(p
, &inst
->Src
[1], fs
);
699 tmp
= i915_get_utemp(p
);
700 flags
= get_result_flags(inst
);
704 tmp
, flags
& A0_DEST_CHANNEL_ALL
, 0,
705 negate(src0
, 1, 1, 1, 1),
706 negate(src1
, 1, 1, 1, 1), 0);
710 get_result_vector(p
, &inst
->Dst
[0]),
711 flags
, 0, negate(tmp
, 1, 1, 1, 1), 0, 0);
714 case TGSI_OPCODE_MOV
:
715 emit_simple_arith(p
, inst
, A0_MOV
, 1, fs
);
718 case TGSI_OPCODE_MUL
:
719 emit_simple_arith(p
, inst
, A0_MUL
, 2, fs
);
722 case TGSI_OPCODE_POW
:
723 src0
= src_vector(p
, &inst
->Src
[0], fs
);
724 src1
= src_vector(p
, &inst
->Src
[1], fs
);
725 tmp
= i915_get_utemp(p
);
726 flags
= get_result_flags(inst
);
728 /* XXX: masking on intermediate values, here and elsewhere.
732 tmp
, A0_DEST_CHANNEL_X
, 0,
733 swizzle(src0
, X
, X
, X
, X
), 0, 0);
735 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, src1
, 0);
739 get_result_vector(p
, &inst
->Dst
[0]),
740 flags
, 0, swizzle(tmp
, X
, X
, X
, X
), 0, 0);
743 case TGSI_OPCODE_RET
:
747 case TGSI_OPCODE_RCP
:
748 src0
= src_vector(p
, &inst
->Src
[0], fs
);
752 get_result_vector(p
, &inst
->Dst
[0]),
753 get_result_flags(inst
), 0,
754 swizzle(src0
, X
, X
, X
, X
), 0, 0);
757 case TGSI_OPCODE_RSQ
:
758 src0
= src_vector(p
, &inst
->Src
[0], fs
);
762 get_result_vector(p
, &inst
->Dst
[0]),
763 get_result_flags(inst
), 0,
764 swizzle(src0
, X
, X
, X
, X
), 0, 0);
767 case TGSI_OPCODE_SCS
:
768 src0
= src_vector(p
, &inst
->Src
[0], fs
);
769 tmp
= i915_get_utemp(p
);
772 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
773 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
774 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
775 * scs.x = DP4 t1, sin_constants
776 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
777 * scs.y = DP4 t1, cos_constants
781 tmp
, A0_DEST_CHANNEL_XY
, 0,
782 swizzle(src0
, X
, X
, ONE
, ONE
),
783 swizzle(src0
, X
, ONE
, ONE
, ONE
), 0);
787 tmp
, A0_DEST_CHANNEL_ALL
, 0,
788 swizzle(tmp
, X
, Y
, X
, Y
),
789 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
791 writemask
= inst
->Dst
[0].Register
.WriteMask
;
793 if (writemask
& TGSI_WRITEMASK_Y
) {
796 if (writemask
& TGSI_WRITEMASK_X
)
797 tmp1
= i915_get_utemp(p
);
803 tmp1
, A0_DEST_CHANNEL_ALL
, 0,
804 swizzle(tmp
, X
, Y
, Y
, W
),
805 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
809 get_result_vector(p
, &inst
->Dst
[0]),
810 A0_DEST_CHANNEL_Y
, 0,
811 swizzle(tmp1
, W
, Z
, Y
, X
),
812 i915_emit_const4fv(p
, sin_constants
), 0);
815 if (writemask
& TGSI_WRITEMASK_X
) {
818 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
819 swizzle(tmp
, X
, X
, Z
, ONE
),
820 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
824 get_result_vector(p
, &inst
->Dst
[0]),
825 A0_DEST_CHANNEL_X
, 0,
826 swizzle(tmp
, ONE
, Z
, Y
, X
),
827 i915_emit_const4fv(p
, cos_constants
), 0);
831 case TGSI_OPCODE_SEQ
:
832 /* if we're both >= and <= then we're == */
833 src0
= src_vector(p
, &inst
->Src
[0], fs
);
834 src1
= src_vector(p
, &inst
->Src
[1], fs
);
835 tmp
= i915_get_utemp(p
);
839 tmp
, A0_DEST_CHANNEL_ALL
, 0,
845 get_result_vector(p
, &inst
->Dst
[0]),
846 A0_DEST_CHANNEL_ALL
, 0,
852 get_result_vector(p
, &inst
->Dst
[0]),
853 A0_DEST_CHANNEL_ALL
, 0,
854 get_result_vector(p
, &inst
->Dst
[0]),
859 case TGSI_OPCODE_SGE
:
860 emit_simple_arith(p
, inst
, A0_SGE
, 2, fs
);
863 case TGSI_OPCODE_SIN
:
864 src0
= src_vector(p
, &inst
->Src
[0], fs
);
865 tmp
= i915_get_utemp(p
);
869 tmp
, A0_DEST_CHANNEL_X
, 0,
870 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
872 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
874 /* By choosing different taylor constants, could get rid of this mul:
878 tmp
, A0_DEST_CHANNEL_X
, 0,
879 tmp
, i915_emit_const1f(p
, (float) (M_PI
* 2.0)), 0);
882 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
883 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
884 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
885 * result = DP4 t1.wzyx, sin_constants
889 tmp
, A0_DEST_CHANNEL_XY
, 0,
890 swizzle(tmp
, X
, X
, ONE
, ONE
),
891 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
895 tmp
, A0_DEST_CHANNEL_ALL
, 0,
896 swizzle(tmp
, X
, Y
, X
, Y
),
897 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
901 tmp
, A0_DEST_CHANNEL_ALL
, 0,
902 swizzle(tmp
, X
, Y
, Y
, W
),
903 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
907 get_result_vector(p
, &inst
->Dst
[0]),
908 get_result_flags(inst
), 0,
909 swizzle(tmp
, W
, Z
, Y
, X
),
910 i915_emit_const4fv(p
, sin_constants
), 0);
913 case TGSI_OPCODE_SLE
:
914 /* like SGE, but swap reg0, reg1 */
915 emit_simple_arith_swap2(p
, inst
, A0_SGE
, 2, fs
);
918 case TGSI_OPCODE_SLT
:
919 emit_simple_arith(p
, inst
, A0_SLT
, 2, fs
);
922 case TGSI_OPCODE_SGT
:
923 /* like SLT, but swap reg0, reg1 */
924 emit_simple_arith_swap2(p
, inst
, A0_SLT
, 2, fs
);
927 case TGSI_OPCODE_SNE
:
928 /* if we're < or > then we're != */
929 src0
= src_vector(p
, &inst
->Src
[0], fs
);
930 src1
= src_vector(p
, &inst
->Src
[1], fs
);
931 tmp
= i915_get_utemp(p
);
936 A0_DEST_CHANNEL_ALL
, 0,
942 get_result_vector(p
, &inst
->Dst
[0]),
943 A0_DEST_CHANNEL_ALL
, 0,
949 get_result_vector(p
, &inst
->Dst
[0]),
950 A0_DEST_CHANNEL_ALL
, 0,
951 get_result_vector(p
, &inst
->Dst
[0]),
955 case TGSI_OPCODE_SSG
:
956 /* compute (src>0) - (src<0) */
957 src0
= src_vector(p
, &inst
->Src
[0], fs
);
958 tmp
= i915_get_utemp(p
);
963 A0_DEST_CHANNEL_ALL
, 0,
965 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
), 0);
969 get_result_vector(p
, &inst
->Dst
[0]),
970 A0_DEST_CHANNEL_ALL
, 0,
971 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
),
976 get_result_vector(p
, &inst
->Dst
[0]),
977 A0_DEST_CHANNEL_ALL
, 0,
978 get_result_vector(p
, &inst
->Dst
[0]),
979 negate(tmp
, 1, 1, 1, 1), 0);
982 case TGSI_OPCODE_SUB
:
983 src0
= src_vector(p
, &inst
->Src
[0], fs
);
984 src1
= src_vector(p
, &inst
->Src
[1], fs
);
988 get_result_vector(p
, &inst
->Dst
[0]),
989 get_result_flags(inst
), 0,
990 src0
, negate(src1
, 1, 1, 1, 1), 0);
993 case TGSI_OPCODE_TEX
:
994 emit_tex(p
, inst
, T0_TEXLD
, fs
);
997 case TGSI_OPCODE_TRUNC
:
998 emit_simple_arith(p
, inst
, A0_TRC
, 1, fs
);
1001 case TGSI_OPCODE_TXB
:
1002 emit_tex(p
, inst
, T0_TEXLDB
, fs
);
1005 case TGSI_OPCODE_TXP
:
1006 emit_tex(p
, inst
, T0_TEXLDP
, fs
);
1009 case TGSI_OPCODE_XPD
:
1011 * result.x = src0.y * src1.z - src0.z * src1.y;
1012 * result.y = src0.z * src1.x - src0.x * src1.z;
1013 * result.z = src0.x * src1.y - src0.y * src1.x;
1016 src0
= src_vector(p
, &inst
->Src
[0], fs
);
1017 src1
= src_vector(p
, &inst
->Src
[1], fs
);
1018 tmp
= i915_get_utemp(p
);
1022 tmp
, A0_DEST_CHANNEL_ALL
, 0,
1023 swizzle(src0
, Z
, X
, Y
, ONE
),
1024 swizzle(src1
, Y
, Z
, X
, ONE
), 0);
1028 get_result_vector(p
, &inst
->Dst
[0]),
1029 get_result_flags(inst
), 0,
1030 swizzle(src0
, Y
, Z
, X
, ONE
),
1031 swizzle(src1
, Z
, X
, Y
, ONE
),
1032 negate(tmp
, 1, 1, 1, 0));
1036 i915_program_error(p
, "bad opcode %d", inst
->Instruction
.Opcode
);
1041 i915_release_utemps(p
);
1046 * Translate TGSI fragment shader into i915 hardware instructions.
1047 * \param p the translation state
1048 * \param tokens the TGSI token array
1051 i915_translate_instructions(struct i915_fp_compile
*p
,
1052 const struct tgsi_token
*tokens
,
1053 struct i915_fragment_shader
*fs
)
1055 struct i915_fragment_shader
*ifs
= p
->shader
;
1056 struct tgsi_parse_context parse
;
1058 tgsi_parse_init( &parse
, tokens
);
1060 while( !tgsi_parse_end_of_tokens( &parse
) ) {
1062 tgsi_parse_token( &parse
);
1064 switch( parse
.FullToken
.Token
.Type
) {
1065 case TGSI_TOKEN_TYPE_PROPERTY
:
1067 * We only support one cbuf, but we still need to ignore the property
1068 * correctly so we don't hit the assert at the end of the switch case.
1070 assert(parse
.FullToken
.FullProperty
.Property
.PropertyName
==
1071 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
);
1073 case TGSI_TOKEN_TYPE_DECLARATION
:
1074 if (parse
.FullToken
.FullDeclaration
.Declaration
.File
1075 == TGSI_FILE_CONSTANT
) {
1077 for (i
= parse
.FullToken
.FullDeclaration
.Range
.First
;
1078 i
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
1080 assert(ifs
->constant_flags
[i
] == 0x0);
1081 ifs
->constant_flags
[i
] = I915_CONSTFLAG_USER
;
1082 ifs
->num_constants
= MAX2(ifs
->num_constants
, i
+ 1);
1085 else if (parse
.FullToken
.FullDeclaration
.Declaration
.File
1086 == TGSI_FILE_TEMPORARY
) {
1088 for (i
= parse
.FullToken
.FullDeclaration
.Range
.First
;
1089 i
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
1091 assert(i
< I915_MAX_TEMPORARY
);
1092 /* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
1093 p
->temp_flag
|= (1 << i
); /* mark temp as used */
1098 case TGSI_TOKEN_TYPE_IMMEDIATE
:
1100 const struct tgsi_full_immediate
*imm
1101 = &parse
.FullToken
.FullImmediate
;
1102 const uint pos
= p
->num_immediates
++;
1104 assert( imm
->Immediate
.NrTokens
<= 4 + 1 );
1105 for (j
= 0; j
< imm
->Immediate
.NrTokens
- 1; j
++) {
1106 p
->immediates
[pos
][j
] = imm
->u
[j
].Float
;
1111 case TGSI_TOKEN_TYPE_INSTRUCTION
:
1112 if (p
->first_instruction
) {
1113 /* resolve location of immediates */
1115 for (i
= 0; i
< p
->num_immediates
; i
++) {
1116 /* find constant slot for this immediate */
1117 for (j
= 0; j
< I915_MAX_CONSTANT
; j
++) {
1118 if (ifs
->constant_flags
[j
] == 0x0) {
1119 memcpy(ifs
->constants
[j
],
1122 /*printf("immediate %d maps to const %d\n", i, j);*/
1123 ifs
->constant_flags
[j
] = 0xf; /* all four comps used */
1124 p
->immediates_map
[i
] = j
;
1125 ifs
->num_constants
= MAX2(ifs
->num_constants
, j
+ 1);
1131 p
->first_instruction
= FALSE
;
1134 i915_translate_instruction(p
, &parse
.FullToken
.FullInstruction
, fs
);
1143 tgsi_parse_free (&parse
);
1147 static struct i915_fp_compile
*
1148 i915_init_compile(struct i915_context
*i915
,
1149 struct i915_fragment_shader
*ifs
)
1151 struct i915_fp_compile
*p
= CALLOC_STRUCT(i915_fp_compile
);
1156 /* Put new constants at end of const buffer, growing downward.
1157 * The problem is we don't know how many user-defined constants might
1158 * be specified with pipe->set_constant_buffer().
1159 * Should pre-scan the user's program to determine the highest-numbered
1160 * constant referenced.
1162 ifs
->num_constants
= 0;
1163 memset(ifs
->constant_flags
, 0, sizeof(ifs
->constant_flags
));
1165 for (i
= 0; i
< I915_TEX_UNITS
; i
++)
1166 ifs
->generic_mapping
[i
] = -1;
1168 p
->first_instruction
= TRUE
;
1170 p
->nr_tex_indirect
= 1; /* correct? */
1173 p
->nr_decl_insn
= 0;
1175 p
->csr
= p
->program
;
1176 p
->decl
= p
->declarations
;
1179 p
->temp_flag
= ~0x0 << I915_MAX_TEMPORARY
;
1180 p
->utemp_flag
= ~0x7;
1182 /* initialize the first program word */
1183 *(p
->decl
++) = _3DSTATE_PIXEL_SHADER_PROGRAM
;
1189 /* Copy compile results to the fragment program struct and destroy the
1190 * compilation context.
1193 i915_fini_compile(struct i915_context
*i915
, struct i915_fp_compile
*p
)
1195 struct i915_fragment_shader
*ifs
= p
->shader
;
1196 unsigned long program_size
= (unsigned long) (p
->csr
- p
->program
);
1197 unsigned long decl_size
= (unsigned long) (p
->decl
- p
->declarations
);
1199 if (p
->nr_tex_indirect
> I915_MAX_TEX_INDIRECT
)
1200 i915_program_error(p
, "Exceeded max nr indirect texture lookups");
1202 if (p
->nr_tex_insn
> I915_MAX_TEX_INSN
)
1203 i915_program_error(p
, "Exceeded max TEX instructions");
1205 if (p
->nr_alu_insn
> I915_MAX_ALU_INSN
)
1206 i915_program_error(p
, "Exceeded max ALU instructions");
1208 if (p
->nr_decl_insn
> I915_MAX_DECL_INSN
)
1209 i915_program_error(p
, "Exceeded max DECL instructions");
1212 p
->NumNativeInstructions
= 0;
1213 p
->NumNativeAluInstructions
= 0;
1214 p
->NumNativeTexInstructions
= 0;
1215 p
->NumNativeTexIndirections
= 0;
1217 i915_use_passthrough_shader(ifs
);
1220 p
->NumNativeInstructions
1221 = p
->nr_alu_insn
+ p
->nr_tex_insn
+ p
->nr_decl_insn
;
1222 p
->NumNativeAluInstructions
= p
->nr_alu_insn
;
1223 p
->NumNativeTexInstructions
= p
->nr_tex_insn
;
1224 p
->NumNativeTexIndirections
= p
->nr_tex_indirect
;
1226 /* patch in the program length */
1227 p
->declarations
[0] |= program_size
+ decl_size
- 2;
1229 /* Copy compilation results to fragment program struct:
1231 assert(!ifs
->program
);
1233 = (uint
*) MALLOC((program_size
+ decl_size
) * sizeof(uint
));
1235 ifs
->program_len
= program_size
+ decl_size
;
1237 memcpy(ifs
->program
,
1239 decl_size
* sizeof(uint
));
1241 memcpy(ifs
->program
+ decl_size
,
1243 program_size
* sizeof(uint
));
1247 /* Release the compilation struct:
1257 * Rather than trying to intercept and jiggle depth writes during
1258 * emit, just move the value into its correct position at the end of
1262 i915_fixup_depth_write(struct i915_fp_compile
*p
)
1264 /* XXX assuming pos/depth is always in output[0] */
1265 if (p
->shader
->info
.output_semantic_name
[0] == TGSI_SEMANTIC_POSITION
) {
1266 const uint depth
= UREG(REG_TYPE_OD
, 0);
1269 A0_MOV
, /* opcode */
1270 depth
, /* dest reg */
1271 A0_DEST_CHANNEL_W
, /* write mask */
1273 swizzle(depth
, X
, Y
, Z
, Z
), /* src0 */
1274 0, 0 /* src1, src2 */);
1280 i915_translate_fragment_program( struct i915_context
*i915
,
1281 struct i915_fragment_shader
*fs
)
1283 struct i915_fp_compile
*p
;
1284 const struct tgsi_token
*tokens
= fs
->state
.tokens
;
1287 tgsi_dump(tokens
, 0);
1290 /* hw doesn't seem to like empty frag programs, even when the depth write
1291 * fixup gets emitted below - may that one is fishy, too? */
1292 if (fs
->info
.num_instructions
== 1) {
1293 i915_use_passthrough_shader(fs
);
1298 p
= i915_init_compile(i915
, fs
);
1300 i915_translate_instructions(p
, tokens
, fs
);
1301 i915_fixup_depth_write(p
);
1303 i915_fini_compile(i915
, p
);