1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
32 #include "i915_context.h"
35 #include "pipe/p_shader_tokens.h"
36 #include "util/u_math.h"
37 #include "util/u_memory.h"
38 #include "util/u_string.h"
39 #include "tgsi/tgsi_parse.h"
40 #include "tgsi/tgsi_dump.h"
42 #include "draw/draw_vertex.h"
46 * Simple pass-through fragment shader to use when we don't have
47 * a real shader (or it fails to compile for some reason).
49 static unsigned passthrough
[] =
51 _3DSTATE_PIXEL_SHADER_PROGRAM
| ((2*3)-1),
53 /* declare input color:
56 (REG_TYPE_T
<< D0_TYPE_SHIFT
) |
57 (T_DIFFUSE
<< D0_NR_SHIFT
) |
62 /* move to output color:
65 (REG_TYPE_OC
<< A0_DEST_TYPE_SHIFT
) |
67 (REG_TYPE_T
<< A0_SRC0_TYPE_SHIFT
) |
68 (T_DIFFUSE
<< A0_SRC0_NR_SHIFT
)),
69 0x01230000, /* .xyzw */
74 /* 1, -1/3!, 1/5!, -1/7! */
75 static const float sin_constants
[4] = { 1.0,
77 1.0f
/ (5 * 4 * 3 * 2 * 1),
78 -1.0f
/ (7 * 6 * 5 * 4 * 3 * 2 * 1)
81 /* 1, -1/2!, 1/4!, -1/6! */
82 static const float cos_constants
[4] = { 1.0,
84 1.0f
/ (4 * 3 * 2 * 1),
85 -1.0f
/ (6 * 5 * 4 * 3 * 2 * 1)
91 * component-wise negation of ureg
94 negate(int reg
, int x
, int y
, int z
, int w
)
96 /* Another neat thing about the UREG representation */
97 return reg
^ (((x
& 1) << UREG_CHANNEL_X_NEGATE_SHIFT
) |
98 ((y
& 1) << UREG_CHANNEL_Y_NEGATE_SHIFT
) |
99 ((z
& 1) << UREG_CHANNEL_Z_NEGATE_SHIFT
) |
100 ((w
& 1) << UREG_CHANNEL_W_NEGATE_SHIFT
));
105 * In the event of a translation failure, we'll generate a simple color
106 * pass-through program.
109 i915_use_passthrough_shader(struct i915_fragment_shader
*fs
)
111 fs
->program
= (uint
*) MALLOC(sizeof(passthrough
));
113 memcpy(fs
->program
, passthrough
, sizeof(passthrough
));
114 fs
->program_len
= Elements(passthrough
);
116 fs
->num_constants
= 0;
121 i915_program_error(struct i915_fp_compile
*p
, const char *msg
, ...)
126 debug_printf("i915_program_error: ");
127 va_start( args
, msg
);
128 util_vsnprintf( buffer
, sizeof(buffer
), msg
, args
);
130 debug_printf("%s", buffer
);
136 static uint
get_mapping(struct i915_fragment_shader
* fs
, int unit
)
139 for (i
= 0; i
< I915_TEX_UNITS
; i
++)
141 if (fs
->generic_mapping
[i
] == -1) {
142 fs
->generic_mapping
[i
] = unit
;
145 if (fs
->generic_mapping
[i
] == unit
)
148 debug_printf("Exceeded max generics\n");
153 * Construct a ureg for the given source register. Will emit
154 * constants, apply swizzling and negation as needed.
157 src_vector(struct i915_fp_compile
*p
,
158 const struct tgsi_full_src_register
*source
,
159 struct i915_fragment_shader
* fs
)
161 uint index
= source
->Register
.Index
;
162 uint src
= 0, sem_name
, sem_ind
;
164 switch (source
->Register
.File
) {
165 case TGSI_FILE_TEMPORARY
:
166 if (source
->Register
.Index
>= I915_MAX_TEMPORARY
) {
167 i915_program_error(p
, "Exceeded max temporary reg");
170 src
= UREG(REG_TYPE_R
, index
);
172 case TGSI_FILE_INPUT
:
173 /* XXX: Packing COL1, FOGC into a single attribute works for
174 * texenv programs, but will fail for real fragment programs
175 * that use these attributes and expect them to be a full 4
176 * components wide. Could use a texcoord to pass these
177 * attributes if necessary, but that won't work in the general
180 * We also use a texture coordinate to pass wpos when possible.
183 sem_name
= p
->shader
->info
.input_semantic_name
[index
];
184 sem_ind
= p
->shader
->info
.input_semantic_index
[index
];
187 case TGSI_SEMANTIC_POSITION
:
190 int real_tex_unit
= get_mapping(fs
, I915_SEMANTIC_POS
);
191 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_ALL
);
194 case TGSI_SEMANTIC_COLOR
:
196 src
= i915_emit_decl(p
, REG_TYPE_T
, T_DIFFUSE
, D0_CHANNEL_ALL
);
199 /* secondary color */
200 assert(sem_ind
== 1);
201 src
= i915_emit_decl(p
, REG_TYPE_T
, T_SPECULAR
, D0_CHANNEL_XYZ
);
202 src
= swizzle(src
, X
, Y
, Z
, ONE
);
205 case TGSI_SEMANTIC_FOG
:
206 src
= i915_emit_decl(p
, REG_TYPE_T
, T_FOG_W
, D0_CHANNEL_W
);
207 src
= swizzle(src
, W
, W
, W
, W
);
209 case TGSI_SEMANTIC_GENERIC
:
211 int real_tex_unit
= get_mapping(fs
, sem_ind
);
212 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_ALL
);
215 case TGSI_SEMANTIC_FACE
:
217 /* for back/front faces */
218 /* XXX also emit something from 0,1 to -1,1 */
219 int real_tex_unit
= get_mapping(fs
, I915_SEMANTIC_FACE
);
220 printf("semantic face fpc at %d\n",real_tex_unit
);
221 src
= i915_emit_decl(p
, REG_TYPE_T
, T_TEX0
+ real_tex_unit
, D0_CHANNEL_X
);
225 i915_program_error(p
, "Bad source->Index");
230 case TGSI_FILE_IMMEDIATE
:
231 assert(index
< p
->num_immediates
);
232 index
= p
->immediates_map
[index
];
234 case TGSI_FILE_CONSTANT
:
235 src
= UREG(REG_TYPE_CONST
, index
);
239 i915_program_error(p
, "Bad source->File");
244 source
->Register
.SwizzleX
,
245 source
->Register
.SwizzleY
,
246 source
->Register
.SwizzleZ
,
247 source
->Register
.SwizzleW
);
250 /* There's both negate-all-components and per-component negation.
251 * Try to handle both here.
254 int n
= source
->Register
.Negate
;
255 src
= negate(src
, n
, n
, n
, n
);
260 /* XXX assertions disabled to allow arbfplight.c to run */
261 /* XXX enable these assertions, or fix things */
262 assert(!source
->Register
.Absolute
);
269 * Construct a ureg for a destination register.
272 get_result_vector(struct i915_fp_compile
*p
,
273 const struct tgsi_full_dst_register
*dest
)
275 switch (dest
->Register
.File
) {
276 case TGSI_FILE_OUTPUT
:
278 uint sem_name
= p
->shader
->info
.output_semantic_name
[dest
->Register
.Index
];
280 case TGSI_SEMANTIC_POSITION
:
281 return UREG(REG_TYPE_OD
, 0);
282 case TGSI_SEMANTIC_COLOR
:
283 return UREG(REG_TYPE_OC
, 0);
285 i915_program_error(p
, "Bad inst->DstReg.Index/semantics");
289 case TGSI_FILE_TEMPORARY
:
290 return UREG(REG_TYPE_R
, dest
->Register
.Index
);
292 i915_program_error(p
, "Bad inst->DstReg.File");
299 * Compute flags for saturation and writemask.
302 get_result_flags(const struct tgsi_full_instruction
*inst
)
305 = inst
->Dst
[0].Register
.WriteMask
;
308 if (inst
->Instruction
.Saturate
== TGSI_SAT_ZERO_ONE
)
309 flags
|= A0_DEST_SATURATE
;
311 if (writeMask
& TGSI_WRITEMASK_X
)
312 flags
|= A0_DEST_CHANNEL_X
;
313 if (writeMask
& TGSI_WRITEMASK_Y
)
314 flags
|= A0_DEST_CHANNEL_Y
;
315 if (writeMask
& TGSI_WRITEMASK_Z
)
316 flags
|= A0_DEST_CHANNEL_Z
;
317 if (writeMask
& TGSI_WRITEMASK_W
)
318 flags
|= A0_DEST_CHANNEL_W
;
325 * Convert TGSI_TEXTURE_x token to DO_SAMPLE_TYPE_x token
328 translate_tex_src_target(struct i915_fp_compile
*p
, uint tex
)
331 case TGSI_TEXTURE_SHADOW1D
:
333 case TGSI_TEXTURE_1D
:
334 return D0_SAMPLE_TYPE_2D
;
336 case TGSI_TEXTURE_SHADOW2D
:
338 case TGSI_TEXTURE_2D
:
339 return D0_SAMPLE_TYPE_2D
;
341 case TGSI_TEXTURE_SHADOWRECT
:
343 case TGSI_TEXTURE_RECT
:
344 return D0_SAMPLE_TYPE_2D
;
346 case TGSI_TEXTURE_3D
:
347 return D0_SAMPLE_TYPE_VOLUME
;
349 case TGSI_TEXTURE_CUBE
:
350 return D0_SAMPLE_TYPE_CUBE
;
353 i915_program_error(p
, "TexSrc type");
360 * Generate texel lookup instruction.
363 emit_tex(struct i915_fp_compile
*p
,
364 const struct tgsi_full_instruction
*inst
,
366 struct i915_fragment_shader
* fs
)
368 uint texture
= inst
->Texture
.Texture
;
369 uint unit
= inst
->Src
[1].Register
.Index
;
370 uint tex
= translate_tex_src_target( p
, texture
);
371 uint sampler
= i915_emit_decl(p
, REG_TYPE_S
, unit
, tex
);
372 uint coord
= src_vector( p
, &inst
->Src
[0], fs
);
375 get_result_vector( p
, &inst
->Dst
[0] ),
376 get_result_flags( inst
),
384 * Generate a simple arithmetic instruction
385 * \param opcode the i915 opcode
386 * \param numArgs the number of input/src arguments
389 emit_simple_arith(struct i915_fp_compile
*p
,
390 const struct tgsi_full_instruction
*inst
,
391 uint opcode
, uint numArgs
,
392 struct i915_fragment_shader
* fs
)
394 uint arg1
, arg2
, arg3
;
396 assert(numArgs
<= 3);
398 arg1
= (numArgs
< 1) ? 0 : src_vector( p
, &inst
->Src
[0], fs
);
399 arg2
= (numArgs
< 2) ? 0 : src_vector( p
, &inst
->Src
[1], fs
);
400 arg3
= (numArgs
< 3) ? 0 : src_vector( p
, &inst
->Src
[2], fs
);
404 get_result_vector( p
, &inst
->Dst
[0]),
405 get_result_flags( inst
), 0,
412 /** As above, but swap the first two src regs */
414 emit_simple_arith_swap2(struct i915_fp_compile
*p
,
415 const struct tgsi_full_instruction
*inst
,
416 uint opcode
, uint numArgs
,
417 struct i915_fragment_shader
* fs
)
419 struct tgsi_full_instruction inst2
;
421 assert(numArgs
== 2);
423 /* transpose first two registers */
425 inst2
.Src
[0] = inst
->Src
[1];
426 inst2
.Src
[1] = inst
->Src
[0];
428 emit_simple_arith(p
, &inst2
, opcode
, numArgs
, fs
);
433 #define M_PI 3.14159265358979323846
437 * Translate TGSI instruction to i915 instruction.
441 * SIN, COS -- could use another taylor step?
442 * LIT -- results seem a little different to sw mesa
443 * LOG -- different to mesa on negative numbers, but this is conformant.
446 i915_translate_instruction(struct i915_fp_compile
*p
,
447 const struct tgsi_full_instruction
*inst
,
448 struct i915_fragment_shader
*fs
)
451 uint src0
, src1
, src2
, flags
;
454 switch (inst
->Instruction
.Opcode
) {
455 case TGSI_OPCODE_ABS
:
456 src0
= src_vector(p
, &inst
->Src
[0], fs
);
459 get_result_vector(p
, &inst
->Dst
[0]),
460 get_result_flags(inst
), 0,
461 src0
, negate(src0
, 1, 1, 1, 1), 0);
464 case TGSI_OPCODE_ADD
:
465 emit_simple_arith(p
, inst
, A0_ADD
, 2, fs
);
468 case TGSI_OPCODE_CMP
:
469 src0
= src_vector(p
, &inst
->Src
[0], fs
);
470 src1
= src_vector(p
, &inst
->Src
[1], fs
);
471 src2
= src_vector(p
, &inst
->Src
[2], fs
);
472 i915_emit_arith(p
, A0_CMP
,
473 get_result_vector(p
, &inst
->Dst
[0]),
474 get_result_flags(inst
),
475 0, src0
, src2
, src1
); /* NOTE: order of src2, src1 */
478 case TGSI_OPCODE_COS
:
479 src0
= src_vector(p
, &inst
->Src
[0], fs
);
480 tmp
= i915_get_utemp(p
);
484 tmp
, A0_DEST_CHANNEL_X
, 0,
485 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
487 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
489 /* By choosing different taylor constants, could get rid of this mul:
493 tmp
, A0_DEST_CHANNEL_X
, 0,
494 tmp
, i915_emit_const1f(p
, (float) (M_PI
* 2.0)), 0);
497 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
498 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, 1
499 * t0 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
500 * result = DP4 t0, cos_constants
504 tmp
, A0_DEST_CHANNEL_XY
, 0,
505 swizzle(tmp
, X
, X
, ONE
, ONE
),
506 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
510 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
511 swizzle(tmp
, X
, Y
, X
, ONE
),
512 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
516 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
517 swizzle(tmp
, X
, X
, Z
, ONE
),
518 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
522 get_result_vector(p
, &inst
->Dst
[0]),
523 get_result_flags(inst
), 0,
524 swizzle(tmp
, ONE
, Z
, Y
, X
),
525 i915_emit_const4fv(p
, cos_constants
), 0);
528 case TGSI_OPCODE_DDX
:
529 case TGSI_OPCODE_DDY
:
530 /* XXX We just output 0 here */
531 debug_printf("Punting DDX/DDX\n");
532 src0
= get_result_vector(p
, &inst
->Dst
[0]);
535 get_result_vector(p
, &inst
->Dst
[0]),
536 get_result_flags(inst
), 0,
537 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
), 0, 0);
540 case TGSI_OPCODE_DP2
:
541 src0
= src_vector(p
, &inst
->Src
[0], fs
);
542 src1
= src_vector(p
, &inst
->Src
[1], fs
);
546 get_result_vector(p
, &inst
->Dst
[0]),
547 get_result_flags(inst
), 0,
548 swizzle(src0
, X
, Y
, ZERO
, ZERO
), src1
, 0);
551 case TGSI_OPCODE_DP3
:
552 emit_simple_arith(p
, inst
, A0_DP3
, 2, fs
);
555 case TGSI_OPCODE_DP4
:
556 emit_simple_arith(p
, inst
, A0_DP4
, 2, fs
);
559 case TGSI_OPCODE_DPH
:
560 src0
= src_vector(p
, &inst
->Src
[0], fs
);
561 src1
= src_vector(p
, &inst
->Src
[1], fs
);
565 get_result_vector(p
, &inst
->Dst
[0]),
566 get_result_flags(inst
), 0,
567 swizzle(src0
, X
, Y
, Z
, ONE
), src1
, 0);
570 case TGSI_OPCODE_DST
:
571 src0
= src_vector(p
, &inst
->Src
[0], fs
);
572 src1
= src_vector(p
, &inst
->Src
[1], fs
);
574 /* result[0] = 1 * 1;
575 * result[1] = a[1] * b[1];
576 * result[2] = a[2] * 1;
577 * result[3] = 1 * b[3];
581 get_result_vector(p
, &inst
->Dst
[0]),
582 get_result_flags(inst
), 0,
583 swizzle(src0
, ONE
, Y
, Z
, ONE
),
584 swizzle(src1
, ONE
, Y
, ONE
, W
), 0);
587 case TGSI_OPCODE_END
:
591 case TGSI_OPCODE_EX2
:
592 src0
= src_vector(p
, &inst
->Src
[0], fs
);
596 get_result_vector(p
, &inst
->Dst
[0]),
597 get_result_flags(inst
), 0,
598 swizzle(src0
, X
, X
, X
, X
), 0, 0);
601 case TGSI_OPCODE_FLR
:
602 emit_simple_arith(p
, inst
, A0_FLR
, 1, fs
);
605 case TGSI_OPCODE_FRC
:
606 emit_simple_arith(p
, inst
, A0_FRC
, 1, fs
);
609 case TGSI_OPCODE_KIL
:
610 /* kill if src[0].x < 0 || src[0].y < 0 ... */
611 src0
= src_vector(p
, &inst
->Src
[0], fs
);
612 tmp
= i915_get_utemp(p
);
615 tmp
, /* dest reg: a dummy reg */
616 A0_DEST_CHANNEL_ALL
, /* dest writemask */
619 T0_TEXKILL
); /* opcode */
622 case TGSI_OPCODE_KILP
:
623 assert(0); /* not tested yet */
626 case TGSI_OPCODE_LG2
:
627 src0
= src_vector(p
, &inst
->Src
[0], fs
);
631 get_result_vector(p
, &inst
->Dst
[0]),
632 get_result_flags(inst
), 0,
633 swizzle(src0
, X
, X
, X
, X
), 0, 0);
636 case TGSI_OPCODE_LIT
:
637 src0
= src_vector(p
, &inst
->Src
[0], fs
);
638 tmp
= i915_get_utemp(p
);
640 /* tmp = max( a.xyzw, a.00zw )
641 * XXX: Clamp tmp.w to -128..128
643 * tmp.y = tmp.w * tmp.y
645 * result = cmp (a.11-x1, a.1x01, a.1xy1 )
647 i915_emit_arith(p
, A0_MAX
, tmp
, A0_DEST_CHANNEL_ALL
, 0,
648 src0
, swizzle(src0
, ZERO
, ZERO
, Z
, W
), 0);
650 i915_emit_arith(p
, A0_LOG
, tmp
, A0_DEST_CHANNEL_Y
, 0,
651 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
653 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_Y
, 0,
654 swizzle(tmp
, ZERO
, Y
, ZERO
, ZERO
),
655 swizzle(tmp
, ZERO
, W
, ZERO
, ZERO
), 0);
657 i915_emit_arith(p
, A0_EXP
, tmp
, A0_DEST_CHANNEL_Y
, 0,
658 swizzle(tmp
, Y
, Y
, Y
, Y
), 0, 0);
660 i915_emit_arith(p
, A0_CMP
,
661 get_result_vector(p
, &inst
->Dst
[0]),
662 get_result_flags(inst
), 0,
663 negate(swizzle(tmp
, ONE
, ONE
, X
, ONE
), 0, 0, 1, 0),
664 swizzle(tmp
, ONE
, X
, ZERO
, ONE
),
665 swizzle(tmp
, ONE
, X
, Y
, ONE
));
669 case TGSI_OPCODE_LRP
:
670 src0
= src_vector(p
, &inst
->Src
[0], fs
);
671 src1
= src_vector(p
, &inst
->Src
[1], fs
);
672 src2
= src_vector(p
, &inst
->Src
[2], fs
);
673 flags
= get_result_flags(inst
);
674 tmp
= i915_get_utemp(p
);
681 * result = (-c)*a + tmp
683 i915_emit_arith(p
, A0_MAD
, tmp
,
684 flags
& A0_DEST_CHANNEL_ALL
, 0, src1
, src0
, src2
);
686 i915_emit_arith(p
, A0_MAD
,
687 get_result_vector(p
, &inst
->Dst
[0]),
688 flags
, 0, negate(src2
, 1, 1, 1, 1), src0
, tmp
);
691 case TGSI_OPCODE_MAD
:
692 emit_simple_arith(p
, inst
, A0_MAD
, 3, fs
);
695 case TGSI_OPCODE_MAX
:
696 emit_simple_arith(p
, inst
, A0_MAX
, 2, fs
);
699 case TGSI_OPCODE_MIN
:
700 src0
= src_vector(p
, &inst
->Src
[0], fs
);
701 src1
= src_vector(p
, &inst
->Src
[1], fs
);
702 tmp
= i915_get_utemp(p
);
703 flags
= get_result_flags(inst
);
707 tmp
, flags
& A0_DEST_CHANNEL_ALL
, 0,
708 negate(src0
, 1, 1, 1, 1),
709 negate(src1
, 1, 1, 1, 1), 0);
713 get_result_vector(p
, &inst
->Dst
[0]),
714 flags
, 0, negate(tmp
, 1, 1, 1, 1), 0, 0);
717 case TGSI_OPCODE_MOV
:
718 emit_simple_arith(p
, inst
, A0_MOV
, 1, fs
);
721 case TGSI_OPCODE_MUL
:
722 emit_simple_arith(p
, inst
, A0_MUL
, 2, fs
);
725 case TGSI_OPCODE_POW
:
726 src0
= src_vector(p
, &inst
->Src
[0], fs
);
727 src1
= src_vector(p
, &inst
->Src
[1], fs
);
728 tmp
= i915_get_utemp(p
);
729 flags
= get_result_flags(inst
);
731 /* XXX: masking on intermediate values, here and elsewhere.
735 tmp
, A0_DEST_CHANNEL_X
, 0,
736 swizzle(src0
, X
, X
, X
, X
), 0, 0);
738 i915_emit_arith(p
, A0_MUL
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, src1
, 0);
742 get_result_vector(p
, &inst
->Dst
[0]),
743 flags
, 0, swizzle(tmp
, X
, X
, X
, X
), 0, 0);
746 case TGSI_OPCODE_RET
:
750 case TGSI_OPCODE_RCP
:
751 src0
= src_vector(p
, &inst
->Src
[0], fs
);
755 get_result_vector(p
, &inst
->Dst
[0]),
756 get_result_flags(inst
), 0,
757 swizzle(src0
, X
, X
, X
, X
), 0, 0);
760 case TGSI_OPCODE_RSQ
:
761 src0
= src_vector(p
, &inst
->Src
[0], fs
);
765 get_result_vector(p
, &inst
->Dst
[0]),
766 get_result_flags(inst
), 0,
767 swizzle(src0
, X
, X
, X
, X
), 0, 0);
770 case TGSI_OPCODE_SCS
:
771 src0
= src_vector(p
, &inst
->Src
[0], fs
);
772 tmp
= i915_get_utemp(p
);
775 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
776 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
777 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
778 * scs.x = DP4 t1, sin_constants
779 * t1 = MUL t0.xxz1 t0.z111 ; x^6 x^4 x^2 1
780 * scs.y = DP4 t1, cos_constants
784 tmp
, A0_DEST_CHANNEL_XY
, 0,
785 swizzle(src0
, X
, X
, ONE
, ONE
),
786 swizzle(src0
, X
, ONE
, ONE
, ONE
), 0);
790 tmp
, A0_DEST_CHANNEL_ALL
, 0,
791 swizzle(tmp
, X
, Y
, X
, Y
),
792 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
794 writemask
= inst
->Dst
[0].Register
.WriteMask
;
796 if (writemask
& TGSI_WRITEMASK_Y
) {
799 if (writemask
& TGSI_WRITEMASK_X
)
800 tmp1
= i915_get_utemp(p
);
806 tmp1
, A0_DEST_CHANNEL_ALL
, 0,
807 swizzle(tmp
, X
, Y
, Y
, W
),
808 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
812 get_result_vector(p
, &inst
->Dst
[0]),
813 A0_DEST_CHANNEL_Y
, 0,
814 swizzle(tmp1
, W
, Z
, Y
, X
),
815 i915_emit_const4fv(p
, sin_constants
), 0);
818 if (writemask
& TGSI_WRITEMASK_X
) {
821 tmp
, A0_DEST_CHANNEL_XYZ
, 0,
822 swizzle(tmp
, X
, X
, Z
, ONE
),
823 swizzle(tmp
, Z
, ONE
, ONE
, ONE
), 0);
827 get_result_vector(p
, &inst
->Dst
[0]),
828 A0_DEST_CHANNEL_X
, 0,
829 swizzle(tmp
, ONE
, Z
, Y
, X
),
830 i915_emit_const4fv(p
, cos_constants
), 0);
834 case TGSI_OPCODE_SEQ
:
835 /* if we're both >= and <= then we're == */
836 src0
= src_vector(p
, &inst
->Src
[0], fs
);
837 src1
= src_vector(p
, &inst
->Src
[1], fs
);
838 tmp
= i915_get_utemp(p
);
842 tmp
, A0_DEST_CHANNEL_ALL
, 0,
848 get_result_vector(p
, &inst
->Dst
[0]),
849 A0_DEST_CHANNEL_ALL
, 0,
855 get_result_vector(p
, &inst
->Dst
[0]),
856 A0_DEST_CHANNEL_ALL
, 0,
857 get_result_vector(p
, &inst
->Dst
[0]),
862 case TGSI_OPCODE_SGE
:
863 emit_simple_arith(p
, inst
, A0_SGE
, 2, fs
);
866 case TGSI_OPCODE_SIN
:
867 src0
= src_vector(p
, &inst
->Src
[0], fs
);
868 tmp
= i915_get_utemp(p
);
872 tmp
, A0_DEST_CHANNEL_X
, 0,
873 src0
, i915_emit_const1f(p
, 1.0f
/ (float) (M_PI
* 2.0)), 0);
875 i915_emit_arith(p
, A0_MOD
, tmp
, A0_DEST_CHANNEL_X
, 0, tmp
, 0, 0);
877 /* By choosing different taylor constants, could get rid of this mul:
881 tmp
, A0_DEST_CHANNEL_X
, 0,
882 tmp
, i915_emit_const1f(p
, (float) (M_PI
* 2.0)), 0);
885 * t0.xy = MUL x.xx11, x.x1111 ; x^2, x, 1, 1
886 * t0 = MUL t0.xyxy t0.xx11 ; x^4, x^3, x^2, x
887 * t1 = MUL t0.xyyw t0.yz11 ; x^7 x^5 x^3 x
888 * result = DP4 t1.wzyx, sin_constants
892 tmp
, A0_DEST_CHANNEL_XY
, 0,
893 swizzle(tmp
, X
, X
, ONE
, ONE
),
894 swizzle(tmp
, X
, ONE
, ONE
, ONE
), 0);
898 tmp
, A0_DEST_CHANNEL_ALL
, 0,
899 swizzle(tmp
, X
, Y
, X
, Y
),
900 swizzle(tmp
, X
, X
, ONE
, ONE
), 0);
904 tmp
, A0_DEST_CHANNEL_ALL
, 0,
905 swizzle(tmp
, X
, Y
, Y
, W
),
906 swizzle(tmp
, X
, Z
, ONE
, ONE
), 0);
910 get_result_vector(p
, &inst
->Dst
[0]),
911 get_result_flags(inst
), 0,
912 swizzle(tmp
, W
, Z
, Y
, X
),
913 i915_emit_const4fv(p
, sin_constants
), 0);
916 case TGSI_OPCODE_SLE
:
917 /* like SGE, but swap reg0, reg1 */
918 emit_simple_arith_swap2(p
, inst
, A0_SGE
, 2, fs
);
921 case TGSI_OPCODE_SLT
:
922 emit_simple_arith(p
, inst
, A0_SLT
, 2, fs
);
925 case TGSI_OPCODE_SGT
:
926 /* like SLT, but swap reg0, reg1 */
927 emit_simple_arith_swap2(p
, inst
, A0_SLT
, 2, fs
);
930 case TGSI_OPCODE_SNE
:
931 /* if we're < or > then we're != */
932 src0
= src_vector(p
, &inst
->Src
[0], fs
);
933 src1
= src_vector(p
, &inst
->Src
[1], fs
);
934 tmp
= i915_get_utemp(p
);
939 A0_DEST_CHANNEL_ALL
, 0,
945 get_result_vector(p
, &inst
->Dst
[0]),
946 A0_DEST_CHANNEL_ALL
, 0,
952 get_result_vector(p
, &inst
->Dst
[0]),
953 A0_DEST_CHANNEL_ALL
, 0,
954 get_result_vector(p
, &inst
->Dst
[0]),
958 case TGSI_OPCODE_SSG
:
959 /* compute (src>0) - (src<0) */
960 src0
= src_vector(p
, &inst
->Src
[0], fs
);
961 tmp
= i915_get_utemp(p
);
966 A0_DEST_CHANNEL_ALL
, 0,
968 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
), 0);
972 get_result_vector(p
, &inst
->Dst
[0]),
973 A0_DEST_CHANNEL_ALL
, 0,
974 swizzle(src0
, ZERO
, ZERO
, ZERO
, ZERO
),
979 get_result_vector(p
, &inst
->Dst
[0]),
980 A0_DEST_CHANNEL_ALL
, 0,
981 get_result_vector(p
, &inst
->Dst
[0]),
982 negate(tmp
, 1, 1, 1, 1), 0);
985 case TGSI_OPCODE_SUB
:
986 src0
= src_vector(p
, &inst
->Src
[0], fs
);
987 src1
= src_vector(p
, &inst
->Src
[1], fs
);
991 get_result_vector(p
, &inst
->Dst
[0]),
992 get_result_flags(inst
), 0,
993 src0
, negate(src1
, 1, 1, 1, 1), 0);
996 case TGSI_OPCODE_TEX
:
997 emit_tex(p
, inst
, T0_TEXLD
, fs
);
1000 case TGSI_OPCODE_TRUNC
:
1001 emit_simple_arith(p
, inst
, A0_TRC
, 1, fs
);
1004 case TGSI_OPCODE_TXB
:
1005 emit_tex(p
, inst
, T0_TEXLDB
, fs
);
1008 case TGSI_OPCODE_TXP
:
1009 emit_tex(p
, inst
, T0_TEXLDP
, fs
);
1012 case TGSI_OPCODE_XPD
:
1014 * result.x = src0.y * src1.z - src0.z * src1.y;
1015 * result.y = src0.z * src1.x - src0.x * src1.z;
1016 * result.z = src0.x * src1.y - src0.y * src1.x;
1019 src0
= src_vector(p
, &inst
->Src
[0], fs
);
1020 src1
= src_vector(p
, &inst
->Src
[1], fs
);
1021 tmp
= i915_get_utemp(p
);
1025 tmp
, A0_DEST_CHANNEL_ALL
, 0,
1026 swizzle(src0
, Z
, X
, Y
, ONE
),
1027 swizzle(src1
, Y
, Z
, X
, ONE
), 0);
1031 get_result_vector(p
, &inst
->Dst
[0]),
1032 get_result_flags(inst
), 0,
1033 swizzle(src0
, Y
, Z
, X
, ONE
),
1034 swizzle(src1
, Z
, X
, Y
, ONE
),
1035 negate(tmp
, 1, 1, 1, 0));
1039 i915_program_error(p
, "bad opcode %d", inst
->Instruction
.Opcode
);
1044 i915_release_utemps(p
);
1049 * Translate TGSI fragment shader into i915 hardware instructions.
1050 * \param p the translation state
1051 * \param tokens the TGSI token array
1054 i915_translate_instructions(struct i915_fp_compile
*p
,
1055 const struct tgsi_token
*tokens
,
1056 struct i915_fragment_shader
*fs
)
1058 struct i915_fragment_shader
*ifs
= p
->shader
;
1059 struct tgsi_parse_context parse
;
1061 tgsi_parse_init( &parse
, tokens
);
1063 while( !tgsi_parse_end_of_tokens( &parse
) ) {
1065 tgsi_parse_token( &parse
);
1067 switch( parse
.FullToken
.Token
.Type
) {
1068 case TGSI_TOKEN_TYPE_PROPERTY
:
1070 * We only support one cbuf, but we still need to ignore the property
1071 * correctly so we don't hit the assert at the end of the switch case.
1073 assert(parse
.FullToken
.FullProperty
.Property
.PropertyName
==
1074 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
);
1076 case TGSI_TOKEN_TYPE_DECLARATION
:
1077 if (parse
.FullToken
.FullDeclaration
.Declaration
.File
1078 == TGSI_FILE_CONSTANT
) {
1080 for (i
= parse
.FullToken
.FullDeclaration
.Range
.First
;
1081 i
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
1083 assert(ifs
->constant_flags
[i
] == 0x0);
1084 ifs
->constant_flags
[i
] = I915_CONSTFLAG_USER
;
1085 ifs
->num_constants
= MAX2(ifs
->num_constants
, i
+ 1);
1088 else if (parse
.FullToken
.FullDeclaration
.Declaration
.File
1089 == TGSI_FILE_TEMPORARY
) {
1091 for (i
= parse
.FullToken
.FullDeclaration
.Range
.First
;
1092 i
<= parse
.FullToken
.FullDeclaration
.Range
.Last
;
1094 assert(i
< I915_MAX_TEMPORARY
);
1095 /* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
1096 p
->temp_flag
|= (1 << i
); /* mark temp as used */
1101 case TGSI_TOKEN_TYPE_IMMEDIATE
:
1103 const struct tgsi_full_immediate
*imm
1104 = &parse
.FullToken
.FullImmediate
;
1105 const uint pos
= p
->num_immediates
++;
1107 assert( imm
->Immediate
.NrTokens
<= 4 + 1 );
1108 for (j
= 0; j
< imm
->Immediate
.NrTokens
- 1; j
++) {
1109 p
->immediates
[pos
][j
] = imm
->u
[j
].Float
;
1114 case TGSI_TOKEN_TYPE_INSTRUCTION
:
1115 if (p
->first_instruction
) {
1116 /* resolve location of immediates */
1118 for (i
= 0; i
< p
->num_immediates
; i
++) {
1119 /* find constant slot for this immediate */
1120 for (j
= 0; j
< I915_MAX_CONSTANT
; j
++) {
1121 if (ifs
->constant_flags
[j
] == 0x0) {
1122 memcpy(ifs
->constants
[j
],
1125 /*printf("immediate %d maps to const %d\n", i, j);*/
1126 ifs
->constant_flags
[j
] = 0xf; /* all four comps used */
1127 p
->immediates_map
[i
] = j
;
1128 ifs
->num_constants
= MAX2(ifs
->num_constants
, j
+ 1);
1134 p
->first_instruction
= FALSE
;
1137 i915_translate_instruction(p
, &parse
.FullToken
.FullInstruction
, fs
);
1146 tgsi_parse_free (&parse
);
1150 static struct i915_fp_compile
*
1151 i915_init_compile(struct i915_context
*i915
,
1152 struct i915_fragment_shader
*ifs
)
1154 struct i915_fp_compile
*p
= CALLOC_STRUCT(i915_fp_compile
);
1159 /* Put new constants at end of const buffer, growing downward.
1160 * The problem is we don't know how many user-defined constants might
1161 * be specified with pipe->set_constant_buffer().
1162 * Should pre-scan the user's program to determine the highest-numbered
1163 * constant referenced.
1165 ifs
->num_constants
= 0;
1166 memset(ifs
->constant_flags
, 0, sizeof(ifs
->constant_flags
));
1168 for (i
= 0; i
< I915_TEX_UNITS
; i
++)
1169 ifs
->generic_mapping
[i
] = -1;
1171 p
->first_instruction
= TRUE
;
1173 p
->nr_tex_indirect
= 1; /* correct? */
1176 p
->nr_decl_insn
= 0;
1178 p
->csr
= p
->program
;
1179 p
->decl
= p
->declarations
;
1182 p
->temp_flag
= ~0x0 << I915_MAX_TEMPORARY
;
1183 p
->utemp_flag
= ~0x7;
1185 /* initialize the first program word */
1186 *(p
->decl
++) = _3DSTATE_PIXEL_SHADER_PROGRAM
;
1192 /* Copy compile results to the fragment program struct and destroy the
1193 * compilation context.
1196 i915_fini_compile(struct i915_context
*i915
, struct i915_fp_compile
*p
)
1198 struct i915_fragment_shader
*ifs
= p
->shader
;
1199 unsigned long program_size
= (unsigned long) (p
->csr
- p
->program
);
1200 unsigned long decl_size
= (unsigned long) (p
->decl
- p
->declarations
);
1202 if (p
->nr_tex_indirect
> I915_MAX_TEX_INDIRECT
)
1203 i915_program_error(p
, "Exceeded max nr indirect texture lookups");
1205 if (p
->nr_tex_insn
> I915_MAX_TEX_INSN
)
1206 i915_program_error(p
, "Exceeded max TEX instructions");
1208 if (p
->nr_alu_insn
> I915_MAX_ALU_INSN
)
1209 i915_program_error(p
, "Exceeded max ALU instructions");
1211 if (p
->nr_decl_insn
> I915_MAX_DECL_INSN
)
1212 i915_program_error(p
, "Exceeded max DECL instructions");
1215 p
->NumNativeInstructions
= 0;
1216 p
->NumNativeAluInstructions
= 0;
1217 p
->NumNativeTexInstructions
= 0;
1218 p
->NumNativeTexIndirections
= 0;
1220 i915_use_passthrough_shader(ifs
);
1223 p
->NumNativeInstructions
1224 = p
->nr_alu_insn
+ p
->nr_tex_insn
+ p
->nr_decl_insn
;
1225 p
->NumNativeAluInstructions
= p
->nr_alu_insn
;
1226 p
->NumNativeTexInstructions
= p
->nr_tex_insn
;
1227 p
->NumNativeTexIndirections
= p
->nr_tex_indirect
;
1229 /* patch in the program length */
1230 p
->declarations
[0] |= program_size
+ decl_size
- 2;
1232 /* Copy compilation results to fragment program struct:
1234 assert(!ifs
->program
);
1236 = (uint
*) MALLOC((program_size
+ decl_size
) * sizeof(uint
));
1238 ifs
->program_len
= program_size
+ decl_size
;
1240 memcpy(ifs
->program
,
1242 decl_size
* sizeof(uint
));
1244 memcpy(ifs
->program
+ decl_size
,
1246 program_size
* sizeof(uint
));
1250 /* Release the compilation struct:
1260 * Rather than trying to intercept and jiggle depth writes during
1261 * emit, just move the value into its correct position at the end of
1265 i915_fixup_depth_write(struct i915_fp_compile
*p
)
1267 /* XXX assuming pos/depth is always in output[0] */
1268 if (p
->shader
->info
.output_semantic_name
[0] == TGSI_SEMANTIC_POSITION
) {
1269 const uint depth
= UREG(REG_TYPE_OD
, 0);
1272 A0_MOV
, /* opcode */
1273 depth
, /* dest reg */
1274 A0_DEST_CHANNEL_W
, /* write mask */
1276 swizzle(depth
, X
, Y
, Z
, Z
), /* src0 */
1277 0, 0 /* src1, src2 */);
1283 i915_translate_fragment_program( struct i915_context
*i915
,
1284 struct i915_fragment_shader
*fs
)
1286 struct i915_fp_compile
*p
;
1287 const struct tgsi_token
*tokens
= fs
->state
.tokens
;
1290 tgsi_dump(tokens
, 0);
1293 /* hw doesn't seem to like empty frag programs, even when the depth write
1294 * fixup gets emitted below - may that one is fishy, too? */
1295 if (fs
->info
.num_instructions
== 1) {
1296 i915_use_passthrough_shader(fs
);
1301 p
= i915_init_compile(i915
, fs
);
1303 i915_translate_instructions(p
, tokens
, fs
);
1304 i915_fixup_depth_write(p
);
1306 i915_fini_compile(i915
, p
);