1 /**************************************************************************
3 * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "draw/draw_context.h"
30 #include "util/u_format.h"
31 #include "util/u_format_s3tc.h"
32 #include "util/u_inlines.h"
33 #include "util/u_memory.h"
34 #include "util/u_string.h"
37 #include "i915_debug.h"
38 #include "i915_context.h"
39 #include "i915_screen.h"
40 #include "i915_resource.h"
41 #include "i915_winsys.h"
42 #include "i915_public.h"
51 i915_get_vendor(struct pipe_screen
*screen
)
53 return "VMware, Inc.";
57 i915_get_name(struct pipe_screen
*screen
)
59 static char buffer
[128];
62 switch (i915_screen(screen
)->iws
->pci_id
) {
66 case PCI_CHIP_I915_GM
:
72 case PCI_CHIP_I945_GM
:
75 case PCI_CHIP_I945_GME
:
87 case PCI_CHIP_PINEVIEW_G
:
88 chipset
= "Pineview G";
90 case PCI_CHIP_PINEVIEW_M
:
91 chipset
= "Pineview M";
98 util_snprintf(buffer
, sizeof(buffer
), "i915 (chipset: %s)", chipset
);
103 i915_get_shader_param(struct pipe_screen
*screen
, unsigned shader
, enum pipe_shader_cap cap
)
106 case PIPE_SHADER_VERTEX
:
108 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
109 if (debug_get_bool_option("DRAW_USE_LLVM", TRUE
))
110 return PIPE_MAX_SAMPLERS
;
114 return draw_get_shader_param(shader
, cap
);
116 case PIPE_SHADER_FRAGMENT
:
117 /* XXX: some of these are just shader model 2.0 values, fix this! */
119 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
120 return I915_MAX_ALU_INSN
+ I915_MAX_TEX_INSN
;
121 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
122 return I915_MAX_ALU_INSN
;
123 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
124 return I915_MAX_TEX_INSN
;
125 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
127 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
129 case PIPE_SHADER_CAP_MAX_INPUTS
:
131 case PIPE_SHADER_CAP_MAX_CONSTS
:
133 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
135 case PIPE_SHADER_CAP_MAX_TEMPS
:
136 return 12; /* XXX: 12 -> 32 ? */
137 case PIPE_SHADER_CAP_MAX_ADDRS
:
139 case PIPE_SHADER_CAP_MAX_PREDS
:
141 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
142 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
144 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
145 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
146 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
147 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
149 case PIPE_SHADER_CAP_SUBROUTINES
:
151 case PIPE_SHADER_CAP_INTEGERS
:
153 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
154 return I915_TEX_UNITS
;
156 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__
, cap
);
167 i915_get_param(struct pipe_screen
*screen
, enum pipe_cap cap
)
169 struct i915_screen
*is
= i915_screen(screen
);
172 /* Supported features (boolean caps). */
173 case PIPE_CAP_ANISOTROPIC_FILTER
:
174 case PIPE_CAP_NPOT_TEXTURES
:
175 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
176 case PIPE_CAP_POINT_SPRITE
:
177 case PIPE_CAP_PRIMITIVE_RESTART
: /* draw module */
178 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
179 case PIPE_CAP_TWO_SIDED_STENCIL
:
180 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
181 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
182 case PIPE_CAP_TGSI_INSTANCEID
:
183 case PIPE_CAP_VERTEX_COLOR_CLAMPED
:
184 case PIPE_CAP_USER_VERTEX_BUFFERS
:
185 case PIPE_CAP_USER_INDEX_BUFFERS
:
186 case PIPE_CAP_USER_CONSTANT_BUFFERS
:
188 case PIPE_CAP_TGSI_TEXCOORD
:
191 /* Unsupported features (boolean caps). */
192 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
193 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
194 case PIPE_CAP_INDEP_BLEND_ENABLE
:
195 case PIPE_CAP_INDEP_BLEND_FUNC
:
196 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
197 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
198 case PIPE_CAP_TEXTURE_SWIZZLE
:
199 case PIPE_CAP_QUERY_TIME_ELAPSED
:
201 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
202 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
203 case PIPE_CAP_SCALED_RESOLVE
:
204 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED
:
205 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
206 case PIPE_CAP_CONDITIONAL_RENDER
:
207 case PIPE_CAP_TEXTURE_BARRIER
:
208 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS
:
209 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
210 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION
:
211 case PIPE_CAP_START_INSTANCE
:
212 case PIPE_CAP_QUERY_TIMESTAMP
:
213 case PIPE_CAP_QUERY_PIPELINE_STATISTICS
:
214 case PIPE_CAP_TEXTURE_MULTISAMPLE
:
215 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT
:
216 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK
:
218 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
219 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME
:
220 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY
:
221 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY
:
222 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY
:
225 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
228 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
231 /* Features we can lie about (boolean caps). */
232 case PIPE_CAP_OCCLUSION_QUERY
:
233 return is
->debug
.lie
? 1 : 0;
236 case PIPE_CAP_MAX_COMBINED_SAMPLERS
:
237 return i915_get_shader_param(screen
,
239 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
) +
240 i915_get_shader_param(screen
,
241 PIPE_SHADER_FRAGMENT
,
242 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
);
243 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
244 return I915_MAX_TEXTURE_2D_LEVELS
;
245 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
246 return I915_MAX_TEXTURE_3D_LEVELS
;
247 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
248 return I915_MAX_TEXTURE_2D_LEVELS
;
249 case PIPE_CAP_MIN_TEXEL_OFFSET
:
250 case PIPE_CAP_MAX_TEXEL_OFFSET
:
251 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
:
252 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS
:
253 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS
:
256 /* Render targets. */
257 case PIPE_CAP_MAX_RENDER_TARGETS
:
260 /* Fragment coordinate conventions. */
261 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
262 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
264 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
265 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
267 case PIPE_CAP_ENDIANNESS
:
268 return PIPE_ENDIAN_LITTLE
;
271 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__
, cap
);
277 i915_get_paramf(struct pipe_screen
*screen
, enum pipe_capf cap
)
280 case PIPE_CAPF_MAX_LINE_WIDTH
:
282 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
285 case PIPE_CAPF_MAX_POINT_WIDTH
:
287 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
290 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
293 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
297 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__
, cap
);
303 i915_is_format_supported(struct pipe_screen
*screen
,
304 enum pipe_format format
,
305 enum pipe_texture_target target
,
306 unsigned sample_count
,
309 static const enum pipe_format tex_supported
[] = {
310 PIPE_FORMAT_B8G8R8A8_UNORM
,
311 PIPE_FORMAT_B8G8R8A8_SRGB
,
312 PIPE_FORMAT_B8G8R8X8_UNORM
,
313 PIPE_FORMAT_R8G8B8A8_UNORM
,
314 PIPE_FORMAT_R8G8B8X8_UNORM
,
315 PIPE_FORMAT_B5G6R5_UNORM
,
316 PIPE_FORMAT_B10G10R10A2_UNORM
,
317 PIPE_FORMAT_L8_UNORM
,
318 PIPE_FORMAT_A8_UNORM
,
319 PIPE_FORMAT_I8_UNORM
,
320 PIPE_FORMAT_L8A8_UNORM
,
324 PIPE_FORMAT_Z16_UNORM, */
325 PIPE_FORMAT_DXT1_RGB
,
326 PIPE_FORMAT_DXT1_RGBA
,
327 PIPE_FORMAT_DXT3_RGBA
,
328 PIPE_FORMAT_DXT5_RGBA
,
329 PIPE_FORMAT_Z24X8_UNORM
,
330 PIPE_FORMAT_Z24_UNORM_S8_UINT
,
331 PIPE_FORMAT_NONE
/* list terminator */
333 static const enum pipe_format render_supported
[] = {
334 PIPE_FORMAT_B8G8R8A8_UNORM
,
335 PIPE_FORMAT_B8G8R8X8_UNORM
,
336 PIPE_FORMAT_R8G8B8A8_UNORM
,
337 PIPE_FORMAT_R8G8B8X8_UNORM
,
338 PIPE_FORMAT_B5G6R5_UNORM
,
339 PIPE_FORMAT_B10G10R10A2_UNORM
,
340 PIPE_FORMAT_L8_UNORM
,
341 PIPE_FORMAT_A8_UNORM
,
342 PIPE_FORMAT_I8_UNORM
,
343 PIPE_FORMAT_NONE
/* list terminator */
345 static const enum pipe_format depth_supported
[] = {
347 PIPE_FORMAT_Z16_UNORM, */
348 PIPE_FORMAT_Z24X8_UNORM
,
349 PIPE_FORMAT_Z24_UNORM_S8_UINT
,
350 PIPE_FORMAT_NONE
/* list terminator */
352 const enum pipe_format
*list
;
355 if (!util_format_is_supported(format
, tex_usage
))
358 if (sample_count
> 1)
361 if(tex_usage
& PIPE_BIND_DEPTH_STENCIL
)
362 list
= depth_supported
;
363 else if (tex_usage
& PIPE_BIND_RENDER_TARGET
)
364 list
= render_supported
;
365 else if (tex_usage
& PIPE_BIND_SAMPLER_VIEW
)
366 list
= tex_supported
;
368 return TRUE
; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
370 for (i
= 0; list
[i
] != PIPE_FORMAT_NONE
; i
++) {
371 if (list
[i
] == format
)
385 i915_fence_reference(struct pipe_screen
*screen
,
386 struct pipe_fence_handle
**ptr
,
387 struct pipe_fence_handle
*fence
)
389 struct i915_screen
*is
= i915_screen(screen
);
391 is
->iws
->fence_reference(is
->iws
, ptr
, fence
);
395 i915_fence_signalled(struct pipe_screen
*screen
,
396 struct pipe_fence_handle
*fence
)
398 struct i915_screen
*is
= i915_screen(screen
);
400 return is
->iws
->fence_signalled(is
->iws
, fence
) == 1;
404 i915_fence_finish(struct pipe_screen
*screen
,
405 struct pipe_fence_handle
*fence
,
408 struct i915_screen
*is
= i915_screen(screen
);
410 return is
->iws
->fence_finish(is
->iws
, fence
) == 1;
420 i915_flush_frontbuffer(struct pipe_screen
*screen
,
421 struct pipe_resource
*resource
,
422 unsigned level
, unsigned layer
,
423 void *winsys_drawable_handle
)
425 /* XXX: Dummy right now. */
430 (void)winsys_drawable_handle
;
434 i915_destroy_screen(struct pipe_screen
*screen
)
436 struct i915_screen
*is
= i915_screen(screen
);
439 is
->iws
->destroy(is
->iws
);
445 * Create a new i915_screen object
448 i915_screen_create(struct i915_winsys
*iws
)
450 struct i915_screen
*is
= CALLOC_STRUCT(i915_screen
);
455 switch (iws
->pci_id
) {
456 case PCI_CHIP_I915_G
:
457 case PCI_CHIP_I915_GM
:
461 case PCI_CHIP_I945_G
:
462 case PCI_CHIP_I945_GM
:
463 case PCI_CHIP_I945_GME
:
467 case PCI_CHIP_PINEVIEW_G
:
468 case PCI_CHIP_PINEVIEW_M
:
473 debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
474 __FUNCTION__
, iws
->pci_id
);
481 is
->base
.destroy
= i915_destroy_screen
;
482 is
->base
.flush_frontbuffer
= i915_flush_frontbuffer
;
484 is
->base
.get_name
= i915_get_name
;
485 is
->base
.get_vendor
= i915_get_vendor
;
486 is
->base
.get_param
= i915_get_param
;
487 is
->base
.get_shader_param
= i915_get_shader_param
;
488 is
->base
.get_paramf
= i915_get_paramf
;
489 is
->base
.is_format_supported
= i915_is_format_supported
;
491 is
->base
.context_create
= i915_create_context
;
493 is
->base
.fence_reference
= i915_fence_reference
;
494 is
->base
.fence_signalled
= i915_fence_signalled
;
495 is
->base
.fence_finish
= i915_fence_finish
;
497 i915_init_screen_resource_functions(is
);
501 util_format_s3tc_init();