1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 /* Authors: Keith Whitwell <keith@tungstengraphics.com>
32 #include "draw/draw_context.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "tgsi/tgsi_parse.h"
38 #include "i915_context.h"
40 #include "i915_state_inlines.h"
42 #include "i915_resource.h"
44 /* The i915 (and related graphics cores) do not support GL_CLAMP. The
45 * Intel drivers for "other operating systems" implement GL_CLAMP as
46 * GL_CLAMP_TO_EDGE, so the same is done here.
49 translate_wrap_mode(unsigned wrap
)
52 case PIPE_TEX_WRAP_REPEAT
:
53 return TEXCOORDMODE_WRAP
;
54 case PIPE_TEX_WRAP_CLAMP
:
55 return TEXCOORDMODE_CLAMP_EDGE
; /* not quite correct */
56 case PIPE_TEX_WRAP_CLAMP_TO_EDGE
:
57 return TEXCOORDMODE_CLAMP_EDGE
;
58 case PIPE_TEX_WRAP_CLAMP_TO_BORDER
:
59 return TEXCOORDMODE_CLAMP_BORDER
;
61 case PIPE_TEX_WRAP_MIRRORED_REPEAT:
62 return TEXCOORDMODE_MIRROR;
65 return TEXCOORDMODE_WRAP
;
69 static unsigned translate_img_filter( unsigned filter
)
72 case PIPE_TEX_FILTER_NEAREST
:
73 return FILTER_NEAREST
;
74 case PIPE_TEX_FILTER_LINEAR
:
78 return FILTER_NEAREST
;
82 static unsigned translate_mip_filter( unsigned filter
)
85 case PIPE_TEX_MIPFILTER_NONE
:
86 return MIPFILTER_NONE
;
87 case PIPE_TEX_MIPFILTER_NEAREST
:
88 return MIPFILTER_NEAREST
;
89 case PIPE_TEX_MIPFILTER_LINEAR
:
90 return MIPFILTER_LINEAR
;
93 return MIPFILTER_NONE
;
98 /* None of this state is actually used for anything yet.
101 i915_create_blend_state(struct pipe_context
*pipe
,
102 const struct pipe_blend_state
*blend
)
104 struct i915_blend_state
*cso_data
= CALLOC_STRUCT( i915_blend_state
);
107 unsigned eqRGB
= blend
->rt
[0].rgb_func
;
108 unsigned srcRGB
= blend
->rt
[0].rgb_src_factor
;
109 unsigned dstRGB
= blend
->rt
[0].rgb_dst_factor
;
111 unsigned eqA
= blend
->rt
[0].alpha_func
;
112 unsigned srcA
= blend
->rt
[0].alpha_src_factor
;
113 unsigned dstA
= blend
->rt
[0].alpha_dst_factor
;
115 /* Special handling for MIN/MAX filter modes handled at
116 * state_tracker level.
119 if (srcA
!= srcRGB
||
123 cso_data
->iab
= (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD
|
127 IAB_MODIFY_SRC_FACTOR
|
128 IAB_MODIFY_DST_FACTOR
|
129 SRC_ABLND_FACT(i915_translate_blend_factor(srcA
)) |
130 DST_ABLND_FACT(i915_translate_blend_factor(dstA
)) |
131 (i915_translate_blend_func(eqA
) << IAB_FUNC_SHIFT
));
134 cso_data
->iab
= (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD
|
140 cso_data
->modes4
|= (_3DSTATE_MODES_4_CMD
|
141 ENABLE_LOGIC_OP_FUNC
|
142 LOGIC_OP_FUNC(i915_translate_logic_op(blend
->logicop_func
)));
144 if (blend
->logicop_enable
)
145 cso_data
->LIS5
|= S5_LOGICOP_ENABLE
;
148 cso_data
->LIS5
|= S5_COLOR_DITHER_ENABLE
;
150 if ((blend
->rt
[0].colormask
& PIPE_MASK_R
) == 0)
151 cso_data
->LIS5
|= S5_WRITEDISABLE_RED
;
153 if ((blend
->rt
[0].colormask
& PIPE_MASK_G
) == 0)
154 cso_data
->LIS5
|= S5_WRITEDISABLE_GREEN
;
156 if ((blend
->rt
[0].colormask
& PIPE_MASK_B
) == 0)
157 cso_data
->LIS5
|= S5_WRITEDISABLE_BLUE
;
159 if ((blend
->rt
[0].colormask
& PIPE_MASK_A
) == 0)
160 cso_data
->LIS5
|= S5_WRITEDISABLE_ALPHA
;
162 if (blend
->rt
[0].blend_enable
) {
163 unsigned funcRGB
= blend
->rt
[0].rgb_func
;
164 unsigned srcRGB
= blend
->rt
[0].rgb_src_factor
;
165 unsigned dstRGB
= blend
->rt
[0].rgb_dst_factor
;
167 cso_data
->LIS6
|= (S6_CBUF_BLEND_ENABLE
|
168 SRC_BLND_FACT(i915_translate_blend_factor(srcRGB
)) |
169 DST_BLND_FACT(i915_translate_blend_factor(dstRGB
)) |
170 (i915_translate_blend_func(funcRGB
) << S6_CBUF_BLEND_FUNC_SHIFT
));
176 static void i915_bind_blend_state(struct pipe_context
*pipe
,
179 struct i915_context
*i915
= i915_context(pipe
);
180 draw_flush(i915
->draw
);
182 i915
->blend
= (struct i915_blend_state
*)blend
;
184 i915
->dirty
|= I915_NEW_BLEND
;
188 static void i915_delete_blend_state(struct pipe_context
*pipe
, void *blend
)
193 static void i915_set_blend_color( struct pipe_context
*pipe
,
194 const struct pipe_blend_color
*blend_color
)
196 struct i915_context
*i915
= i915_context(pipe
);
197 draw_flush(i915
->draw
);
199 i915
->blend_color
= *blend_color
;
201 i915
->dirty
|= I915_NEW_BLEND
;
204 static void i915_set_stencil_ref( struct pipe_context
*pipe
,
205 const struct pipe_stencil_ref
*stencil_ref
)
207 struct i915_context
*i915
= i915_context(pipe
);
208 draw_flush(i915
->draw
);
210 i915
->stencil_ref
= *stencil_ref
;
212 i915
->dirty
|= I915_NEW_DEPTH_STENCIL
;
216 i915_create_sampler_state(struct pipe_context
*pipe
,
217 const struct pipe_sampler_state
*sampler
)
219 struct i915_sampler_state
*cso
= CALLOC_STRUCT( i915_sampler_state
);
220 const unsigned ws
= sampler
->wrap_s
;
221 const unsigned wt
= sampler
->wrap_t
;
222 const unsigned wr
= sampler
->wrap_r
;
223 unsigned minFilt
, magFilt
;
226 cso
->templ
= sampler
;
228 mipFilt
= translate_mip_filter(sampler
->min_mip_filter
);
229 minFilt
= translate_img_filter( sampler
->min_img_filter
);
230 magFilt
= translate_img_filter( sampler
->mag_img_filter
);
232 if (sampler
->max_anisotropy
> 1)
233 minFilt
= magFilt
= FILTER_ANISOTROPIC
;
235 if (sampler
->max_anisotropy
> 2) {
236 cso
->state
[0] |= SS2_MAX_ANISO_4
;
240 int b
= (int) (sampler
->lod_bias
* 16.0);
241 b
= CLAMP(b
, -256, 255);
242 cso
->state
[0] |= ((b
<< SS2_LOD_BIAS_SHIFT
) & SS2_LOD_BIAS_MASK
);
247 if (sampler
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
)
249 cso
->state
[0] |= (SS2_SHADOW_ENABLE
|
250 i915_translate_compare_func(sampler
->compare_func
));
252 minFilt
= FILTER_4X4_FLAT
;
253 magFilt
= FILTER_4X4_FLAT
;
256 cso
->state
[0] |= ((minFilt
<< SS2_MIN_FILTER_SHIFT
) |
257 (mipFilt
<< SS2_MIP_FILTER_SHIFT
) |
258 (magFilt
<< SS2_MAG_FILTER_SHIFT
));
261 ((translate_wrap_mode(ws
) << SS3_TCX_ADDR_MODE_SHIFT
) |
262 (translate_wrap_mode(wt
) << SS3_TCY_ADDR_MODE_SHIFT
) |
263 (translate_wrap_mode(wr
) << SS3_TCZ_ADDR_MODE_SHIFT
));
265 if (sampler
->normalized_coords
)
266 cso
->state
[1] |= SS3_NORMALIZED_COORDS
;
269 int minlod
= (int) (16.0 * sampler
->min_lod
);
270 int maxlod
= (int) (16.0 * sampler
->max_lod
);
271 minlod
= CLAMP(minlod
, 0, 16 * 11);
272 maxlod
= CLAMP(maxlod
, 0, 16 * 11);
277 cso
->minlod
= minlod
;
278 cso
->maxlod
= maxlod
;
282 ubyte r
= float_to_ubyte(sampler
->border_color
[0]);
283 ubyte g
= float_to_ubyte(sampler
->border_color
[1]);
284 ubyte b
= float_to_ubyte(sampler
->border_color
[2]);
285 ubyte a
= float_to_ubyte(sampler
->border_color
[3]);
286 cso
->state
[2] = I915PACKCOLOR8888(r
, g
, b
, a
);
291 static void i915_bind_sampler_states(struct pipe_context
*pipe
,
292 unsigned num
, void **sampler
)
294 struct i915_context
*i915
= i915_context(pipe
);
297 assert(num
<= PIPE_MAX_SAMPLERS
);
299 /* Check for no-op */
300 if (num
== i915
->num_samplers
&&
301 !memcmp(i915
->sampler
, sampler
, num
* sizeof(void *)))
304 draw_flush(i915
->draw
);
306 for (i
= 0; i
< num
; ++i
)
307 i915
->sampler
[i
] = sampler
[i
];
308 for (i
= num
; i
< PIPE_MAX_SAMPLERS
; ++i
)
309 i915
->sampler
[i
] = NULL
;
311 i915
->num_samplers
= num
;
313 i915
->dirty
|= I915_NEW_SAMPLER
;
316 static void i915_delete_sampler_state(struct pipe_context
*pipe
,
323 /** XXX move someday? Or consolidate all these simple state setters
328 i915_create_depth_stencil_state(struct pipe_context
*pipe
,
329 const struct pipe_depth_stencil_alpha_state
*depth_stencil
)
331 struct i915_depth_stencil_state
*cso
= CALLOC_STRUCT( i915_depth_stencil_state
);
334 int testmask
= depth_stencil
->stencil
[0].valuemask
& 0xff;
335 int writemask
= depth_stencil
->stencil
[0].writemask
& 0xff;
337 cso
->stencil_modes4
|= (_3DSTATE_MODES_4_CMD
|
338 ENABLE_STENCIL_TEST_MASK
|
339 STENCIL_TEST_MASK(testmask
) |
340 ENABLE_STENCIL_WRITE_MASK
|
341 STENCIL_WRITE_MASK(writemask
));
344 if (depth_stencil
->stencil
[0].enabled
) {
345 int test
= i915_translate_compare_func(depth_stencil
->stencil
[0].func
);
346 int fop
= i915_translate_stencil_op(depth_stencil
->stencil
[0].fail_op
);
347 int dfop
= i915_translate_stencil_op(depth_stencil
->stencil
[0].zfail_op
);
348 int dpop
= i915_translate_stencil_op(depth_stencil
->stencil
[0].zpass_op
);
350 cso
->stencil_LIS5
|= (S5_STENCIL_TEST_ENABLE
|
351 S5_STENCIL_WRITE_ENABLE
|
352 (test
<< S5_STENCIL_TEST_FUNC_SHIFT
) |
353 (fop
<< S5_STENCIL_FAIL_SHIFT
) |
354 (dfop
<< S5_STENCIL_PASS_Z_FAIL_SHIFT
) |
355 (dpop
<< S5_STENCIL_PASS_Z_PASS_SHIFT
));
358 if (depth_stencil
->stencil
[1].enabled
) {
359 int test
= i915_translate_compare_func(depth_stencil
->stencil
[1].func
);
360 int fop
= i915_translate_stencil_op(depth_stencil
->stencil
[1].fail_op
);
361 int dfop
= i915_translate_stencil_op(depth_stencil
->stencil
[1].zfail_op
);
362 int dpop
= i915_translate_stencil_op(depth_stencil
->stencil
[1].zpass_op
);
363 int tmask
= depth_stencil
->stencil
[1].valuemask
& 0xff;
364 int wmask
= depth_stencil
->stencil
[1].writemask
& 0xff;
366 cso
->bfo
[0] = (_3DSTATE_BACKFACE_STENCIL_OPS
|
367 BFO_ENABLE_STENCIL_FUNCS
|
368 BFO_ENABLE_STENCIL_TWO_SIDE
|
369 BFO_ENABLE_STENCIL_REF
|
370 BFO_STENCIL_TWO_SIDE
|
371 (test
<< BFO_STENCIL_TEST_SHIFT
) |
372 (fop
<< BFO_STENCIL_FAIL_SHIFT
) |
373 (dfop
<< BFO_STENCIL_PASS_Z_FAIL_SHIFT
) |
374 (dpop
<< BFO_STENCIL_PASS_Z_PASS_SHIFT
));
376 cso
->bfo
[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS
|
377 BFM_ENABLE_STENCIL_TEST_MASK
|
378 BFM_ENABLE_STENCIL_WRITE_MASK
|
379 (tmask
<< BFM_STENCIL_TEST_MASK_SHIFT
) |
380 (wmask
<< BFM_STENCIL_WRITE_MASK_SHIFT
));
383 /* This actually disables two-side stencil: The bit set is a
384 * modify-enable bit to indicate we are changing the two-side
385 * setting. Then there is a symbolic zero to show that we are
386 * setting the flag to zero/off.
388 cso
->bfo
[0] = (_3DSTATE_BACKFACE_STENCIL_OPS
|
389 BFO_ENABLE_STENCIL_TWO_SIDE
|
394 if (depth_stencil
->depth
.enabled
) {
395 int func
= i915_translate_compare_func(depth_stencil
->depth
.func
);
397 cso
->depth_LIS6
|= (S6_DEPTH_TEST_ENABLE
|
398 (func
<< S6_DEPTH_TEST_FUNC_SHIFT
));
400 if (depth_stencil
->depth
.writemask
)
401 cso
->depth_LIS6
|= S6_DEPTH_WRITE_ENABLE
;
404 if (depth_stencil
->alpha
.enabled
) {
405 int test
= i915_translate_compare_func(depth_stencil
->alpha
.func
);
406 ubyte refByte
= float_to_ubyte(depth_stencil
->alpha
.ref_value
);
408 cso
->depth_LIS6
|= (S6_ALPHA_TEST_ENABLE
|
409 (test
<< S6_ALPHA_TEST_FUNC_SHIFT
) |
410 (((unsigned) refByte
) << S6_ALPHA_REF_SHIFT
));
416 static void i915_bind_depth_stencil_state(struct pipe_context
*pipe
,
419 struct i915_context
*i915
= i915_context(pipe
);
420 draw_flush(i915
->draw
);
422 i915
->depth_stencil
= (const struct i915_depth_stencil_state
*)depth_stencil
;
424 i915
->dirty
|= I915_NEW_DEPTH_STENCIL
;
427 static void i915_delete_depth_stencil_state(struct pipe_context
*pipe
,
434 static void i915_set_scissor_state( struct pipe_context
*pipe
,
435 const struct pipe_scissor_state
*scissor
)
437 struct i915_context
*i915
= i915_context(pipe
);
438 draw_flush(i915
->draw
);
440 memcpy( &i915
->scissor
, scissor
, sizeof(*scissor
) );
441 i915
->dirty
|= I915_NEW_SCISSOR
;
445 static void i915_set_polygon_stipple( struct pipe_context
*pipe
,
446 const struct pipe_poly_stipple
*stipple
)
453 i915_create_fs_state(struct pipe_context
*pipe
,
454 const struct pipe_shader_state
*templ
)
456 struct i915_context
*i915
= i915_context(pipe
);
457 struct i915_fragment_shader
*ifs
= CALLOC_STRUCT(i915_fragment_shader
);
461 ifs
->state
.tokens
= tgsi_dup_tokens(templ
->tokens
);
463 tgsi_scan_shader(templ
->tokens
, &ifs
->info
);
465 /* The shader's compiled to i915 instructions here */
466 i915_translate_fragment_program(i915
, ifs
);
472 i915_bind_fs_state(struct pipe_context
*pipe
, void *shader
)
474 struct i915_context
*i915
= i915_context(pipe
);
475 draw_flush(i915
->draw
);
477 i915
->fs
= (struct i915_fragment_shader
*) shader
;
479 i915
->dirty
|= I915_NEW_FS
;
483 void i915_delete_fs_state(struct pipe_context
*pipe
, void *shader
)
485 struct i915_fragment_shader
*ifs
= (struct i915_fragment_shader
*) shader
;
489 ifs
->program_len
= 0;
491 FREE((struct tgsi_token
*)ifs
->state
.tokens
);
498 i915_create_vs_state(struct pipe_context
*pipe
,
499 const struct pipe_shader_state
*templ
)
501 struct i915_context
*i915
= i915_context(pipe
);
503 /* just pass-through to draw module */
504 return draw_create_vertex_shader(i915
->draw
, templ
);
507 static void i915_bind_vs_state(struct pipe_context
*pipe
, void *shader
)
509 struct i915_context
*i915
= i915_context(pipe
);
511 /* just pass-through to draw module */
512 draw_bind_vertex_shader(i915
->draw
, (struct draw_vertex_shader
*) shader
);
514 i915
->dirty
|= I915_NEW_VS
;
517 static void i915_delete_vs_state(struct pipe_context
*pipe
, void *shader
)
519 struct i915_context
*i915
= i915_context(pipe
);
521 /* just pass-through to draw module */
522 draw_delete_vertex_shader(i915
->draw
, (struct draw_vertex_shader
*) shader
);
525 static void i915_set_constant_buffer(struct pipe_context
*pipe
,
526 uint shader
, uint index
,
527 struct pipe_resource
*buf
)
529 struct i915_context
*i915
= i915_context(pipe
);
530 draw_flush(i915
->draw
);
532 assert(shader
< PIPE_SHADER_TYPES
);
535 /* Make a copy of shader constants.
536 * During fragment program translation we may add additional
537 * constants to the array.
539 * We want to consider the situation where some user constants
540 * (ex: a material color) may change frequently but the shader program
541 * stays the same. In that case we should only be updating the first
542 * N constants, leaving any extras from shader translation alone.
545 struct i915_buffer
*ir
= i915_buffer(buf
);
546 memcpy(i915
->current
.constants
[shader
], ir
->data
, ir
->b
.b
.width0
);
547 i915
->current
.num_user_constants
[shader
] = (ir
->b
.b
.width0
/
551 i915
->current
.num_user_constants
[shader
] = 0;
555 i915
->dirty
|= I915_NEW_CONSTANTS
;
559 static void i915_set_fragment_sampler_views(struct pipe_context
*pipe
,
561 struct pipe_sampler_view
**views
)
563 struct i915_context
*i915
= i915_context(pipe
);
566 assert(num
<= PIPE_MAX_SAMPLERS
);
568 /* Check for no-op */
569 if (num
== i915
->num_fragment_sampler_views
&&
570 !memcmp(i915
->fragment_sampler_views
, views
, num
* sizeof(struct pipe_sampler_view
*)))
573 /* Fixes wrong texture in texobj with VBUF */
574 draw_flush(i915
->draw
);
576 for (i
= 0; i
< num
; i
++)
577 pipe_sampler_view_reference(&i915
->fragment_sampler_views
[i
],
580 for (i
= num
; i
< i915
->num_fragment_sampler_views
; i
++)
581 pipe_sampler_view_reference(&i915
->fragment_sampler_views
[i
],
584 i915
->num_fragment_sampler_views
= num
;
586 i915
->dirty
|= I915_NEW_SAMPLER_VIEW
;
590 static struct pipe_sampler_view
*
591 i915_create_sampler_view(struct pipe_context
*pipe
,
592 struct pipe_resource
*texture
,
593 const struct pipe_sampler_view
*templ
)
595 struct pipe_sampler_view
*view
= CALLOC_STRUCT(pipe_sampler_view
);
599 view
->reference
.count
= 1;
600 view
->texture
= NULL
;
601 pipe_resource_reference(&view
->texture
, texture
);
602 view
->context
= pipe
;
610 i915_sampler_view_destroy(struct pipe_context
*pipe
,
611 struct pipe_sampler_view
*view
)
613 pipe_resource_reference(&view
->texture
, NULL
);
618 static void i915_set_framebuffer_state(struct pipe_context
*pipe
,
619 const struct pipe_framebuffer_state
*fb
)
621 struct i915_context
*i915
= i915_context(pipe
);
624 draw_flush(i915
->draw
);
626 i915
->framebuffer
.width
= fb
->width
;
627 i915
->framebuffer
.height
= fb
->height
;
628 i915
->framebuffer
.nr_cbufs
= fb
->nr_cbufs
;
629 for (i
= 0; i
< PIPE_MAX_COLOR_BUFS
; i
++) {
630 pipe_surface_reference(&i915
->framebuffer
.cbufs
[i
], fb
->cbufs
[i
]);
632 pipe_surface_reference(&i915
->framebuffer
.zsbuf
, fb
->zsbuf
);
634 i915
->dirty
|= I915_NEW_FRAMEBUFFER
;
639 static void i915_set_clip_state( struct pipe_context
*pipe
,
640 const struct pipe_clip_state
*clip
)
642 struct i915_context
*i915
= i915_context(pipe
);
643 draw_flush(i915
->draw
);
645 draw_set_clip_state(i915
->draw
, clip
);
647 i915
->dirty
|= I915_NEW_CLIP
;
652 /* Called when driver state tracker notices changes to the viewport
655 static void i915_set_viewport_state( struct pipe_context
*pipe
,
656 const struct pipe_viewport_state
*viewport
)
658 struct i915_context
*i915
= i915_context(pipe
);
660 i915
->viewport
= *viewport
; /* struct copy */
662 /* pass the viewport info to the draw module */
663 draw_set_viewport_state(i915
->draw
, &i915
->viewport
);
665 i915
->dirty
|= I915_NEW_VIEWPORT
;
670 i915_create_rasterizer_state(struct pipe_context
*pipe
,
671 const struct pipe_rasterizer_state
*rasterizer
)
673 struct i915_rasterizer_state
*cso
= CALLOC_STRUCT( i915_rasterizer_state
);
675 cso
->templ
= rasterizer
;
676 cso
->color_interp
= rasterizer
->flatshade
? INTERP_CONSTANT
: INTERP_LINEAR
;
677 cso
->light_twoside
= rasterizer
->light_twoside
;
678 cso
->ds
[0].u
= _3DSTATE_DEPTH_OFFSET_SCALE
;
679 cso
->ds
[1].f
= rasterizer
->offset_scale
;
680 if (rasterizer
->poly_stipple_enable
) {
681 cso
->st
|= ST1_ENABLE
;
684 if (rasterizer
->scissor
)
685 cso
->sc
[0] = _3DSTATE_SCISSOR_ENABLE_CMD
| ENABLE_SCISSOR_RECT
;
687 cso
->sc
[0] = _3DSTATE_SCISSOR_ENABLE_CMD
| DISABLE_SCISSOR_RECT
;
689 switch (rasterizer
->cull_face
) {
691 cso
->LIS4
|= S4_CULLMODE_NONE
;
693 case PIPE_FACE_FRONT
:
694 if (rasterizer
->front_ccw
)
695 cso
->LIS4
|= S4_CULLMODE_CCW
;
697 cso
->LIS4
|= S4_CULLMODE_CW
;
700 if (rasterizer
->front_ccw
)
701 cso
->LIS4
|= S4_CULLMODE_CW
;
703 cso
->LIS4
|= S4_CULLMODE_CCW
;
705 case PIPE_FACE_FRONT_AND_BACK
:
706 cso
->LIS4
|= S4_CULLMODE_BOTH
;
711 int line_width
= CLAMP((int)(rasterizer
->line_width
* 2), 1, 0xf);
713 cso
->LIS4
|= line_width
<< S4_LINE_WIDTH_SHIFT
;
715 if (rasterizer
->line_smooth
)
716 cso
->LIS4
|= S4_LINE_ANTIALIAS_ENABLE
;
720 int point_size
= CLAMP((int) rasterizer
->point_size
, 1, 0xff);
722 cso
->LIS4
|= point_size
<< S4_POINT_WIDTH_SHIFT
;
725 if (rasterizer
->flatshade
) {
726 cso
->LIS4
|= (S4_FLATSHADE_ALPHA
|
728 S4_FLATSHADE_SPECULAR
);
731 cso
->LIS7
= fui( rasterizer
->offset_units
);
737 static void i915_bind_rasterizer_state( struct pipe_context
*pipe
,
740 struct i915_context
*i915
= i915_context(pipe
);
742 i915
->rasterizer
= (struct i915_rasterizer_state
*)raster
;
744 /* pass-through to draw module */
745 draw_set_rasterizer_state(i915
->draw
,
746 (i915
->rasterizer
? i915
->rasterizer
->templ
: NULL
),
749 i915
->dirty
|= I915_NEW_RASTERIZER
;
752 static void i915_delete_rasterizer_state(struct pipe_context
*pipe
,
758 static void i915_set_vertex_buffers(struct pipe_context
*pipe
,
760 const struct pipe_vertex_buffer
*buffers
)
762 struct i915_context
*i915
= i915_context(pipe
);
763 /* Because we change state before the draw_set_vertex_buffers call
764 * we need a flush here, just to be sure.
766 draw_flush(i915
->draw
);
768 memcpy(i915
->vertex_buffer
, buffers
, count
* sizeof(buffers
[0]));
769 i915
->num_vertex_buffers
= count
;
771 /* pass-through to draw module */
772 draw_set_vertex_buffers(i915
->draw
, count
, buffers
);
776 i915_create_vertex_elements_state(struct pipe_context
*pipe
,
778 const struct pipe_vertex_element
*attribs
)
780 struct i915_velems_state
*velems
;
781 assert(count
<= PIPE_MAX_ATTRIBS
);
782 velems
= (struct i915_velems_state
*) MALLOC(sizeof(struct i915_velems_state
));
784 velems
->count
= count
;
785 memcpy(velems
->velem
, attribs
, sizeof(*attribs
) * count
);
791 i915_bind_vertex_elements_state(struct pipe_context
*pipe
,
794 struct i915_context
*i915
= i915_context(pipe
);
795 struct i915_velems_state
*i915_velems
= (struct i915_velems_state
*) velems
;
797 /* Because we change state before the draw_set_vertex_buffers call
798 * we need a flush here, just to be sure.
800 draw_flush(i915
->draw
);
802 /* pass-through to draw module */
804 draw_set_vertex_elements(i915
->draw
,
805 i915_velems
->count
, i915_velems
->velem
);
810 i915_delete_vertex_elements_state(struct pipe_context
*pipe
, void *velems
)
815 static void i915_set_index_buffer(struct pipe_context
*pipe
,
816 const struct pipe_index_buffer
*ib
)
818 struct i915_context
*i915
= i915_context(pipe
);
821 memcpy(&i915
->index_buffer
, ib
, sizeof(i915
->index_buffer
));
823 memset(&i915
->index_buffer
, 0, sizeof(i915
->index_buffer
));
825 /* TODO make this more like a state */
829 i915_set_sample_mask(struct pipe_context
*pipe
,
830 unsigned sample_mask
)
835 i915_init_state_functions( struct i915_context
*i915
)
837 i915
->base
.create_blend_state
= i915_create_blend_state
;
838 i915
->base
.bind_blend_state
= i915_bind_blend_state
;
839 i915
->base
.delete_blend_state
= i915_delete_blend_state
;
841 i915
->base
.create_sampler_state
= i915_create_sampler_state
;
842 i915
->base
.bind_fragment_sampler_states
= i915_bind_sampler_states
;
843 i915
->base
.delete_sampler_state
= i915_delete_sampler_state
;
845 i915
->base
.create_depth_stencil_alpha_state
= i915_create_depth_stencil_state
;
846 i915
->base
.bind_depth_stencil_alpha_state
= i915_bind_depth_stencil_state
;
847 i915
->base
.delete_depth_stencil_alpha_state
= i915_delete_depth_stencil_state
;
849 i915
->base
.create_rasterizer_state
= i915_create_rasterizer_state
;
850 i915
->base
.bind_rasterizer_state
= i915_bind_rasterizer_state
;
851 i915
->base
.delete_rasterizer_state
= i915_delete_rasterizer_state
;
852 i915
->base
.create_fs_state
= i915_create_fs_state
;
853 i915
->base
.bind_fs_state
= i915_bind_fs_state
;
854 i915
->base
.delete_fs_state
= i915_delete_fs_state
;
855 i915
->base
.create_vs_state
= i915_create_vs_state
;
856 i915
->base
.bind_vs_state
= i915_bind_vs_state
;
857 i915
->base
.delete_vs_state
= i915_delete_vs_state
;
858 i915
->base
.create_vertex_elements_state
= i915_create_vertex_elements_state
;
859 i915
->base
.bind_vertex_elements_state
= i915_bind_vertex_elements_state
;
860 i915
->base
.delete_vertex_elements_state
= i915_delete_vertex_elements_state
;
862 i915
->base
.set_blend_color
= i915_set_blend_color
;
863 i915
->base
.set_stencil_ref
= i915_set_stencil_ref
;
864 i915
->base
.set_clip_state
= i915_set_clip_state
;
865 i915
->base
.set_sample_mask
= i915_set_sample_mask
;
866 i915
->base
.set_constant_buffer
= i915_set_constant_buffer
;
867 i915
->base
.set_framebuffer_state
= i915_set_framebuffer_state
;
869 i915
->base
.set_polygon_stipple
= i915_set_polygon_stipple
;
870 i915
->base
.set_scissor_state
= i915_set_scissor_state
;
871 i915
->base
.set_fragment_sampler_views
= i915_set_fragment_sampler_views
;
872 i915
->base
.create_sampler_view
= i915_create_sampler_view
;
873 i915
->base
.sampler_view_destroy
= i915_sampler_view_destroy
;
874 i915
->base
.set_viewport_state
= i915_set_viewport_state
;
875 i915
->base
.set_vertex_buffers
= i915_set_vertex_buffers
;
876 i915
->base
.set_index_buffer
= i915_set_index_buffer
;