gallium: Check for OOM condition when creating a sampler view.
[mesa.git] / src / gallium / drivers / i915 / i915_state.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /* Authors: Keith Whitwell <keith@tungstengraphics.com>
29 */
30
31
32 #include "draw/draw_context.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "tgsi/tgsi_parse.h"
37
38 #include "i915_context.h"
39 #include "i915_reg.h"
40 #include "i915_state_inlines.h"
41 #include "i915_fpc.h"
42
43 /* The i915 (and related graphics cores) do not support GL_CLAMP. The
44 * Intel drivers for "other operating systems" implement GL_CLAMP as
45 * GL_CLAMP_TO_EDGE, so the same is done here.
46 */
47 static unsigned
48 translate_wrap_mode(unsigned wrap)
49 {
50 switch (wrap) {
51 case PIPE_TEX_WRAP_REPEAT:
52 return TEXCOORDMODE_WRAP;
53 case PIPE_TEX_WRAP_CLAMP:
54 return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
55 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
56 return TEXCOORDMODE_CLAMP_EDGE;
57 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
58 return TEXCOORDMODE_CLAMP_BORDER;
59 /*
60 case PIPE_TEX_WRAP_MIRRORED_REPEAT:
61 return TEXCOORDMODE_MIRROR;
62 */
63 default:
64 return TEXCOORDMODE_WRAP;
65 }
66 }
67
68 static unsigned translate_img_filter( unsigned filter )
69 {
70 switch (filter) {
71 case PIPE_TEX_FILTER_NEAREST:
72 return FILTER_NEAREST;
73 case PIPE_TEX_FILTER_LINEAR:
74 return FILTER_LINEAR;
75 default:
76 assert(0);
77 return FILTER_NEAREST;
78 }
79 }
80
81 static unsigned translate_mip_filter( unsigned filter )
82 {
83 switch (filter) {
84 case PIPE_TEX_MIPFILTER_NONE:
85 return MIPFILTER_NONE;
86 case PIPE_TEX_MIPFILTER_NEAREST:
87 return MIPFILTER_NEAREST;
88 case PIPE_TEX_MIPFILTER_LINEAR:
89 return MIPFILTER_LINEAR;
90 default:
91 assert(0);
92 return MIPFILTER_NONE;
93 }
94 }
95
96
97 /* None of this state is actually used for anything yet.
98 */
99 static void *
100 i915_create_blend_state(struct pipe_context *pipe,
101 const struct pipe_blend_state *blend)
102 {
103 struct i915_blend_state *cso_data = CALLOC_STRUCT( i915_blend_state );
104
105 {
106 unsigned eqRGB = blend->rt[0].rgb_func;
107 unsigned srcRGB = blend->rt[0].rgb_src_factor;
108 unsigned dstRGB = blend->rt[0].rgb_dst_factor;
109
110 unsigned eqA = blend->rt[0].alpha_func;
111 unsigned srcA = blend->rt[0].alpha_src_factor;
112 unsigned dstA = blend->rt[0].alpha_dst_factor;
113
114 /* Special handling for MIN/MAX filter modes handled at
115 * state_tracker level.
116 */
117
118 if (srcA != srcRGB ||
119 dstA != dstRGB ||
120 eqA != eqRGB) {
121
122 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
123 IAB_MODIFY_ENABLE |
124 IAB_ENABLE |
125 IAB_MODIFY_FUNC |
126 IAB_MODIFY_SRC_FACTOR |
127 IAB_MODIFY_DST_FACTOR |
128 SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) |
129 DST_ABLND_FACT(i915_translate_blend_factor(dstA)) |
130 (i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT));
131 }
132 else {
133 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
134 IAB_MODIFY_ENABLE |
135 0);
136 }
137 }
138
139 cso_data->modes4 |= (_3DSTATE_MODES_4_CMD |
140 ENABLE_LOGIC_OP_FUNC |
141 LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
142
143 if (blend->logicop_enable)
144 cso_data->LIS5 |= S5_LOGICOP_ENABLE;
145
146 if (blend->dither)
147 cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE;
148
149 if ((blend->rt[0].colormask & PIPE_MASK_R) == 0)
150 cso_data->LIS5 |= S5_WRITEDISABLE_RED;
151
152 if ((blend->rt[0].colormask & PIPE_MASK_G) == 0)
153 cso_data->LIS5 |= S5_WRITEDISABLE_GREEN;
154
155 if ((blend->rt[0].colormask & PIPE_MASK_B) == 0)
156 cso_data->LIS5 |= S5_WRITEDISABLE_BLUE;
157
158 if ((blend->rt[0].colormask & PIPE_MASK_A) == 0)
159 cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA;
160
161 if (blend->rt[0].blend_enable) {
162 unsigned funcRGB = blend->rt[0].rgb_func;
163 unsigned srcRGB = blend->rt[0].rgb_src_factor;
164 unsigned dstRGB = blend->rt[0].rgb_dst_factor;
165
166 cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE |
167 SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
168 DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
169 (i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
170 }
171
172 return cso_data;
173 }
174
175 static void i915_bind_blend_state(struct pipe_context *pipe,
176 void *blend)
177 {
178 struct i915_context *i915 = i915_context(pipe);
179 draw_flush(i915->draw);
180
181 i915->blend = (struct i915_blend_state*)blend;
182
183 i915->dirty |= I915_NEW_BLEND;
184 }
185
186
187 static void i915_delete_blend_state(struct pipe_context *pipe, void *blend)
188 {
189 FREE(blend);
190 }
191
192 static void i915_set_blend_color( struct pipe_context *pipe,
193 const struct pipe_blend_color *blend_color )
194 {
195 struct i915_context *i915 = i915_context(pipe);
196 draw_flush(i915->draw);
197
198 i915->blend_color = *blend_color;
199
200 i915->dirty |= I915_NEW_BLEND;
201 }
202
203 static void i915_set_stencil_ref( struct pipe_context *pipe,
204 const struct pipe_stencil_ref *stencil_ref )
205 {
206 struct i915_context *i915 = i915_context(pipe);
207 draw_flush(i915->draw);
208
209 i915->stencil_ref = *stencil_ref;
210
211 i915->dirty |= I915_NEW_DEPTH_STENCIL;
212 }
213
214 static void *
215 i915_create_sampler_state(struct pipe_context *pipe,
216 const struct pipe_sampler_state *sampler)
217 {
218 struct i915_sampler_state *cso = CALLOC_STRUCT( i915_sampler_state );
219 const unsigned ws = sampler->wrap_s;
220 const unsigned wt = sampler->wrap_t;
221 const unsigned wr = sampler->wrap_r;
222 unsigned minFilt, magFilt;
223 unsigned mipFilt;
224
225 cso->templ = sampler;
226
227 mipFilt = translate_mip_filter(sampler->min_mip_filter);
228 minFilt = translate_img_filter( sampler->min_img_filter );
229 magFilt = translate_img_filter( sampler->mag_img_filter );
230
231 if (sampler->max_anisotropy > 1)
232 minFilt = magFilt = FILTER_ANISOTROPIC;
233
234 if (sampler->max_anisotropy > 2) {
235 cso->state[0] |= SS2_MAX_ANISO_4;
236 }
237
238 {
239 int b = (int) (sampler->lod_bias * 16.0);
240 b = CLAMP(b, -256, 255);
241 cso->state[0] |= ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
242 }
243
244 /* Shadow:
245 */
246 if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE)
247 {
248 cso->state[0] |= (SS2_SHADOW_ENABLE |
249 i915_translate_compare_func(sampler->compare_func));
250
251 minFilt = FILTER_4X4_FLAT;
252 magFilt = FILTER_4X4_FLAT;
253 }
254
255 cso->state[0] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
256 (mipFilt << SS2_MIP_FILTER_SHIFT) |
257 (magFilt << SS2_MAG_FILTER_SHIFT));
258
259 cso->state[1] |=
260 ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
261 (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
262 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
263
264 if (sampler->normalized_coords)
265 cso->state[1] |= SS3_NORMALIZED_COORDS;
266
267 {
268 int minlod = (int) (16.0 * sampler->min_lod);
269 int maxlod = (int) (16.0 * sampler->max_lod);
270 minlod = CLAMP(minlod, 0, 16 * 11);
271 maxlod = CLAMP(maxlod, 0, 16 * 11);
272
273 if (minlod > maxlod)
274 maxlod = minlod;
275
276 cso->minlod = minlod;
277 cso->maxlod = maxlod;
278 }
279
280 {
281 ubyte r = float_to_ubyte(sampler->border_color[0]);
282 ubyte g = float_to_ubyte(sampler->border_color[1]);
283 ubyte b = float_to_ubyte(sampler->border_color[2]);
284 ubyte a = float_to_ubyte(sampler->border_color[3]);
285 cso->state[2] = I915PACKCOLOR8888(r, g, b, a);
286 }
287 return cso;
288 }
289
290 static void i915_bind_sampler_states(struct pipe_context *pipe,
291 unsigned num, void **sampler)
292 {
293 struct i915_context *i915 = i915_context(pipe);
294 unsigned i;
295
296 assert(num <= PIPE_MAX_SAMPLERS);
297
298 /* Check for no-op */
299 if (num == i915->num_samplers &&
300 !memcmp(i915->sampler, sampler, num * sizeof(void *)))
301 return;
302
303 draw_flush(i915->draw);
304
305 for (i = 0; i < num; ++i)
306 i915->sampler[i] = sampler[i];
307 for (i = num; i < PIPE_MAX_SAMPLERS; ++i)
308 i915->sampler[i] = NULL;
309
310 i915->num_samplers = num;
311
312 i915->dirty |= I915_NEW_SAMPLER;
313 }
314
315 static void i915_delete_sampler_state(struct pipe_context *pipe,
316 void *sampler)
317 {
318 FREE(sampler);
319 }
320
321
322 /** XXX move someday? Or consolidate all these simple state setters
323 * into one file.
324 */
325
326 static void *
327 i915_create_depth_stencil_state(struct pipe_context *pipe,
328 const struct pipe_depth_stencil_alpha_state *depth_stencil)
329 {
330 struct i915_depth_stencil_state *cso = CALLOC_STRUCT( i915_depth_stencil_state );
331
332 {
333 int testmask = depth_stencil->stencil[0].valuemask & 0xff;
334 int writemask = depth_stencil->stencil[0].writemask & 0xff;
335
336 cso->stencil_modes4 |= (_3DSTATE_MODES_4_CMD |
337 ENABLE_STENCIL_TEST_MASK |
338 STENCIL_TEST_MASK(testmask) |
339 ENABLE_STENCIL_WRITE_MASK |
340 STENCIL_WRITE_MASK(writemask));
341 }
342
343 if (depth_stencil->stencil[0].enabled) {
344 int test = i915_translate_compare_func(depth_stencil->stencil[0].func);
345 int fop = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
346 int dfop = i915_translate_stencil_op(depth_stencil->stencil[0].zfail_op);
347 int dpop = i915_translate_stencil_op(depth_stencil->stencil[0].zpass_op);
348
349 cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE |
350 S5_STENCIL_WRITE_ENABLE |
351 (test << S5_STENCIL_TEST_FUNC_SHIFT) |
352 (fop << S5_STENCIL_FAIL_SHIFT) |
353 (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
354 (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
355 }
356
357 if (depth_stencil->stencil[1].enabled) {
358 int test = i915_translate_compare_func(depth_stencil->stencil[1].func);
359 int fop = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
360 int dfop = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
361 int dpop = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
362 int tmask = depth_stencil->stencil[1].valuemask & 0xff;
363 int wmask = depth_stencil->stencil[1].writemask & 0xff;
364
365 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
366 BFO_ENABLE_STENCIL_FUNCS |
367 BFO_ENABLE_STENCIL_TWO_SIDE |
368 BFO_ENABLE_STENCIL_REF |
369 BFO_STENCIL_TWO_SIDE |
370 (test << BFO_STENCIL_TEST_SHIFT) |
371 (fop << BFO_STENCIL_FAIL_SHIFT) |
372 (dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
373 (dpop << BFO_STENCIL_PASS_Z_PASS_SHIFT));
374
375 cso->bfo[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS |
376 BFM_ENABLE_STENCIL_TEST_MASK |
377 BFM_ENABLE_STENCIL_WRITE_MASK |
378 (tmask << BFM_STENCIL_TEST_MASK_SHIFT) |
379 (wmask << BFM_STENCIL_WRITE_MASK_SHIFT));
380 }
381 else {
382 /* This actually disables two-side stencil: The bit set is a
383 * modify-enable bit to indicate we are changing the two-side
384 * setting. Then there is a symbolic zero to show that we are
385 * setting the flag to zero/off.
386 */
387 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
388 BFO_ENABLE_STENCIL_TWO_SIDE |
389 0);
390 cso->bfo[1] = 0;
391 }
392
393 if (depth_stencil->depth.enabled) {
394 int func = i915_translate_compare_func(depth_stencil->depth.func);
395
396 cso->depth_LIS6 |= (S6_DEPTH_TEST_ENABLE |
397 (func << S6_DEPTH_TEST_FUNC_SHIFT));
398
399 if (depth_stencil->depth.writemask)
400 cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
401 }
402
403 if (depth_stencil->alpha.enabled) {
404 int test = i915_translate_compare_func(depth_stencil->alpha.func);
405 ubyte refByte = float_to_ubyte(depth_stencil->alpha.ref_value);
406
407 cso->depth_LIS6 |= (S6_ALPHA_TEST_ENABLE |
408 (test << S6_ALPHA_TEST_FUNC_SHIFT) |
409 (((unsigned) refByte) << S6_ALPHA_REF_SHIFT));
410 }
411
412 return cso;
413 }
414
415 static void i915_bind_depth_stencil_state(struct pipe_context *pipe,
416 void *depth_stencil)
417 {
418 struct i915_context *i915 = i915_context(pipe);
419 draw_flush(i915->draw);
420
421 i915->depth_stencil = (const struct i915_depth_stencil_state *)depth_stencil;
422
423 i915->dirty |= I915_NEW_DEPTH_STENCIL;
424 }
425
426 static void i915_delete_depth_stencil_state(struct pipe_context *pipe,
427 void *depth_stencil)
428 {
429 FREE(depth_stencil);
430 }
431
432
433 static void i915_set_scissor_state( struct pipe_context *pipe,
434 const struct pipe_scissor_state *scissor )
435 {
436 struct i915_context *i915 = i915_context(pipe);
437 draw_flush(i915->draw);
438
439 memcpy( &i915->scissor, scissor, sizeof(*scissor) );
440 i915->dirty |= I915_NEW_SCISSOR;
441 }
442
443
444 static void i915_set_polygon_stipple( struct pipe_context *pipe,
445 const struct pipe_poly_stipple *stipple )
446 {
447 }
448
449
450
451 static void *
452 i915_create_fs_state(struct pipe_context *pipe,
453 const struct pipe_shader_state *templ)
454 {
455 struct i915_context *i915 = i915_context(pipe);
456 struct i915_fragment_shader *ifs = CALLOC_STRUCT(i915_fragment_shader);
457 if (!ifs)
458 return NULL;
459
460 ifs->state.tokens = tgsi_dup_tokens(templ->tokens);
461
462 tgsi_scan_shader(templ->tokens, &ifs->info);
463
464 /* The shader's compiled to i915 instructions here */
465 i915_translate_fragment_program(i915, ifs);
466
467 return ifs;
468 }
469
470 static void
471 i915_bind_fs_state(struct pipe_context *pipe, void *shader)
472 {
473 struct i915_context *i915 = i915_context(pipe);
474 draw_flush(i915->draw);
475
476 i915->fs = (struct i915_fragment_shader*) shader;
477
478 i915->dirty |= I915_NEW_FS;
479 }
480
481 static
482 void i915_delete_fs_state(struct pipe_context *pipe, void *shader)
483 {
484 struct i915_fragment_shader *ifs = (struct i915_fragment_shader *) shader;
485
486 if (ifs->program)
487 FREE(ifs->program);
488 ifs->program_len = 0;
489
490 FREE((struct tgsi_token *)ifs->state.tokens);
491
492 FREE(ifs);
493 }
494
495
496 static void *
497 i915_create_vs_state(struct pipe_context *pipe,
498 const struct pipe_shader_state *templ)
499 {
500 struct i915_context *i915 = i915_context(pipe);
501
502 /* just pass-through to draw module */
503 return draw_create_vertex_shader(i915->draw, templ);
504 }
505
506 static void i915_bind_vs_state(struct pipe_context *pipe, void *shader)
507 {
508 struct i915_context *i915 = i915_context(pipe);
509
510 /* just pass-through to draw module */
511 draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
512
513 i915->dirty |= I915_NEW_VS;
514 }
515
516 static void i915_delete_vs_state(struct pipe_context *pipe, void *shader)
517 {
518 struct i915_context *i915 = i915_context(pipe);
519
520 /* just pass-through to draw module */
521 draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
522 }
523
524 static void i915_set_constant_buffer(struct pipe_context *pipe,
525 uint shader, uint index,
526 struct pipe_buffer *buf)
527 {
528 struct i915_context *i915 = i915_context(pipe);
529 struct pipe_screen *screen = pipe->screen;
530 draw_flush(i915->draw);
531
532 assert(shader < PIPE_SHADER_TYPES);
533 assert(index == 0);
534
535 /* Make a copy of shader constants.
536 * During fragment program translation we may add additional
537 * constants to the array.
538 *
539 * We want to consider the situation where some user constants
540 * (ex: a material color) may change frequently but the shader program
541 * stays the same. In that case we should only be updating the first
542 * N constants, leaving any extras from shader translation alone.
543 */
544 if (buf) {
545 void *mapped;
546 if (buf->size &&
547 (mapped = pipe_buffer_map(screen, buf,
548 PIPE_BUFFER_USAGE_CPU_READ))) {
549 memcpy(i915->current.constants[shader], mapped, buf->size);
550 pipe_buffer_unmap(screen, buf);
551 i915->current.num_user_constants[shader]
552 = buf->size / (4 * sizeof(float));
553 }
554 else {
555 i915->current.num_user_constants[shader] = 0;
556 }
557 }
558
559 i915->dirty |= I915_NEW_CONSTANTS;
560 }
561
562
563 static void i915_set_fragment_sampler_views(struct pipe_context *pipe,
564 unsigned num,
565 struct pipe_sampler_view **views)
566 {
567 struct i915_context *i915 = i915_context(pipe);
568 uint i;
569
570 assert(num <= PIPE_MAX_SAMPLERS);
571
572 /* Check for no-op */
573 if (num == i915->num_fragment_sampler_views &&
574 !memcmp(i915->fragment_sampler_views, views, num * sizeof(struct pipe_sampler_view *)))
575 return;
576
577 /* Fixes wrong texture in texobj with VBUF */
578 draw_flush(i915->draw);
579
580 for (i = 0; i < num; i++)
581 pipe_sampler_view_reference(&i915->fragment_sampler_views[i],
582 views[i]);
583
584 for (i = num; i < i915->num_fragment_sampler_views; i++)
585 pipe_sampler_view_reference(&i915->fragment_sampler_views[i],
586 NULL);
587
588 i915->num_fragment_sampler_views = num;
589
590 i915->dirty |= I915_NEW_SAMPLER_VIEW;
591 }
592
593
594 static struct pipe_sampler_view *
595 i915_create_sampler_view(struct pipe_context *pipe,
596 struct pipe_texture *texture,
597 const struct pipe_sampler_view *templ)
598 {
599 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
600
601 if (view) {
602 *view = *templ;
603 view->reference.count = 1;
604 view->texture = NULL;
605 pipe_texture_reference(&view->texture, texture);
606 view->context = pipe;
607 }
608
609 return view;
610 }
611
612
613 static void
614 i915_sampler_view_destroy(struct pipe_context *pipe,
615 struct pipe_sampler_view *view)
616 {
617 pipe_texture_reference(&view->texture, NULL);
618 FREE(view);
619 }
620
621
622 static void i915_set_framebuffer_state(struct pipe_context *pipe,
623 const struct pipe_framebuffer_state *fb)
624 {
625 struct i915_context *i915 = i915_context(pipe);
626 int i;
627
628 draw_flush(i915->draw);
629
630 i915->framebuffer.width = fb->width;
631 i915->framebuffer.height = fb->height;
632 i915->framebuffer.nr_cbufs = fb->nr_cbufs;
633 for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
634 pipe_surface_reference(&i915->framebuffer.cbufs[i], fb->cbufs[i]);
635 }
636 pipe_surface_reference(&i915->framebuffer.zsbuf, fb->zsbuf);
637
638 i915->dirty |= I915_NEW_FRAMEBUFFER;
639 }
640
641
642
643 static void i915_set_clip_state( struct pipe_context *pipe,
644 const struct pipe_clip_state *clip )
645 {
646 struct i915_context *i915 = i915_context(pipe);
647 draw_flush(i915->draw);
648
649 draw_set_clip_state(i915->draw, clip);
650
651 i915->dirty |= I915_NEW_CLIP;
652 }
653
654
655
656 /* Called when driver state tracker notices changes to the viewport
657 * matrix:
658 */
659 static void i915_set_viewport_state( struct pipe_context *pipe,
660 const struct pipe_viewport_state *viewport )
661 {
662 struct i915_context *i915 = i915_context(pipe);
663
664 i915->viewport = *viewport; /* struct copy */
665
666 /* pass the viewport info to the draw module */
667 draw_set_viewport_state(i915->draw, &i915->viewport);
668
669 i915->dirty |= I915_NEW_VIEWPORT;
670 }
671
672
673 static void *
674 i915_create_rasterizer_state(struct pipe_context *pipe,
675 const struct pipe_rasterizer_state *rasterizer)
676 {
677 struct i915_rasterizer_state *cso = CALLOC_STRUCT( i915_rasterizer_state );
678
679 cso->templ = rasterizer;
680 cso->color_interp = rasterizer->flatshade ? INTERP_CONSTANT : INTERP_LINEAR;
681 cso->light_twoside = rasterizer->light_twoside;
682 cso->ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE;
683 cso->ds[1].f = rasterizer->offset_scale;
684 if (rasterizer->poly_stipple_enable) {
685 cso->st |= ST1_ENABLE;
686 }
687
688 if (rasterizer->scissor)
689 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT;
690 else
691 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT;
692
693 switch (rasterizer->cull_mode) {
694 case PIPE_WINDING_NONE:
695 cso->LIS4 |= S4_CULLMODE_NONE;
696 break;
697 case PIPE_WINDING_CW:
698 cso->LIS4 |= S4_CULLMODE_CW;
699 break;
700 case PIPE_WINDING_CCW:
701 cso->LIS4 |= S4_CULLMODE_CCW;
702 break;
703 case PIPE_WINDING_BOTH:
704 cso->LIS4 |= S4_CULLMODE_BOTH;
705 break;
706 }
707
708 {
709 int line_width = CLAMP((int)(rasterizer->line_width * 2), 1, 0xf);
710
711 cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT;
712
713 if (rasterizer->line_smooth)
714 cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
715 }
716
717 {
718 int point_size = CLAMP((int) rasterizer->point_size, 1, 0xff);
719
720 cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT;
721 }
722
723 if (rasterizer->flatshade) {
724 cso->LIS4 |= (S4_FLATSHADE_ALPHA |
725 S4_FLATSHADE_COLOR |
726 S4_FLATSHADE_SPECULAR);
727 }
728
729 cso->LIS7 = fui( rasterizer->offset_units );
730
731
732 return cso;
733 }
734
735 static void i915_bind_rasterizer_state( struct pipe_context *pipe,
736 void *raster )
737 {
738 struct i915_context *i915 = i915_context(pipe);
739
740 i915->rasterizer = (struct i915_rasterizer_state *)raster;
741
742 /* pass-through to draw module */
743 draw_set_rasterizer_state(i915->draw,
744 (i915->rasterizer ? i915->rasterizer->templ : NULL));
745
746 i915->dirty |= I915_NEW_RASTERIZER;
747 }
748
749 static void i915_delete_rasterizer_state(struct pipe_context *pipe,
750 void *raster)
751 {
752 FREE(raster);
753 }
754
755 static void i915_set_vertex_buffers(struct pipe_context *pipe,
756 unsigned count,
757 const struct pipe_vertex_buffer *buffers)
758 {
759 struct i915_context *i915 = i915_context(pipe);
760 /* Because we change state before the draw_set_vertex_buffers call
761 * we need a flush here, just to be sure.
762 */
763 draw_flush(i915->draw);
764
765 memcpy(i915->vertex_buffer, buffers, count * sizeof(buffers[0]));
766 i915->num_vertex_buffers = count;
767
768 /* pass-through to draw module */
769 draw_set_vertex_buffers(i915->draw, count, buffers);
770 }
771
772 static void *
773 i915_create_vertex_elements_state(struct pipe_context *pipe,
774 unsigned count,
775 const struct pipe_vertex_element *attribs)
776 {
777 struct i915_velems_state *velems;
778 assert(count <= PIPE_MAX_ATTRIBS);
779 velems = (struct i915_velems_state *) MALLOC(sizeof(struct i915_velems_state));
780 if (velems) {
781 velems->count = count;
782 memcpy(velems->velem, attribs, sizeof(*attribs) * count);
783 }
784 return velems;
785 }
786
787 static void
788 i915_bind_vertex_elements_state(struct pipe_context *pipe,
789 void *velems)
790 {
791 struct i915_context *i915 = i915_context(pipe);
792 struct i915_velems_state *i915_velems = (struct i915_velems_state *) velems;
793
794 /* Because we change state before the draw_set_vertex_buffers call
795 * we need a flush here, just to be sure.
796 */
797 draw_flush(i915->draw);
798
799 /* pass-through to draw module */
800 draw_set_vertex_elements(i915->draw, i915_velems->count, i915_velems->velem);
801 }
802
803 static void
804 i915_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
805 {
806 FREE( velems );
807 }
808
809 void
810 i915_init_state_functions( struct i915_context *i915 )
811 {
812 i915->base.create_blend_state = i915_create_blend_state;
813 i915->base.bind_blend_state = i915_bind_blend_state;
814 i915->base.delete_blend_state = i915_delete_blend_state;
815
816 i915->base.create_sampler_state = i915_create_sampler_state;
817 i915->base.bind_fragment_sampler_states = i915_bind_sampler_states;
818 i915->base.delete_sampler_state = i915_delete_sampler_state;
819
820 i915->base.create_depth_stencil_alpha_state = i915_create_depth_stencil_state;
821 i915->base.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state;
822 i915->base.delete_depth_stencil_alpha_state = i915_delete_depth_stencil_state;
823
824 i915->base.create_rasterizer_state = i915_create_rasterizer_state;
825 i915->base.bind_rasterizer_state = i915_bind_rasterizer_state;
826 i915->base.delete_rasterizer_state = i915_delete_rasterizer_state;
827 i915->base.create_fs_state = i915_create_fs_state;
828 i915->base.bind_fs_state = i915_bind_fs_state;
829 i915->base.delete_fs_state = i915_delete_fs_state;
830 i915->base.create_vs_state = i915_create_vs_state;
831 i915->base.bind_vs_state = i915_bind_vs_state;
832 i915->base.delete_vs_state = i915_delete_vs_state;
833 i915->base.create_vertex_elements_state = i915_create_vertex_elements_state;
834 i915->base.bind_vertex_elements_state = i915_bind_vertex_elements_state;
835 i915->base.delete_vertex_elements_state = i915_delete_vertex_elements_state;
836
837 i915->base.set_blend_color = i915_set_blend_color;
838 i915->base.set_stencil_ref = i915_set_stencil_ref;
839 i915->base.set_clip_state = i915_set_clip_state;
840 i915->base.set_constant_buffer = i915_set_constant_buffer;
841 i915->base.set_framebuffer_state = i915_set_framebuffer_state;
842
843 i915->base.set_polygon_stipple = i915_set_polygon_stipple;
844 i915->base.set_scissor_state = i915_set_scissor_state;
845 i915->base.set_fragment_sampler_views = i915_set_fragment_sampler_views;
846 i915->base.create_sampler_view = i915_create_sampler_view;
847 i915->base.sampler_view_destroy = i915_sampler_view_destroy;
848 i915->base.set_viewport_state = i915_set_viewport_state;
849 i915->base.set_vertex_buffers = i915_set_vertex_buffers;
850 }