1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 /* Authors: Keith Whitwell <keith@tungstengraphics.com>
32 #include "draw/draw_context.h"
33 #include "util/u_inlines.h"
34 #include "util/u_math.h"
35 #include "util/u_memory.h"
36 #include "tgsi/tgsi_parse.h"
38 #include "i915_context.h"
40 #include "i915_state_inlines.h"
42 #include "i915_resource.h"
44 /* The i915 (and related graphics cores) do not support GL_CLAMP. The
45 * Intel drivers for "other operating systems" implement GL_CLAMP as
46 * GL_CLAMP_TO_EDGE, so the same is done here.
49 translate_wrap_mode(unsigned wrap
)
52 case PIPE_TEX_WRAP_REPEAT
:
53 return TEXCOORDMODE_WRAP
;
54 case PIPE_TEX_WRAP_CLAMP
:
55 return TEXCOORDMODE_CLAMP_EDGE
; /* not quite correct */
56 case PIPE_TEX_WRAP_CLAMP_TO_EDGE
:
57 return TEXCOORDMODE_CLAMP_EDGE
;
58 case PIPE_TEX_WRAP_CLAMP_TO_BORDER
:
59 return TEXCOORDMODE_CLAMP_BORDER
;
61 case PIPE_TEX_WRAP_MIRRORED_REPEAT:
62 return TEXCOORDMODE_MIRROR;
65 return TEXCOORDMODE_WRAP
;
69 static unsigned translate_img_filter( unsigned filter
)
72 case PIPE_TEX_FILTER_NEAREST
:
73 return FILTER_NEAREST
;
74 case PIPE_TEX_FILTER_LINEAR
:
78 return FILTER_NEAREST
;
82 static unsigned translate_mip_filter( unsigned filter
)
85 case PIPE_TEX_MIPFILTER_NONE
:
86 return MIPFILTER_NONE
;
87 case PIPE_TEX_MIPFILTER_NEAREST
:
88 return MIPFILTER_NEAREST
;
89 case PIPE_TEX_MIPFILTER_LINEAR
:
90 return MIPFILTER_LINEAR
;
93 return MIPFILTER_NONE
;
98 /* None of this state is actually used for anything yet.
101 i915_create_blend_state(struct pipe_context
*pipe
,
102 const struct pipe_blend_state
*blend
)
104 struct i915_blend_state
*cso_data
= CALLOC_STRUCT( i915_blend_state
);
107 unsigned eqRGB
= blend
->rt
[0].rgb_func
;
108 unsigned srcRGB
= blend
->rt
[0].rgb_src_factor
;
109 unsigned dstRGB
= blend
->rt
[0].rgb_dst_factor
;
111 unsigned eqA
= blend
->rt
[0].alpha_func
;
112 unsigned srcA
= blend
->rt
[0].alpha_src_factor
;
113 unsigned dstA
= blend
->rt
[0].alpha_dst_factor
;
115 /* Special handling for MIN/MAX filter modes handled at
116 * state_tracker level.
119 if (srcA
!= srcRGB
||
123 cso_data
->iab
= (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD
|
127 IAB_MODIFY_SRC_FACTOR
|
128 IAB_MODIFY_DST_FACTOR
|
129 SRC_ABLND_FACT(i915_translate_blend_factor(srcA
)) |
130 DST_ABLND_FACT(i915_translate_blend_factor(dstA
)) |
131 (i915_translate_blend_func(eqA
) << IAB_FUNC_SHIFT
));
134 cso_data
->iab
= (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD
|
140 cso_data
->modes4
|= (_3DSTATE_MODES_4_CMD
|
141 ENABLE_LOGIC_OP_FUNC
|
142 LOGIC_OP_FUNC(i915_translate_logic_op(blend
->logicop_func
)));
144 if (blend
->logicop_enable
)
145 cso_data
->LIS5
|= S5_LOGICOP_ENABLE
;
148 cso_data
->LIS5
|= S5_COLOR_DITHER_ENABLE
;
150 if ((blend
->rt
[0].colormask
& PIPE_MASK_R
) == 0)
151 cso_data
->LIS5
|= S5_WRITEDISABLE_RED
;
153 if ((blend
->rt
[0].colormask
& PIPE_MASK_G
) == 0)
154 cso_data
->LIS5
|= S5_WRITEDISABLE_GREEN
;
156 if ((blend
->rt
[0].colormask
& PIPE_MASK_B
) == 0)
157 cso_data
->LIS5
|= S5_WRITEDISABLE_BLUE
;
159 if ((blend
->rt
[0].colormask
& PIPE_MASK_A
) == 0)
160 cso_data
->LIS5
|= S5_WRITEDISABLE_ALPHA
;
162 if (blend
->rt
[0].blend_enable
) {
163 unsigned funcRGB
= blend
->rt
[0].rgb_func
;
164 unsigned srcRGB
= blend
->rt
[0].rgb_src_factor
;
165 unsigned dstRGB
= blend
->rt
[0].rgb_dst_factor
;
167 cso_data
->LIS6
|= (S6_CBUF_BLEND_ENABLE
|
168 SRC_BLND_FACT(i915_translate_blend_factor(srcRGB
)) |
169 DST_BLND_FACT(i915_translate_blend_factor(dstRGB
)) |
170 (i915_translate_blend_func(funcRGB
) << S6_CBUF_BLEND_FUNC_SHIFT
));
176 static void i915_bind_blend_state(struct pipe_context
*pipe
,
179 struct i915_context
*i915
= i915_context(pipe
);
180 draw_flush(i915
->draw
);
182 i915
->blend
= (struct i915_blend_state
*)blend
;
184 i915
->dirty
|= I915_NEW_BLEND
;
188 static void i915_delete_blend_state(struct pipe_context
*pipe
, void *blend
)
193 static void i915_set_blend_color( struct pipe_context
*pipe
,
194 const struct pipe_blend_color
*blend_color
)
196 struct i915_context
*i915
= i915_context(pipe
);
197 draw_flush(i915
->draw
);
199 i915
->blend_color
= *blend_color
;
201 i915
->dirty
|= I915_NEW_BLEND
;
204 static void i915_set_stencil_ref( struct pipe_context
*pipe
,
205 const struct pipe_stencil_ref
*stencil_ref
)
207 struct i915_context
*i915
= i915_context(pipe
);
208 draw_flush(i915
->draw
);
210 i915
->stencil_ref
= *stencil_ref
;
212 i915
->dirty
|= I915_NEW_DEPTH_STENCIL
;
216 i915_create_sampler_state(struct pipe_context
*pipe
,
217 const struct pipe_sampler_state
*sampler
)
219 struct i915_sampler_state
*cso
= CALLOC_STRUCT( i915_sampler_state
);
220 const unsigned ws
= sampler
->wrap_s
;
221 const unsigned wt
= sampler
->wrap_t
;
222 const unsigned wr
= sampler
->wrap_r
;
223 unsigned minFilt
, magFilt
;
226 cso
->templ
= sampler
;
228 mipFilt
= translate_mip_filter(sampler
->min_mip_filter
);
229 minFilt
= translate_img_filter( sampler
->min_img_filter
);
230 magFilt
= translate_img_filter( sampler
->mag_img_filter
);
232 if (sampler
->max_anisotropy
> 1)
233 minFilt
= magFilt
= FILTER_ANISOTROPIC
;
235 if (sampler
->max_anisotropy
> 2) {
236 cso
->state
[0] |= SS2_MAX_ANISO_4
;
240 int b
= (int) (sampler
->lod_bias
* 16.0);
241 b
= CLAMP(b
, -256, 255);
242 cso
->state
[0] |= ((b
<< SS2_LOD_BIAS_SHIFT
) & SS2_LOD_BIAS_MASK
);
247 if (sampler
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
)
249 cso
->state
[0] |= (SS2_SHADOW_ENABLE
|
250 i915_translate_compare_func(sampler
->compare_func
));
252 minFilt
= FILTER_4X4_FLAT
;
253 magFilt
= FILTER_4X4_FLAT
;
256 cso
->state
[0] |= ((minFilt
<< SS2_MIN_FILTER_SHIFT
) |
257 (mipFilt
<< SS2_MIP_FILTER_SHIFT
) |
258 (magFilt
<< SS2_MAG_FILTER_SHIFT
));
261 ((translate_wrap_mode(ws
) << SS3_TCX_ADDR_MODE_SHIFT
) |
262 (translate_wrap_mode(wt
) << SS3_TCY_ADDR_MODE_SHIFT
) |
263 (translate_wrap_mode(wr
) << SS3_TCZ_ADDR_MODE_SHIFT
));
265 if (sampler
->normalized_coords
)
266 cso
->state
[1] |= SS3_NORMALIZED_COORDS
;
269 int minlod
= (int) (16.0 * sampler
->min_lod
);
270 int maxlod
= (int) (16.0 * sampler
->max_lod
);
271 minlod
= CLAMP(minlod
, 0, 16 * 11);
272 maxlod
= CLAMP(maxlod
, 0, 16 * 11);
277 cso
->minlod
= minlod
;
278 cso
->maxlod
= maxlod
;
282 ubyte r
= float_to_ubyte(sampler
->border_color
[0]);
283 ubyte g
= float_to_ubyte(sampler
->border_color
[1]);
284 ubyte b
= float_to_ubyte(sampler
->border_color
[2]);
285 ubyte a
= float_to_ubyte(sampler
->border_color
[3]);
286 cso
->state
[2] = I915PACKCOLOR8888(r
, g
, b
, a
);
291 static void i915_bind_sampler_states(struct pipe_context
*pipe
,
292 unsigned num
, void **sampler
)
294 struct i915_context
*i915
= i915_context(pipe
);
297 /* Check for no-op */
298 if (num
== i915
->num_samplers
&&
299 !memcmp(i915
->sampler
, sampler
, num
* sizeof(void *)))
302 draw_flush(i915
->draw
);
304 for (i
= 0; i
< num
; ++i
)
305 i915
->sampler
[i
] = sampler
[i
];
306 for (i
= num
; i
< PIPE_MAX_SAMPLERS
; ++i
)
307 i915
->sampler
[i
] = NULL
;
309 i915
->num_samplers
= num
;
311 i915
->dirty
|= I915_NEW_SAMPLER
;
314 static void i915_delete_sampler_state(struct pipe_context
*pipe
,
321 /** XXX move someday? Or consolidate all these simple state setters
326 i915_create_depth_stencil_state(struct pipe_context
*pipe
,
327 const struct pipe_depth_stencil_alpha_state
*depth_stencil
)
329 struct i915_depth_stencil_state
*cso
= CALLOC_STRUCT( i915_depth_stencil_state
);
332 int testmask
= depth_stencil
->stencil
[0].valuemask
& 0xff;
333 int writemask
= depth_stencil
->stencil
[0].writemask
& 0xff;
335 cso
->stencil_modes4
|= (_3DSTATE_MODES_4_CMD
|
336 ENABLE_STENCIL_TEST_MASK
|
337 STENCIL_TEST_MASK(testmask
) |
338 ENABLE_STENCIL_WRITE_MASK
|
339 STENCIL_WRITE_MASK(writemask
));
342 if (depth_stencil
->stencil
[0].enabled
) {
343 int test
= i915_translate_compare_func(depth_stencil
->stencil
[0].func
);
344 int fop
= i915_translate_stencil_op(depth_stencil
->stencil
[0].fail_op
);
345 int dfop
= i915_translate_stencil_op(depth_stencil
->stencil
[0].zfail_op
);
346 int dpop
= i915_translate_stencil_op(depth_stencil
->stencil
[0].zpass_op
);
348 cso
->stencil_LIS5
|= (S5_STENCIL_TEST_ENABLE
|
349 S5_STENCIL_WRITE_ENABLE
|
350 (test
<< S5_STENCIL_TEST_FUNC_SHIFT
) |
351 (fop
<< S5_STENCIL_FAIL_SHIFT
) |
352 (dfop
<< S5_STENCIL_PASS_Z_FAIL_SHIFT
) |
353 (dpop
<< S5_STENCIL_PASS_Z_PASS_SHIFT
));
356 if (depth_stencil
->stencil
[1].enabled
) {
357 int test
= i915_translate_compare_func(depth_stencil
->stencil
[1].func
);
358 int fop
= i915_translate_stencil_op(depth_stencil
->stencil
[1].fail_op
);
359 int dfop
= i915_translate_stencil_op(depth_stencil
->stencil
[1].zfail_op
);
360 int dpop
= i915_translate_stencil_op(depth_stencil
->stencil
[1].zpass_op
);
361 int tmask
= depth_stencil
->stencil
[1].valuemask
& 0xff;
362 int wmask
= depth_stencil
->stencil
[1].writemask
& 0xff;
364 cso
->bfo
[0] = (_3DSTATE_BACKFACE_STENCIL_OPS
|
365 BFO_ENABLE_STENCIL_FUNCS
|
366 BFO_ENABLE_STENCIL_TWO_SIDE
|
367 BFO_ENABLE_STENCIL_REF
|
368 BFO_STENCIL_TWO_SIDE
|
369 (test
<< BFO_STENCIL_TEST_SHIFT
) |
370 (fop
<< BFO_STENCIL_FAIL_SHIFT
) |
371 (dfop
<< BFO_STENCIL_PASS_Z_FAIL_SHIFT
) |
372 (dpop
<< BFO_STENCIL_PASS_Z_PASS_SHIFT
));
374 cso
->bfo
[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS
|
375 BFM_ENABLE_STENCIL_TEST_MASK
|
376 BFM_ENABLE_STENCIL_WRITE_MASK
|
377 (tmask
<< BFM_STENCIL_TEST_MASK_SHIFT
) |
378 (wmask
<< BFM_STENCIL_WRITE_MASK_SHIFT
));
381 /* This actually disables two-side stencil: The bit set is a
382 * modify-enable bit to indicate we are changing the two-side
383 * setting. Then there is a symbolic zero to show that we are
384 * setting the flag to zero/off.
386 cso
->bfo
[0] = (_3DSTATE_BACKFACE_STENCIL_OPS
|
387 BFO_ENABLE_STENCIL_TWO_SIDE
|
392 if (depth_stencil
->depth
.enabled
) {
393 int func
= i915_translate_compare_func(depth_stencil
->depth
.func
);
395 cso
->depth_LIS6
|= (S6_DEPTH_TEST_ENABLE
|
396 (func
<< S6_DEPTH_TEST_FUNC_SHIFT
));
398 if (depth_stencil
->depth
.writemask
)
399 cso
->depth_LIS6
|= S6_DEPTH_WRITE_ENABLE
;
402 if (depth_stencil
->alpha
.enabled
) {
403 int test
= i915_translate_compare_func(depth_stencil
->alpha
.func
);
404 ubyte refByte
= float_to_ubyte(depth_stencil
->alpha
.ref_value
);
406 cso
->depth_LIS6
|= (S6_ALPHA_TEST_ENABLE
|
407 (test
<< S6_ALPHA_TEST_FUNC_SHIFT
) |
408 (((unsigned) refByte
) << S6_ALPHA_REF_SHIFT
));
414 static void i915_bind_depth_stencil_state(struct pipe_context
*pipe
,
417 struct i915_context
*i915
= i915_context(pipe
);
418 draw_flush(i915
->draw
);
420 i915
->depth_stencil
= (const struct i915_depth_stencil_state
*)depth_stencil
;
422 i915
->dirty
|= I915_NEW_DEPTH_STENCIL
;
425 static void i915_delete_depth_stencil_state(struct pipe_context
*pipe
,
432 static void i915_set_scissor_state( struct pipe_context
*pipe
,
433 const struct pipe_scissor_state
*scissor
)
435 struct i915_context
*i915
= i915_context(pipe
);
436 draw_flush(i915
->draw
);
438 memcpy( &i915
->scissor
, scissor
, sizeof(*scissor
) );
439 i915
->dirty
|= I915_NEW_SCISSOR
;
443 static void i915_set_polygon_stipple( struct pipe_context
*pipe
,
444 const struct pipe_poly_stipple
*stipple
)
451 i915_create_fs_state(struct pipe_context
*pipe
,
452 const struct pipe_shader_state
*templ
)
454 struct i915_context
*i915
= i915_context(pipe
);
455 struct i915_fragment_shader
*ifs
= CALLOC_STRUCT(i915_fragment_shader
);
459 ifs
->state
.tokens
= tgsi_dup_tokens(templ
->tokens
);
461 tgsi_scan_shader(templ
->tokens
, &ifs
->info
);
463 /* The shader's compiled to i915 instructions here */
464 i915_translate_fragment_program(i915
, ifs
);
470 i915_bind_fs_state(struct pipe_context
*pipe
, void *shader
)
472 struct i915_context
*i915
= i915_context(pipe
);
473 draw_flush(i915
->draw
);
475 i915
->fs
= (struct i915_fragment_shader
*) shader
;
477 i915
->dirty
|= I915_NEW_FS
;
481 void i915_delete_fs_state(struct pipe_context
*pipe
, void *shader
)
483 struct i915_fragment_shader
*ifs
= (struct i915_fragment_shader
*) shader
;
487 ifs
->program_len
= 0;
489 FREE((struct tgsi_token
*)ifs
->state
.tokens
);
496 i915_create_vs_state(struct pipe_context
*pipe
,
497 const struct pipe_shader_state
*templ
)
499 struct i915_context
*i915
= i915_context(pipe
);
501 /* just pass-through to draw module */
502 return draw_create_vertex_shader(i915
->draw
, templ
);
505 static void i915_bind_vs_state(struct pipe_context
*pipe
, void *shader
)
507 struct i915_context
*i915
= i915_context(pipe
);
509 /* just pass-through to draw module */
510 draw_bind_vertex_shader(i915
->draw
, (struct draw_vertex_shader
*) shader
);
512 i915
->dirty
|= I915_NEW_VS
;
515 static void i915_delete_vs_state(struct pipe_context
*pipe
, void *shader
)
517 struct i915_context
*i915
= i915_context(pipe
);
519 /* just pass-through to draw module */
520 draw_delete_vertex_shader(i915
->draw
, (struct draw_vertex_shader
*) shader
);
523 static void i915_set_constant_buffer(struct pipe_context
*pipe
,
524 uint shader
, uint index
,
525 struct pipe_resource
*buf
)
527 struct i915_context
*i915
= i915_context(pipe
);
528 unsigned new_num
= 0;
532 /* XXX don't support geom shaders now */
533 if (shader
== PIPE_SHADER_GEOMETRY
)
536 /* if we have a new buffer compare it with the old one */
538 struct i915_buffer
*ibuf
= i915_buffer(buf
);
539 struct pipe_resource
*old_buf
= i915
->constants
[shader
];
540 struct i915_buffer
*old
= old_buf
? i915_buffer(old_buf
) : NULL
;
541 unsigned old_num
= i915
->current
.num_user_constants
[shader
];
543 new_num
= ibuf
->b
.b
.width0
/ 4 * sizeof(float);
545 if (old_num
== new_num
) {
549 /* XXX no point in running this code since st/mesa only uses user buffers */
550 /* Can't compare the buffer data since they are userbuffers */
551 else if (old
&& old
->free_on_destroy
)
552 diff
= memcmp(old
->data
, ibuf
->data
, ibuf
->b
.b
.width0
);
558 diff
= i915
->current
.num_user_constants
[shader
] != 0;
562 * flush before updateing the state.
564 if (diff
&& shader
== PIPE_SHADER_FRAGMENT
)
565 draw_flush(i915
->draw
);
567 pipe_resource_reference(&i915
->constants
[shader
], buf
);
568 i915
->current
.num_user_constants
[shader
] = new_num
;
571 i915
->dirty
|= shader
== PIPE_SHADER_VERTEX
? I915_NEW_VS_CONSTANTS
: I915_NEW_FS_CONSTANTS
;
575 static void i915_set_fragment_sampler_views(struct pipe_context
*pipe
,
577 struct pipe_sampler_view
**views
)
579 struct i915_context
*i915
= i915_context(pipe
);
582 assert(num
<= PIPE_MAX_SAMPLERS
);
584 /* Check for no-op */
585 if (num
== i915
->num_fragment_sampler_views
&&
586 !memcmp(i915
->fragment_sampler_views
, views
, num
* sizeof(struct pipe_sampler_view
*)))
589 /* Fixes wrong texture in texobj with VBUF */
590 draw_flush(i915
->draw
);
592 for (i
= 0; i
< num
; i
++)
593 pipe_sampler_view_reference(&i915
->fragment_sampler_views
[i
],
596 for (i
= num
; i
< i915
->num_fragment_sampler_views
; i
++)
597 pipe_sampler_view_reference(&i915
->fragment_sampler_views
[i
],
600 i915
->num_fragment_sampler_views
= num
;
602 i915
->dirty
|= I915_NEW_SAMPLER_VIEW
;
606 static struct pipe_sampler_view
*
607 i915_create_sampler_view(struct pipe_context
*pipe
,
608 struct pipe_resource
*texture
,
609 const struct pipe_sampler_view
*templ
)
611 struct pipe_sampler_view
*view
= CALLOC_STRUCT(pipe_sampler_view
);
615 view
->reference
.count
= 1;
616 view
->texture
= NULL
;
617 pipe_resource_reference(&view
->texture
, texture
);
618 view
->context
= pipe
;
626 i915_sampler_view_destroy(struct pipe_context
*pipe
,
627 struct pipe_sampler_view
*view
)
629 pipe_resource_reference(&view
->texture
, NULL
);
634 static void i915_set_framebuffer_state(struct pipe_context
*pipe
,
635 const struct pipe_framebuffer_state
*fb
)
637 struct i915_context
*i915
= i915_context(pipe
);
640 draw_flush(i915
->draw
);
642 i915
->framebuffer
.width
= fb
->width
;
643 i915
->framebuffer
.height
= fb
->height
;
644 i915
->framebuffer
.nr_cbufs
= fb
->nr_cbufs
;
645 for (i
= 0; i
< PIPE_MAX_COLOR_BUFS
; i
++) {
646 pipe_surface_reference(&i915
->framebuffer
.cbufs
[i
], fb
->cbufs
[i
]);
648 pipe_surface_reference(&i915
->framebuffer
.zsbuf
, fb
->zsbuf
);
650 i915
->dirty
|= I915_NEW_FRAMEBUFFER
;
655 static void i915_set_clip_state( struct pipe_context
*pipe
,
656 const struct pipe_clip_state
*clip
)
658 struct i915_context
*i915
= i915_context(pipe
);
659 draw_flush(i915
->draw
);
661 draw_set_clip_state(i915
->draw
, clip
);
663 i915
->dirty
|= I915_NEW_CLIP
;
668 /* Called when driver state tracker notices changes to the viewport
671 static void i915_set_viewport_state( struct pipe_context
*pipe
,
672 const struct pipe_viewport_state
*viewport
)
674 struct i915_context
*i915
= i915_context(pipe
);
676 i915
->viewport
= *viewport
; /* struct copy */
678 /* pass the viewport info to the draw module */
679 draw_set_viewport_state(i915
->draw
, &i915
->viewport
);
681 i915
->dirty
|= I915_NEW_VIEWPORT
;
686 i915_create_rasterizer_state(struct pipe_context
*pipe
,
687 const struct pipe_rasterizer_state
*rasterizer
)
689 struct i915_rasterizer_state
*cso
= CALLOC_STRUCT( i915_rasterizer_state
);
691 cso
->templ
= rasterizer
;
692 cso
->color_interp
= rasterizer
->flatshade
? INTERP_CONSTANT
: INTERP_LINEAR
;
693 cso
->light_twoside
= rasterizer
->light_twoside
;
694 cso
->ds
[0].u
= _3DSTATE_DEPTH_OFFSET_SCALE
;
695 cso
->ds
[1].f
= rasterizer
->offset_scale
;
696 if (rasterizer
->poly_stipple_enable
) {
697 cso
->st
|= ST1_ENABLE
;
700 if (rasterizer
->scissor
)
701 cso
->sc
[0] = _3DSTATE_SCISSOR_ENABLE_CMD
| ENABLE_SCISSOR_RECT
;
703 cso
->sc
[0] = _3DSTATE_SCISSOR_ENABLE_CMD
| DISABLE_SCISSOR_RECT
;
705 switch (rasterizer
->cull_face
) {
707 cso
->LIS4
|= S4_CULLMODE_NONE
;
709 case PIPE_FACE_FRONT
:
710 if (rasterizer
->front_ccw
)
711 cso
->LIS4
|= S4_CULLMODE_CCW
;
713 cso
->LIS4
|= S4_CULLMODE_CW
;
716 if (rasterizer
->front_ccw
)
717 cso
->LIS4
|= S4_CULLMODE_CW
;
719 cso
->LIS4
|= S4_CULLMODE_CCW
;
721 case PIPE_FACE_FRONT_AND_BACK
:
722 cso
->LIS4
|= S4_CULLMODE_BOTH
;
727 int line_width
= CLAMP((int)(rasterizer
->line_width
* 2), 1, 0xf);
729 cso
->LIS4
|= line_width
<< S4_LINE_WIDTH_SHIFT
;
731 if (rasterizer
->line_smooth
)
732 cso
->LIS4
|= S4_LINE_ANTIALIAS_ENABLE
;
736 int point_size
= CLAMP((int) rasterizer
->point_size
, 1, 0xff);
738 cso
->LIS4
|= point_size
<< S4_POINT_WIDTH_SHIFT
;
741 if (rasterizer
->flatshade
) {
742 cso
->LIS4
|= (S4_FLATSHADE_ALPHA
|
744 S4_FLATSHADE_SPECULAR
);
747 cso
->LIS7
= fui( rasterizer
->offset_units
);
753 static void i915_bind_rasterizer_state( struct pipe_context
*pipe
,
756 struct i915_context
*i915
= i915_context(pipe
);
758 i915
->rasterizer
= (struct i915_rasterizer_state
*)raster
;
760 /* pass-through to draw module */
761 draw_set_rasterizer_state(i915
->draw
,
762 (i915
->rasterizer
? i915
->rasterizer
->templ
: NULL
),
765 i915
->dirty
|= I915_NEW_RASTERIZER
;
768 static void i915_delete_rasterizer_state(struct pipe_context
*pipe
,
774 static void i915_set_vertex_buffers(struct pipe_context
*pipe
,
776 const struct pipe_vertex_buffer
*buffers
)
778 struct i915_context
*i915
= i915_context(pipe
);
779 struct draw_context
*draw
= i915
->draw
;
783 /* XXX doesn't look like this is needed */
785 for (i
= 0; i
< i915
->num_vertex_buffers
; i
++) {
786 draw_set_mapped_vertex_buffer(draw
, i
, NULL
);
790 /* pass-through to draw module */
791 draw_set_vertex_buffers(draw
, count
, buffers
);
794 for (i
= 0; i
< count
; i
++) {
795 void *buf
= i915_buffer(buffers
[i
].buffer
)->data
;
796 draw_set_mapped_vertex_buffer(draw
, i
, buf
);
801 i915_create_vertex_elements_state(struct pipe_context
*pipe
,
803 const struct pipe_vertex_element
*attribs
)
805 struct i915_velems_state
*velems
;
806 assert(count
<= PIPE_MAX_ATTRIBS
);
807 velems
= (struct i915_velems_state
*) MALLOC(sizeof(struct i915_velems_state
));
809 velems
->count
= count
;
810 memcpy(velems
->velem
, attribs
, sizeof(*attribs
) * count
);
816 i915_bind_vertex_elements_state(struct pipe_context
*pipe
,
819 struct i915_context
*i915
= i915_context(pipe
);
820 struct i915_velems_state
*i915_velems
= (struct i915_velems_state
*) velems
;
822 /* pass-through to draw module */
824 draw_set_vertex_elements(i915
->draw
,
825 i915_velems
->count
, i915_velems
->velem
);
830 i915_delete_vertex_elements_state(struct pipe_context
*pipe
, void *velems
)
835 static void i915_set_index_buffer(struct pipe_context
*pipe
,
836 const struct pipe_index_buffer
*ib
)
838 struct i915_context
*i915
= i915_context(pipe
);
841 memcpy(&i915
->index_buffer
, ib
, sizeof(i915
->index_buffer
));
843 memset(&i915
->index_buffer
, 0, sizeof(i915
->index_buffer
));
845 /* pass-through to draw module */
846 draw_set_index_buffer(i915
->draw
, ib
);
850 i915_set_sample_mask(struct pipe_context
*pipe
,
851 unsigned sample_mask
)
856 i915_init_state_functions( struct i915_context
*i915
)
858 i915
->base
.create_blend_state
= i915_create_blend_state
;
859 i915
->base
.bind_blend_state
= i915_bind_blend_state
;
860 i915
->base
.delete_blend_state
= i915_delete_blend_state
;
862 i915
->base
.create_sampler_state
= i915_create_sampler_state
;
863 i915
->base
.bind_fragment_sampler_states
= i915_bind_sampler_states
;
864 i915
->base
.delete_sampler_state
= i915_delete_sampler_state
;
866 i915
->base
.create_depth_stencil_alpha_state
= i915_create_depth_stencil_state
;
867 i915
->base
.bind_depth_stencil_alpha_state
= i915_bind_depth_stencil_state
;
868 i915
->base
.delete_depth_stencil_alpha_state
= i915_delete_depth_stencil_state
;
870 i915
->base
.create_rasterizer_state
= i915_create_rasterizer_state
;
871 i915
->base
.bind_rasterizer_state
= i915_bind_rasterizer_state
;
872 i915
->base
.delete_rasterizer_state
= i915_delete_rasterizer_state
;
873 i915
->base
.create_fs_state
= i915_create_fs_state
;
874 i915
->base
.bind_fs_state
= i915_bind_fs_state
;
875 i915
->base
.delete_fs_state
= i915_delete_fs_state
;
876 i915
->base
.create_vs_state
= i915_create_vs_state
;
877 i915
->base
.bind_vs_state
= i915_bind_vs_state
;
878 i915
->base
.delete_vs_state
= i915_delete_vs_state
;
879 i915
->base
.create_vertex_elements_state
= i915_create_vertex_elements_state
;
880 i915
->base
.bind_vertex_elements_state
= i915_bind_vertex_elements_state
;
881 i915
->base
.delete_vertex_elements_state
= i915_delete_vertex_elements_state
;
883 i915
->base
.set_blend_color
= i915_set_blend_color
;
884 i915
->base
.set_stencil_ref
= i915_set_stencil_ref
;
885 i915
->base
.set_clip_state
= i915_set_clip_state
;
886 i915
->base
.set_sample_mask
= i915_set_sample_mask
;
887 i915
->base
.set_constant_buffer
= i915_set_constant_buffer
;
888 i915
->base
.set_framebuffer_state
= i915_set_framebuffer_state
;
890 i915
->base
.set_polygon_stipple
= i915_set_polygon_stipple
;
891 i915
->base
.set_scissor_state
= i915_set_scissor_state
;
892 i915
->base
.set_fragment_sampler_views
= i915_set_fragment_sampler_views
;
893 i915
->base
.create_sampler_view
= i915_create_sampler_view
;
894 i915
->base
.sampler_view_destroy
= i915_sampler_view_destroy
;
895 i915
->base
.set_viewport_state
= i915_set_viewport_state
;
896 i915
->base
.set_vertex_buffers
= i915_set_vertex_buffers
;
897 i915
->base
.set_index_buffer
= i915_set_index_buffer
;