i915g: implement pipe_context::bind_sampler_states()
[mesa.git] / src / gallium / drivers / i915 / i915_state.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
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11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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27
28 /* Authors: Keith Whitwell <keith@tungstengraphics.com>
29 */
30
31
32 #include "draw/draw_context.h"
33 #include "util/u_helpers.h"
34 #include "util/u_inlines.h"
35 #include "util/u_math.h"
36 #include "util/u_memory.h"
37 #include "util/u_transfer.h"
38 #include "tgsi/tgsi_parse.h"
39
40 #include "i915_context.h"
41 #include "i915_reg.h"
42 #include "i915_state_inlines.h"
43 #include "i915_fpc.h"
44 #include "i915_resource.h"
45
46 /* The i915 (and related graphics cores) do not support GL_CLAMP. The
47 * Intel drivers for "other operating systems" implement GL_CLAMP as
48 * GL_CLAMP_TO_EDGE, so the same is done here.
49 */
50 static unsigned
51 translate_wrap_mode(unsigned wrap)
52 {
53 switch (wrap) {
54 case PIPE_TEX_WRAP_REPEAT:
55 return TEXCOORDMODE_WRAP;
56 case PIPE_TEX_WRAP_CLAMP:
57 return TEXCOORDMODE_CLAMP_EDGE; /* not quite correct */
58 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
59 return TEXCOORDMODE_CLAMP_EDGE;
60 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
61 return TEXCOORDMODE_CLAMP_BORDER;
62 case PIPE_TEX_WRAP_MIRROR_REPEAT:
63 return TEXCOORDMODE_MIRROR;
64 default:
65 return TEXCOORDMODE_WRAP;
66 }
67 }
68
69 static unsigned translate_img_filter( unsigned filter )
70 {
71 switch (filter) {
72 case PIPE_TEX_FILTER_NEAREST:
73 return FILTER_NEAREST;
74 case PIPE_TEX_FILTER_LINEAR:
75 return FILTER_LINEAR;
76 default:
77 assert(0);
78 return FILTER_NEAREST;
79 }
80 }
81
82 static unsigned translate_mip_filter( unsigned filter )
83 {
84 switch (filter) {
85 case PIPE_TEX_MIPFILTER_NONE:
86 return MIPFILTER_NONE;
87 case PIPE_TEX_MIPFILTER_NEAREST:
88 return MIPFILTER_NEAREST;
89 case PIPE_TEX_MIPFILTER_LINEAR:
90 return MIPFILTER_LINEAR;
91 default:
92 assert(0);
93 return MIPFILTER_NONE;
94 }
95 }
96
97 /* None of this state is actually used for anything yet.
98 */
99 static void *
100 i915_create_blend_state(struct pipe_context *pipe,
101 const struct pipe_blend_state *blend)
102 {
103 struct i915_blend_state *cso_data = CALLOC_STRUCT( i915_blend_state );
104
105 {
106 unsigned eqRGB = blend->rt[0].rgb_func;
107 unsigned srcRGB = blend->rt[0].rgb_src_factor;
108 unsigned dstRGB = blend->rt[0].rgb_dst_factor;
109
110 unsigned eqA = blend->rt[0].alpha_func;
111 unsigned srcA = blend->rt[0].alpha_src_factor;
112 unsigned dstA = blend->rt[0].alpha_dst_factor;
113
114 /* Special handling for MIN/MAX filter modes handled at
115 * state_tracker level.
116 */
117
118 if (srcA != srcRGB ||
119 dstA != dstRGB ||
120 eqA != eqRGB) {
121
122 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
123 IAB_MODIFY_ENABLE |
124 IAB_ENABLE |
125 IAB_MODIFY_FUNC |
126 IAB_MODIFY_SRC_FACTOR |
127 IAB_MODIFY_DST_FACTOR |
128 SRC_ABLND_FACT(i915_translate_blend_factor(srcA)) |
129 DST_ABLND_FACT(i915_translate_blend_factor(dstA)) |
130 (i915_translate_blend_func(eqA) << IAB_FUNC_SHIFT));
131 }
132 else {
133 cso_data->iab = (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
134 IAB_MODIFY_ENABLE |
135 0);
136 }
137 }
138
139 cso_data->modes4 |= (_3DSTATE_MODES_4_CMD |
140 ENABLE_LOGIC_OP_FUNC |
141 LOGIC_OP_FUNC(i915_translate_logic_op(blend->logicop_func)));
142
143 if (blend->logicop_enable)
144 cso_data->LIS5 |= S5_LOGICOP_ENABLE;
145
146 if (blend->dither)
147 cso_data->LIS5 |= S5_COLOR_DITHER_ENABLE;
148
149 /* We potentially do some fixup at emission for non-BGRA targets */
150 if ((blend->rt[0].colormask & PIPE_MASK_R) == 0)
151 cso_data->LIS5 |= S5_WRITEDISABLE_RED;
152
153 if ((blend->rt[0].colormask & PIPE_MASK_G) == 0)
154 cso_data->LIS5 |= S5_WRITEDISABLE_GREEN;
155
156 if ((blend->rt[0].colormask & PIPE_MASK_B) == 0)
157 cso_data->LIS5 |= S5_WRITEDISABLE_BLUE;
158
159 if ((blend->rt[0].colormask & PIPE_MASK_A) == 0)
160 cso_data->LIS5 |= S5_WRITEDISABLE_ALPHA;
161
162 if (blend->rt[0].blend_enable) {
163 unsigned funcRGB = blend->rt[0].rgb_func;
164 unsigned srcRGB = blend->rt[0].rgb_src_factor;
165 unsigned dstRGB = blend->rt[0].rgb_dst_factor;
166
167 cso_data->LIS6 |= (S6_CBUF_BLEND_ENABLE |
168 SRC_BLND_FACT(i915_translate_blend_factor(srcRGB)) |
169 DST_BLND_FACT(i915_translate_blend_factor(dstRGB)) |
170 (i915_translate_blend_func(funcRGB) << S6_CBUF_BLEND_FUNC_SHIFT));
171 }
172
173 return cso_data;
174 }
175
176 static void i915_bind_blend_state(struct pipe_context *pipe,
177 void *blend)
178 {
179 struct i915_context *i915 = i915_context(pipe);
180
181 if (i915->blend == blend)
182 return;
183
184 i915->blend = (struct i915_blend_state*)blend;
185
186 i915->dirty |= I915_NEW_BLEND;
187 }
188
189
190 static void i915_delete_blend_state(struct pipe_context *pipe, void *blend)
191 {
192 FREE(blend);
193 }
194
195 static void i915_set_blend_color( struct pipe_context *pipe,
196 const struct pipe_blend_color *blend_color )
197 {
198 struct i915_context *i915 = i915_context(pipe);
199
200 if (!blend_color)
201 return;
202
203 i915->blend_color = *blend_color;
204
205 i915->dirty |= I915_NEW_BLEND;
206 }
207
208 static void i915_set_stencil_ref( struct pipe_context *pipe,
209 const struct pipe_stencil_ref *stencil_ref )
210 {
211 struct i915_context *i915 = i915_context(pipe);
212
213 i915->stencil_ref = *stencil_ref;
214
215 i915->dirty |= I915_NEW_DEPTH_STENCIL;
216 }
217
218 static void *
219 i915_create_sampler_state(struct pipe_context *pipe,
220 const struct pipe_sampler_state *sampler)
221 {
222 struct i915_sampler_state *cso = CALLOC_STRUCT( i915_sampler_state );
223 const unsigned ws = sampler->wrap_s;
224 const unsigned wt = sampler->wrap_t;
225 const unsigned wr = sampler->wrap_r;
226 unsigned minFilt, magFilt;
227 unsigned mipFilt;
228
229 cso->templ = *sampler;
230
231 mipFilt = translate_mip_filter(sampler->min_mip_filter);
232 minFilt = translate_img_filter( sampler->min_img_filter );
233 magFilt = translate_img_filter( sampler->mag_img_filter );
234
235 if (sampler->max_anisotropy > 1)
236 minFilt = magFilt = FILTER_ANISOTROPIC;
237
238 if (sampler->max_anisotropy > 2) {
239 cso->state[0] |= SS2_MAX_ANISO_4;
240 }
241
242 {
243 int b = (int) (sampler->lod_bias * 16.0);
244 b = CLAMP(b, -256, 255);
245 cso->state[0] |= ((b << SS2_LOD_BIAS_SHIFT) & SS2_LOD_BIAS_MASK);
246 }
247
248 /* Shadow:
249 */
250 if (sampler->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE)
251 {
252 cso->state[0] |= (SS2_SHADOW_ENABLE |
253 i915_translate_shadow_compare_func(sampler->compare_func));
254
255 minFilt = FILTER_4X4_FLAT;
256 magFilt = FILTER_4X4_FLAT;
257 }
258
259 cso->state[0] |= ((minFilt << SS2_MIN_FILTER_SHIFT) |
260 (mipFilt << SS2_MIP_FILTER_SHIFT) |
261 (magFilt << SS2_MAG_FILTER_SHIFT));
262
263 cso->state[1] |=
264 ((translate_wrap_mode(ws) << SS3_TCX_ADDR_MODE_SHIFT) |
265 (translate_wrap_mode(wt) << SS3_TCY_ADDR_MODE_SHIFT) |
266 (translate_wrap_mode(wr) << SS3_TCZ_ADDR_MODE_SHIFT));
267
268 if (sampler->normalized_coords)
269 cso->state[1] |= SS3_NORMALIZED_COORDS;
270
271 {
272 int minlod = (int) (16.0 * sampler->min_lod);
273 int maxlod = (int) (16.0 * sampler->max_lod);
274 minlod = CLAMP(minlod, 0, 16 * 11);
275 maxlod = CLAMP(maxlod, 0, 16 * 11);
276
277 if (minlod > maxlod)
278 maxlod = minlod;
279
280 cso->minlod = minlod;
281 cso->maxlod = maxlod;
282 }
283
284 {
285 ubyte r = float_to_ubyte(sampler->border_color.f[0]);
286 ubyte g = float_to_ubyte(sampler->border_color.f[1]);
287 ubyte b = float_to_ubyte(sampler->border_color.f[2]);
288 ubyte a = float_to_ubyte(sampler->border_color.f[3]);
289 cso->state[2] = I915PACKCOLOR8888(r, g, b, a);
290 }
291 return cso;
292 }
293
294 static void
295 i915_bind_vertex_sampler_states(struct pipe_context *pipe,
296 unsigned num_samplers,
297 void **samplers)
298 {
299 struct i915_context *i915 = i915_context(pipe);
300 unsigned i;
301
302 assert(num_samplers <= Elements(i915->vertex_samplers));
303
304 /* Check for no-op */
305 if (num_samplers == i915->num_vertex_samplers &&
306 !memcmp(i915->vertex_samplers, samplers, num_samplers * sizeof(void *)))
307 return;
308
309 for (i = 0; i < num_samplers; ++i)
310 i915->vertex_samplers[i] = samplers[i];
311 for (i = num_samplers; i < Elements(i915->vertex_samplers); ++i)
312 i915->vertex_samplers[i] = NULL;
313
314 i915->num_vertex_samplers = num_samplers;
315
316 draw_set_samplers(i915->draw,
317 PIPE_SHADER_VERTEX,
318 i915->vertex_samplers,
319 i915->num_vertex_samplers);
320 }
321
322
323
324 static void i915_bind_fragment_sampler_states(struct pipe_context *pipe,
325 unsigned num, void **sampler)
326 {
327 struct i915_context *i915 = i915_context(pipe);
328 unsigned i;
329
330 /* Check for no-op */
331 if (num == i915->num_samplers &&
332 !memcmp(i915->sampler, sampler, num * sizeof(void *)))
333 return;
334
335 for (i = 0; i < num; ++i)
336 i915->sampler[i] = sampler[i];
337 for (i = num; i < PIPE_MAX_SAMPLERS; ++i)
338 i915->sampler[i] = NULL;
339
340 i915->num_samplers = num;
341
342 i915->dirty |= I915_NEW_SAMPLER;
343 }
344
345
346 static void
347 i915_bind_sampler_states(struct pipe_context *pipe, unsigned shader,
348 unsigned start, unsigned num_samplers,
349 void **samplers)
350 {
351 assert(start == 0);
352
353 switch (shader) {
354 case PIPE_SHADER_VERTEX:
355 i915_bind_vertex_sampler_states(pipe, num_samplers, samplers);
356 break;
357 case PIPE_SHADER_FRAGMENT:
358 i915_bind_fragment_sampler_states(pipe, num_samplers, samplers);
359 break;
360 default:
361 ;
362 }
363 }
364
365
366 static void i915_delete_sampler_state(struct pipe_context *pipe,
367 void *sampler)
368 {
369 FREE(sampler);
370 }
371
372
373 /**
374 * Called before drawing VBO to map vertex samplers and hand them to draw
375 */
376 void
377 i915_prepare_vertex_sampling(struct i915_context *i915)
378 {
379 struct i915_winsys *iws = i915->iws;
380 unsigned i,j;
381 uint32_t row_stride[PIPE_MAX_TEXTURE_LEVELS];
382 uint32_t img_stride[PIPE_MAX_TEXTURE_LEVELS];
383 uint32_t mip_offsets[PIPE_MAX_TEXTURE_LEVELS];
384 unsigned num = i915->num_vertex_sampler_views;
385 struct pipe_sampler_view **views = i915->vertex_sampler_views;
386
387 assert(num <= PIPE_MAX_SAMPLERS);
388 if (!num)
389 return;
390
391 for (i = 0; i < PIPE_MAX_SAMPLERS; i++) {
392 struct pipe_sampler_view *view = i < num ? views[i] : NULL;
393
394 if (view) {
395 struct pipe_resource *tex = view->texture;
396 struct i915_texture *i915_tex = i915_texture(tex);
397 ubyte *addr;
398
399 /* We're referencing the texture's internal data, so save a
400 * reference to it.
401 */
402 pipe_resource_reference(&i915->mapped_vs_tex[i], tex);
403
404 i915->mapped_vs_tex_buffer[i] = i915_tex->buffer;
405 addr = iws->buffer_map(iws,
406 i915_tex->buffer,
407 FALSE /* read only */);
408
409 /* Setup array of mipmap level pointers */
410 /* FIXME: handle 3D textures? */
411 for (j = view->u.tex.first_level; j <= tex->last_level; j++) {
412 mip_offsets[j] = i915_texture_offset(i915_tex, j , 0 /* FIXME depth */);
413 row_stride[j] = i915_tex->stride;
414 img_stride[j] = 0; /* FIXME */;
415 }
416
417 draw_set_mapped_texture(i915->draw,
418 PIPE_SHADER_VERTEX,
419 i,
420 tex->width0, tex->height0, tex->depth0,
421 view->u.tex.first_level, tex->last_level,
422 addr,
423 row_stride, img_stride, mip_offsets);
424 } else
425 i915->mapped_vs_tex[i] = NULL;
426 }
427 }
428
429 void
430 i915_cleanup_vertex_sampling(struct i915_context *i915)
431 {
432 struct i915_winsys *iws = i915->iws;
433 unsigned i;
434 for (i = 0; i < Elements(i915->mapped_vs_tex); i++) {
435 if (i915->mapped_vs_tex_buffer[i]) {
436 iws->buffer_unmap(iws, i915->mapped_vs_tex_buffer[i]);
437 pipe_resource_reference(&i915->mapped_vs_tex[i], NULL);
438 }
439 }
440 }
441
442
443
444 /** XXX move someday? Or consolidate all these simple state setters
445 * into one file.
446 */
447
448 static void *
449 i915_create_depth_stencil_state(struct pipe_context *pipe,
450 const struct pipe_depth_stencil_alpha_state *depth_stencil)
451 {
452 struct i915_depth_stencil_state *cso = CALLOC_STRUCT( i915_depth_stencil_state );
453
454 {
455 int testmask = depth_stencil->stencil[0].valuemask & 0xff;
456 int writemask = depth_stencil->stencil[0].writemask & 0xff;
457
458 cso->stencil_modes4 |= (_3DSTATE_MODES_4_CMD |
459 ENABLE_STENCIL_TEST_MASK |
460 STENCIL_TEST_MASK(testmask) |
461 ENABLE_STENCIL_WRITE_MASK |
462 STENCIL_WRITE_MASK(writemask));
463 }
464
465 if (depth_stencil->stencil[0].enabled) {
466 int test = i915_translate_compare_func(depth_stencil->stencil[0].func);
467 int fop = i915_translate_stencil_op(depth_stencil->stencil[0].fail_op);
468 int dfop = i915_translate_stencil_op(depth_stencil->stencil[0].zfail_op);
469 int dpop = i915_translate_stencil_op(depth_stencil->stencil[0].zpass_op);
470
471 cso->stencil_LIS5 |= (S5_STENCIL_TEST_ENABLE |
472 S5_STENCIL_WRITE_ENABLE |
473 (test << S5_STENCIL_TEST_FUNC_SHIFT) |
474 (fop << S5_STENCIL_FAIL_SHIFT) |
475 (dfop << S5_STENCIL_PASS_Z_FAIL_SHIFT) |
476 (dpop << S5_STENCIL_PASS_Z_PASS_SHIFT));
477 }
478
479 if (depth_stencil->stencil[1].enabled) {
480 int test = i915_translate_compare_func(depth_stencil->stencil[1].func);
481 int fop = i915_translate_stencil_op(depth_stencil->stencil[1].fail_op);
482 int dfop = i915_translate_stencil_op(depth_stencil->stencil[1].zfail_op);
483 int dpop = i915_translate_stencil_op(depth_stencil->stencil[1].zpass_op);
484 int tmask = depth_stencil->stencil[1].valuemask & 0xff;
485 int wmask = depth_stencil->stencil[1].writemask & 0xff;
486
487 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
488 BFO_ENABLE_STENCIL_FUNCS |
489 BFO_ENABLE_STENCIL_TWO_SIDE |
490 BFO_ENABLE_STENCIL_REF |
491 BFO_STENCIL_TWO_SIDE |
492 (test << BFO_STENCIL_TEST_SHIFT) |
493 (fop << BFO_STENCIL_FAIL_SHIFT) |
494 (dfop << BFO_STENCIL_PASS_Z_FAIL_SHIFT) |
495 (dpop << BFO_STENCIL_PASS_Z_PASS_SHIFT));
496
497 cso->bfo[1] = (_3DSTATE_BACKFACE_STENCIL_MASKS |
498 BFM_ENABLE_STENCIL_TEST_MASK |
499 BFM_ENABLE_STENCIL_WRITE_MASK |
500 (tmask << BFM_STENCIL_TEST_MASK_SHIFT) |
501 (wmask << BFM_STENCIL_WRITE_MASK_SHIFT));
502 }
503 else {
504 /* This actually disables two-side stencil: The bit set is a
505 * modify-enable bit to indicate we are changing the two-side
506 * setting. Then there is a symbolic zero to show that we are
507 * setting the flag to zero/off.
508 */
509 cso->bfo[0] = (_3DSTATE_BACKFACE_STENCIL_OPS |
510 BFO_ENABLE_STENCIL_TWO_SIDE |
511 0);
512 cso->bfo[1] = 0;
513 }
514
515 if (depth_stencil->depth.enabled) {
516 int func = i915_translate_compare_func(depth_stencil->depth.func);
517
518 cso->depth_LIS6 |= (S6_DEPTH_TEST_ENABLE |
519 (func << S6_DEPTH_TEST_FUNC_SHIFT));
520
521 if (depth_stencil->depth.writemask)
522 cso->depth_LIS6 |= S6_DEPTH_WRITE_ENABLE;
523 }
524
525 if (depth_stencil->alpha.enabled) {
526 int test = i915_translate_compare_func(depth_stencil->alpha.func);
527 ubyte refByte = float_to_ubyte(depth_stencil->alpha.ref_value);
528
529 cso->depth_LIS6 |= (S6_ALPHA_TEST_ENABLE |
530 (test << S6_ALPHA_TEST_FUNC_SHIFT) |
531 (((unsigned) refByte) << S6_ALPHA_REF_SHIFT));
532 }
533
534 return cso;
535 }
536
537 static void i915_bind_depth_stencil_state(struct pipe_context *pipe,
538 void *depth_stencil)
539 {
540 struct i915_context *i915 = i915_context(pipe);
541
542 if (i915->depth_stencil == depth_stencil)
543 return;
544
545 i915->depth_stencil = (const struct i915_depth_stencil_state *)depth_stencil;
546
547 i915->dirty |= I915_NEW_DEPTH_STENCIL;
548 }
549
550 static void i915_delete_depth_stencil_state(struct pipe_context *pipe,
551 void *depth_stencil)
552 {
553 FREE(depth_stencil);
554 }
555
556
557 static void i915_set_scissor_states( struct pipe_context *pipe,
558 unsigned start_slot,
559 unsigned num_scissors,
560 const struct pipe_scissor_state *scissor )
561 {
562 struct i915_context *i915 = i915_context(pipe);
563
564 memcpy( &i915->scissor, scissor, sizeof(*scissor) );
565 i915->dirty |= I915_NEW_SCISSOR;
566 }
567
568
569 static void i915_set_polygon_stipple( struct pipe_context *pipe,
570 const struct pipe_poly_stipple *stipple )
571 {
572 }
573
574
575
576 static void *
577 i915_create_fs_state(struct pipe_context *pipe,
578 const struct pipe_shader_state *templ)
579 {
580 struct i915_context *i915 = i915_context(pipe);
581 struct i915_fragment_shader *ifs = CALLOC_STRUCT(i915_fragment_shader);
582 if (!ifs)
583 return NULL;
584
585 ifs->draw_data = draw_create_fragment_shader(i915->draw, templ);
586 ifs->state.tokens = tgsi_dup_tokens(templ->tokens);
587
588 tgsi_scan_shader(templ->tokens, &ifs->info);
589
590 /* The shader's compiled to i915 instructions here */
591 i915_translate_fragment_program(i915, ifs);
592
593 return ifs;
594 }
595
596 static void
597 i915_bind_fs_state(struct pipe_context *pipe, void *shader)
598 {
599 struct i915_context *i915 = i915_context(pipe);
600
601 if (i915->fs == shader)
602 return;
603
604 i915->fs = (struct i915_fragment_shader*) shader;
605
606 draw_bind_fragment_shader(i915->draw, (i915->fs ? i915->fs->draw_data : NULL));
607
608 i915->dirty |= I915_NEW_FS;
609 }
610
611 static
612 void i915_delete_fs_state(struct pipe_context *pipe, void *shader)
613 {
614 struct i915_fragment_shader *ifs = (struct i915_fragment_shader *) shader;
615
616 FREE(ifs->decl);
617 ifs->decl = NULL;
618
619 if (ifs->program) {
620 FREE(ifs->program);
621 ifs->program = NULL;
622 FREE((struct tgsi_token *)ifs->state.tokens);
623 ifs->state.tokens = NULL;
624 }
625
626 ifs->program_len = 0;
627 ifs->decl_len = 0;
628
629 FREE(ifs);
630 }
631
632
633 static void *
634 i915_create_vs_state(struct pipe_context *pipe,
635 const struct pipe_shader_state *templ)
636 {
637 struct i915_context *i915 = i915_context(pipe);
638
639 /* just pass-through to draw module */
640 return draw_create_vertex_shader(i915->draw, templ);
641 }
642
643 static void i915_bind_vs_state(struct pipe_context *pipe, void *shader)
644 {
645 struct i915_context *i915 = i915_context(pipe);
646
647 if (i915->vs == shader)
648 return;
649
650 i915->vs = shader;
651
652 /* just pass-through to draw module */
653 draw_bind_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
654
655 i915->dirty |= I915_NEW_VS;
656 }
657
658 static void i915_delete_vs_state(struct pipe_context *pipe, void *shader)
659 {
660 struct i915_context *i915 = i915_context(pipe);
661
662 /* just pass-through to draw module */
663 draw_delete_vertex_shader(i915->draw, (struct draw_vertex_shader *) shader);
664 }
665
666 static void i915_set_constant_buffer(struct pipe_context *pipe,
667 uint shader, uint index,
668 struct pipe_constant_buffer *cb)
669 {
670 struct i915_context *i915 = i915_context(pipe);
671 struct pipe_resource *buf = cb ? cb->buffer : NULL;
672 unsigned new_num = 0;
673 boolean diff = TRUE;
674
675 /* XXX don't support geom shaders now */
676 if (shader == PIPE_SHADER_GEOMETRY)
677 return;
678
679 if (cb && cb->user_buffer) {
680 buf = i915_user_buffer_create(pipe->screen, (void *) cb->user_buffer,
681 cb->buffer_size,
682 PIPE_BIND_CONSTANT_BUFFER);
683 }
684
685 /* if we have a new buffer compare it with the old one */
686 if (buf) {
687 struct i915_buffer *ibuf = i915_buffer(buf);
688 struct pipe_resource *old_buf = i915->constants[shader];
689 struct i915_buffer *old = old_buf ? i915_buffer(old_buf) : NULL;
690 unsigned old_num = i915->current.num_user_constants[shader];
691
692 new_num = ibuf->b.b.width0 / 4 * sizeof(float);
693
694 if (old_num == new_num) {
695 if (old_num == 0)
696 diff = FALSE;
697 #if 0
698 /* XXX no point in running this code since st/mesa only uses user buffers */
699 /* Can't compare the buffer data since they are userbuffers */
700 else if (old && old->free_on_destroy)
701 diff = memcmp(old->data, ibuf->data, ibuf->b.b.width0);
702 #else
703 (void)old;
704 #endif
705 }
706 } else {
707 diff = i915->current.num_user_constants[shader] != 0;
708 }
709
710 pipe_resource_reference(&i915->constants[shader], buf);
711 i915->current.num_user_constants[shader] = new_num;
712
713 if (diff)
714 i915->dirty |= shader == PIPE_SHADER_VERTEX ? I915_NEW_VS_CONSTANTS : I915_NEW_FS_CONSTANTS;
715
716 if (cb && cb->user_buffer) {
717 pipe_resource_reference(&buf, NULL);
718 }
719 }
720
721
722 static void i915_set_fragment_sampler_views(struct pipe_context *pipe,
723 unsigned num,
724 struct pipe_sampler_view **views)
725 {
726 struct i915_context *i915 = i915_context(pipe);
727 uint i;
728
729 assert(num <= PIPE_MAX_SAMPLERS);
730
731 /* Check for no-op */
732 if (num == i915->num_fragment_sampler_views &&
733 !memcmp(i915->fragment_sampler_views, views, num * sizeof(struct pipe_sampler_view *)))
734 return;
735
736 for (i = 0; i < num; i++) {
737 /* Note: we're using pipe_sampler_view_release() here to work around
738 * a possible crash when the old view belongs to another context that
739 * was already destroyed.
740 */
741 pipe_sampler_view_release(pipe, &i915->fragment_sampler_views[i]);
742 pipe_sampler_view_reference(&i915->fragment_sampler_views[i],
743 views[i]);
744 }
745
746 for (i = num; i < i915->num_fragment_sampler_views; i++)
747 pipe_sampler_view_release(pipe, &i915->fragment_sampler_views[i]);
748
749 i915->num_fragment_sampler_views = num;
750
751 i915->dirty |= I915_NEW_SAMPLER_VIEW;
752 }
753
754 static void
755 i915_set_vertex_sampler_views(struct pipe_context *pipe,
756 unsigned num,
757 struct pipe_sampler_view **views)
758 {
759 struct i915_context *i915 = i915_context(pipe);
760 uint i;
761
762 assert(num <= Elements(i915->vertex_sampler_views));
763
764 /* Check for no-op */
765 if (num == i915->num_vertex_sampler_views &&
766 !memcmp(i915->vertex_sampler_views, views, num * sizeof(struct pipe_sampler_view *))) {
767 return;
768 }
769
770 for (i = 0; i < Elements(i915->vertex_sampler_views); i++) {
771 struct pipe_sampler_view *view = i < num ? views[i] : NULL;
772
773 pipe_sampler_view_reference(&i915->vertex_sampler_views[i], view);
774 }
775
776 i915->num_vertex_sampler_views = num;
777
778 draw_set_sampler_views(i915->draw,
779 PIPE_SHADER_VERTEX,
780 i915->vertex_sampler_views,
781 i915->num_vertex_sampler_views);
782 }
783
784
785 static struct pipe_sampler_view *
786 i915_create_sampler_view(struct pipe_context *pipe,
787 struct pipe_resource *texture,
788 const struct pipe_sampler_view *templ)
789 {
790 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view);
791
792 if (view) {
793 *view = *templ;
794 view->reference.count = 1;
795 view->texture = NULL;
796 pipe_resource_reference(&view->texture, texture);
797 view->context = pipe;
798 }
799
800 return view;
801 }
802
803
804 static void
805 i915_sampler_view_destroy(struct pipe_context *pipe,
806 struct pipe_sampler_view *view)
807 {
808 pipe_resource_reference(&view->texture, NULL);
809 FREE(view);
810 }
811
812
813 static void i915_set_framebuffer_state(struct pipe_context *pipe,
814 const struct pipe_framebuffer_state *fb)
815 {
816 struct i915_context *i915 = i915_context(pipe);
817 int i;
818
819 i915->framebuffer.width = fb->width;
820 i915->framebuffer.height = fb->height;
821 i915->framebuffer.nr_cbufs = fb->nr_cbufs;
822 for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
823 pipe_surface_reference(&i915->framebuffer.cbufs[i],
824 i < fb->nr_cbufs ? fb->cbufs[i] : NULL);
825 }
826 pipe_surface_reference(&i915->framebuffer.zsbuf, fb->zsbuf);
827
828 i915->dirty |= I915_NEW_FRAMEBUFFER;
829 }
830
831
832
833 static void i915_set_clip_state( struct pipe_context *pipe,
834 const struct pipe_clip_state *clip )
835 {
836 struct i915_context *i915 = i915_context(pipe);
837
838 i915->clip = *clip;
839
840 draw_set_clip_state(i915->draw, clip);
841
842 i915->dirty |= I915_NEW_CLIP;
843 }
844
845
846
847 /* Called when driver state tracker notices changes to the viewport
848 * matrix:
849 */
850 static void i915_set_viewport_states( struct pipe_context *pipe,
851 unsigned start_slot,
852 unsigned num_viewports,
853 const struct pipe_viewport_state *viewport )
854 {
855 struct i915_context *i915 = i915_context(pipe);
856
857 i915->viewport = *viewport; /* struct copy */
858
859 /* pass the viewport info to the draw module */
860 draw_set_viewport_states(i915->draw, start_slot, num_viewports,
861 &i915->viewport);
862
863 i915->dirty |= I915_NEW_VIEWPORT;
864 }
865
866
867 static void *
868 i915_create_rasterizer_state(struct pipe_context *pipe,
869 const struct pipe_rasterizer_state *rasterizer)
870 {
871 struct i915_rasterizer_state *cso = CALLOC_STRUCT( i915_rasterizer_state );
872
873 cso->templ = *rasterizer;
874 cso->color_interp = rasterizer->flatshade ? INTERP_CONSTANT : INTERP_LINEAR;
875 cso->light_twoside = rasterizer->light_twoside;
876 cso->ds[0].u = _3DSTATE_DEPTH_OFFSET_SCALE;
877 cso->ds[1].f = rasterizer->offset_scale;
878 if (rasterizer->poly_stipple_enable) {
879 cso->st |= ST1_ENABLE;
880 }
881
882 if (rasterizer->scissor)
883 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT;
884 else
885 cso->sc[0] = _3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT;
886
887 switch (rasterizer->cull_face) {
888 case PIPE_FACE_NONE:
889 cso->LIS4 |= S4_CULLMODE_NONE;
890 break;
891 case PIPE_FACE_FRONT:
892 if (rasterizer->front_ccw)
893 cso->LIS4 |= S4_CULLMODE_CCW;
894 else
895 cso->LIS4 |= S4_CULLMODE_CW;
896 break;
897 case PIPE_FACE_BACK:
898 if (rasterizer->front_ccw)
899 cso->LIS4 |= S4_CULLMODE_CW;
900 else
901 cso->LIS4 |= S4_CULLMODE_CCW;
902 break;
903 case PIPE_FACE_FRONT_AND_BACK:
904 cso->LIS4 |= S4_CULLMODE_BOTH;
905 break;
906 }
907
908 {
909 int line_width = CLAMP((int)(rasterizer->line_width * 2), 1, 0xf);
910
911 cso->LIS4 |= line_width << S4_LINE_WIDTH_SHIFT;
912
913 if (rasterizer->line_smooth)
914 cso->LIS4 |= S4_LINE_ANTIALIAS_ENABLE;
915 }
916
917 {
918 int point_size = CLAMP((int) rasterizer->point_size, 1, 0xff);
919
920 cso->LIS4 |= point_size << S4_POINT_WIDTH_SHIFT;
921 }
922
923 if (rasterizer->flatshade) {
924 cso->LIS4 |= (S4_FLATSHADE_ALPHA |
925 S4_FLATSHADE_COLOR |
926 S4_FLATSHADE_SPECULAR);
927 }
928
929 cso->LIS7 = fui( rasterizer->offset_units );
930
931
932 return cso;
933 }
934
935 static void i915_bind_rasterizer_state( struct pipe_context *pipe,
936 void *raster )
937 {
938 struct i915_context *i915 = i915_context(pipe);
939
940 if (i915->rasterizer == raster)
941 return;
942
943 i915->rasterizer = (struct i915_rasterizer_state *)raster;
944
945 /* pass-through to draw module */
946 draw_set_rasterizer_state(i915->draw,
947 (i915->rasterizer ? &(i915->rasterizer->templ) : NULL),
948 raster);
949
950 i915->dirty |= I915_NEW_RASTERIZER;
951 }
952
953 static void i915_delete_rasterizer_state(struct pipe_context *pipe,
954 void *raster)
955 {
956 FREE(raster);
957 }
958
959 static void i915_set_vertex_buffers(struct pipe_context *pipe,
960 unsigned start_slot, unsigned count,
961 const struct pipe_vertex_buffer *buffers)
962 {
963 struct i915_context *i915 = i915_context(pipe);
964 struct draw_context *draw = i915->draw;
965
966 util_set_vertex_buffers_count(i915->vertex_buffers,
967 &i915->nr_vertex_buffers,
968 buffers, start_slot, count);
969
970 /* pass-through to draw module */
971 draw_set_vertex_buffers(draw, start_slot, count, buffers);
972 }
973
974 static void *
975 i915_create_vertex_elements_state(struct pipe_context *pipe,
976 unsigned count,
977 const struct pipe_vertex_element *attribs)
978 {
979 struct i915_velems_state *velems;
980 assert(count <= PIPE_MAX_ATTRIBS);
981 velems = (struct i915_velems_state *) MALLOC(sizeof(struct i915_velems_state));
982 if (velems) {
983 velems->count = count;
984 memcpy(velems->velem, attribs, sizeof(*attribs) * count);
985 }
986 return velems;
987 }
988
989 static void
990 i915_bind_vertex_elements_state(struct pipe_context *pipe,
991 void *velems)
992 {
993 struct i915_context *i915 = i915_context(pipe);
994 struct i915_velems_state *i915_velems = (struct i915_velems_state *) velems;
995
996 if (i915->velems == velems)
997 return;
998
999 i915->velems = velems;
1000
1001 /* pass-through to draw module */
1002 if (i915_velems) {
1003 draw_set_vertex_elements(i915->draw,
1004 i915_velems->count, i915_velems->velem);
1005 }
1006 }
1007
1008 static void
1009 i915_delete_vertex_elements_state(struct pipe_context *pipe, void *velems)
1010 {
1011 FREE( velems );
1012 }
1013
1014 static void i915_set_index_buffer(struct pipe_context *pipe,
1015 const struct pipe_index_buffer *ib)
1016 {
1017 struct i915_context *i915 = i915_context(pipe);
1018
1019 if (ib)
1020 memcpy(&i915->index_buffer, ib, sizeof(i915->index_buffer));
1021 else
1022 memset(&i915->index_buffer, 0, sizeof(i915->index_buffer));
1023 }
1024
1025 static void
1026 i915_set_sample_mask(struct pipe_context *pipe,
1027 unsigned sample_mask)
1028 {
1029 }
1030
1031 void
1032 i915_init_state_functions( struct i915_context *i915 )
1033 {
1034 i915->base.create_blend_state = i915_create_blend_state;
1035 i915->base.bind_blend_state = i915_bind_blend_state;
1036 i915->base.delete_blend_state = i915_delete_blend_state;
1037
1038 i915->base.create_sampler_state = i915_create_sampler_state;
1039 i915->base.bind_sampler_states = i915_bind_sampler_states;
1040 i915->base.bind_fragment_sampler_states = i915_bind_fragment_sampler_states;
1041 i915->base.bind_vertex_sampler_states = i915_bind_vertex_sampler_states;
1042 i915->base.delete_sampler_state = i915_delete_sampler_state;
1043
1044 i915->base.create_depth_stencil_alpha_state = i915_create_depth_stencil_state;
1045 i915->base.bind_depth_stencil_alpha_state = i915_bind_depth_stencil_state;
1046 i915->base.delete_depth_stencil_alpha_state = i915_delete_depth_stencil_state;
1047
1048 i915->base.create_rasterizer_state = i915_create_rasterizer_state;
1049 i915->base.bind_rasterizer_state = i915_bind_rasterizer_state;
1050 i915->base.delete_rasterizer_state = i915_delete_rasterizer_state;
1051 i915->base.create_fs_state = i915_create_fs_state;
1052 i915->base.bind_fs_state = i915_bind_fs_state;
1053 i915->base.delete_fs_state = i915_delete_fs_state;
1054 i915->base.create_vs_state = i915_create_vs_state;
1055 i915->base.bind_vs_state = i915_bind_vs_state;
1056 i915->base.delete_vs_state = i915_delete_vs_state;
1057 i915->base.create_vertex_elements_state = i915_create_vertex_elements_state;
1058 i915->base.bind_vertex_elements_state = i915_bind_vertex_elements_state;
1059 i915->base.delete_vertex_elements_state = i915_delete_vertex_elements_state;
1060
1061 i915->base.set_blend_color = i915_set_blend_color;
1062 i915->base.set_stencil_ref = i915_set_stencil_ref;
1063 i915->base.set_clip_state = i915_set_clip_state;
1064 i915->base.set_sample_mask = i915_set_sample_mask;
1065 i915->base.set_constant_buffer = i915_set_constant_buffer;
1066 i915->base.set_framebuffer_state = i915_set_framebuffer_state;
1067
1068 i915->base.set_polygon_stipple = i915_set_polygon_stipple;
1069 i915->base.set_scissor_states = i915_set_scissor_states;
1070 i915->base.set_fragment_sampler_views = i915_set_fragment_sampler_views;
1071 i915->base.set_vertex_sampler_views = i915_set_vertex_sampler_views;
1072 i915->base.create_sampler_view = i915_create_sampler_view;
1073 i915->base.sampler_view_destroy = i915_sampler_view_destroy;
1074 i915->base.set_viewport_states = i915_set_viewport_states;
1075 i915->base.set_vertex_buffers = i915_set_vertex_buffers;
1076 i915->base.set_index_buffer = i915_set_index_buffer;
1077 }