i915g: Rework debug print code
[mesa.git] / src / gallium / drivers / i915 / i915_state_emit.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "i915_reg.h"
30 #include "i915_context.h"
31 #include "i915_batch.h"
32 #include "i915_debug.h"
33 #include "i915_reg.h"
34 #include "i915_resource.h"
35
36 #include "pipe/p_context.h"
37 #include "pipe/p_defines.h"
38
39 static unsigned translate_format( enum pipe_format format )
40 {
41 switch (format) {
42 case PIPE_FORMAT_B8G8R8A8_UNORM:
43 return COLOR_BUF_ARGB8888;
44 case PIPE_FORMAT_B5G6R5_UNORM:
45 return COLOR_BUF_RGB565;
46 default:
47 assert(0);
48 return 0;
49 }
50 }
51
52 static unsigned translate_depth_format( enum pipe_format zformat )
53 {
54 switch (zformat) {
55 case PIPE_FORMAT_Z24X8_UNORM:
56 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
57 return DEPTH_FRMT_24_FIXED_8_OTHER;
58 case PIPE_FORMAT_Z16_UNORM:
59 return DEPTH_FRMT_16_FIXED;
60 default:
61 assert(0);
62 return 0;
63 }
64 }
65
66
67 /**
68 * Examine framebuffer state to determine width, height.
69 */
70 static boolean
71 framebuffer_size(const struct pipe_framebuffer_state *fb,
72 uint *width, uint *height)
73 {
74 if (fb->cbufs[0]) {
75 *width = fb->cbufs[0]->width;
76 *height = fb->cbufs[0]->height;
77 return TRUE;
78 }
79 else if (fb->zsbuf) {
80 *width = fb->zsbuf->width;
81 *height = fb->zsbuf->height;
82 return TRUE;
83 }
84 else {
85 *width = *height = 0;
86 return FALSE;
87 }
88 }
89
90
91 /* Push the state into the sarea and/or texture memory.
92 */
93 void
94 i915_emit_hardware_state(struct i915_context *i915 )
95 {
96 /* XXX: there must be an easier way */
97 const unsigned dwords = ( 14 +
98 7 +
99 I915_MAX_DYNAMIC +
100 8 +
101 2 + I915_TEX_UNITS*3 +
102 2 + I915_TEX_UNITS*3 +
103 2 + I915_MAX_CONSTANT*4 +
104 #if 0
105 i915->current.program_len +
106 #else
107 i915->fs->program_len +
108 #endif
109 6
110 ) * 3/2; /* plus 50% margin */
111 const unsigned relocs = ( I915_TEX_UNITS +
112 3
113 ) * 3/2; /* plus 50% margin */
114
115 uintptr_t save_ptr;
116 size_t save_relocs;
117
118 if (I915_DBG_ON(DBG_ATOMS))
119 i915_dump_hardware_dirty(i915, __FUNCTION__);
120
121 if(!BEGIN_BATCH(dwords, relocs)) {
122 FLUSH_BATCH(NULL);
123 assert(BEGIN_BATCH(dwords, relocs));
124 }
125
126 save_ptr = (uintptr_t)i915->batch->ptr;
127 save_relocs = i915->batch->relocs;
128
129 /* 14 dwords, 0 relocs */
130 if (i915->hardware_dirty & I915_HW_INVARIENT)
131 {
132 OUT_BATCH(_3DSTATE_AA_CMD |
133 AA_LINE_ECAAR_WIDTH_ENABLE |
134 AA_LINE_ECAAR_WIDTH_1_0 |
135 AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
136
137 OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
138 OUT_BATCH(0);
139
140 OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
141 OUT_BATCH(0);
142
143 OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
144 OUT_BATCH(0);
145
146 OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
147 CSB_TCB(0, 0) |
148 CSB_TCB(1, 1) |
149 CSB_TCB(2, 2) |
150 CSB_TCB(3, 3) |
151 CSB_TCB(4, 4) |
152 CSB_TCB(5, 5) |
153 CSB_TCB(6, 6) |
154 CSB_TCB(7, 7));
155
156 OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
157 ENABLE_POINT_RASTER_RULE |
158 OGL_POINT_RASTER_RULE |
159 ENABLE_LINE_STRIP_PROVOKE_VRTX |
160 ENABLE_TRI_FAN_PROVOKE_VRTX |
161 LINE_STRIP_PROVOKE_VRTX(1) |
162 TRI_FAN_PROVOKE_VRTX(2) |
163 ENABLE_TEXKILL_3D_4D |
164 TEXKILL_4D);
165
166 /* Need to initialize this to zero.
167 */
168 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0));
169 OUT_BATCH(0);
170
171 OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
172
173 /* disable indirect state for now
174 */
175 OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);
176 OUT_BATCH(0);
177 }
178
179 /* 7 dwords, 1 relocs */
180 if (i915->hardware_dirty & I915_HW_IMMEDIATE)
181 {
182 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
183 I1_LOAD_S(0) |
184 I1_LOAD_S(1) |
185 I1_LOAD_S(2) |
186 I1_LOAD_S(4) |
187 I1_LOAD_S(5) |
188 I1_LOAD_S(6) |
189 (5));
190
191 if(i915->vbo)
192 OUT_RELOC(i915->vbo,
193 I915_USAGE_VERTEX,
194 i915->current.immediate[I915_IMMEDIATE_S0]);
195 else
196 /* FIXME: we should not do this */
197 OUT_BATCH(0);
198 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S1]);
199 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S2]);
200 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S4]);
201 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S5]);
202 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S6]);
203 }
204
205 /* I915_MAX_DYNAMIC dwords, 0 relocs */
206 if (i915->hardware_dirty & I915_HW_DYNAMIC)
207 {
208 int i;
209 for (i = 0; i < I915_MAX_DYNAMIC; i++) {
210 OUT_BATCH(i915->current.dynamic[i]);
211 }
212 }
213
214 /* 8 dwords, 2 relocs */
215 if (i915->hardware_dirty & I915_HW_STATIC)
216 {
217 struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
218 struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
219
220 if (cbuf_surface) {
221 unsigned ctile = BUF_3D_USE_FENCE;
222 struct i915_texture *tex = i915_texture(cbuf_surface->texture);
223 assert(tex);
224
225 if (tex && tex->sw_tiled) {
226 ctile = BUF_3D_TILED_SURFACE;
227 }
228
229 OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
230
231 OUT_BATCH(BUF_3D_ID_COLOR_BACK |
232 BUF_3D_PITCH(tex->stride) | /* pitch in bytes */
233 ctile);
234
235 OUT_RELOC(tex->buffer,
236 I915_USAGE_RENDER,
237 cbuf_surface->offset);
238 }
239
240 /* What happens if no zbuf??
241 */
242 if (depth_surface) {
243 unsigned ztile = BUF_3D_USE_FENCE;
244 struct i915_texture *tex = i915_texture(depth_surface->texture);
245 assert(tex);
246
247 if (tex && tex->sw_tiled) {
248 ztile = BUF_3D_TILED_SURFACE;
249 }
250
251 OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
252
253 assert(tex);
254 OUT_BATCH(BUF_3D_ID_DEPTH |
255 BUF_3D_PITCH(tex->stride) | /* pitch in bytes */
256 ztile);
257
258 OUT_RELOC(tex->buffer,
259 I915_USAGE_RENDER,
260 depth_surface->offset);
261 }
262
263 {
264 unsigned cformat, zformat = 0;
265
266 if (cbuf_surface)
267 cformat = cbuf_surface->format;
268 else
269 cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
270 cformat = translate_format(cformat);
271
272 if (depth_surface)
273 zformat = translate_depth_format( i915->framebuffer.zsbuf->format );
274
275 OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
276 OUT_BATCH(DSTORG_HORT_BIAS(0x8) | /* .5 */
277 DSTORG_VERT_BIAS(0x8) | /* .5 */
278 LOD_PRECLAMP_OGL |
279 TEX_DEFAULT_COLOR_OGL |
280 cformat |
281 zformat );
282 }
283 }
284
285 #if 01
286 /* texture images */
287 /* 2 + I915_TEX_UNITS*3 dwords, I915_TEX_UNITS relocs */
288 if (i915->hardware_dirty & (I915_HW_MAP | I915_HW_SAMPLER))
289 {
290 const uint nr = i915->current.sampler_enable_nr;
291 if (nr) {
292 const uint enabled = i915->current.sampler_enable_flags;
293 uint unit;
294 uint count = 0;
295 OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
296 OUT_BATCH(enabled);
297 for (unit = 0; unit < I915_TEX_UNITS; unit++) {
298 if (enabled & (1 << unit)) {
299 struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture);
300 struct i915_winsys_buffer *buf = texture->buffer;
301 uint offset = 0;
302 assert(buf);
303
304 count++;
305
306 OUT_RELOC(buf, I915_USAGE_SAMPLER, offset);
307 OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
308 OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
309 }
310 }
311 assert(count == nr);
312 }
313 }
314 #endif
315
316 #if 01
317 /* samplers */
318 /* 2 + I915_TEX_UNITS*3 dwords, 0 relocs */
319 if (i915->hardware_dirty & I915_HW_SAMPLER)
320 {
321 if (i915->current.sampler_enable_nr) {
322 int i;
323
324 OUT_BATCH( _3DSTATE_SAMPLER_STATE |
325 (3 * i915->current.sampler_enable_nr) );
326
327 OUT_BATCH( i915->current.sampler_enable_flags );
328
329 for (i = 0; i < I915_TEX_UNITS; i++) {
330 if (i915->current.sampler_enable_flags & (1<<i)) {
331 OUT_BATCH( i915->current.sampler[i][0] );
332 OUT_BATCH( i915->current.sampler[i][1] );
333 OUT_BATCH( i915->current.sampler[i][2] );
334 }
335 }
336 }
337 }
338 #endif
339
340 /* constants */
341 /* 2 + I915_MAX_CONSTANT*4 dwords, 0 relocs */
342 if (i915->hardware_dirty & I915_HW_PROGRAM)
343 {
344 /* Collate the user-defined constants with the fragment shader's
345 * immediates according to the constant_flags[] array.
346 */
347 const uint nr = i915->fs->num_constants;
348 if (nr) {
349 uint i;
350
351 OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) );
352 OUT_BATCH( (1 << (nr - 1)) | ((1 << (nr - 1)) - 1) );
353
354 for (i = 0; i < nr; i++) {
355 const uint *c;
356 if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
357 /* grab user-defined constant */
358 c = (uint *) i915->current.constants[PIPE_SHADER_FRAGMENT][i];
359 }
360 else {
361 /* emit program constant */
362 c = (uint *) i915->fs->constants[i];
363 }
364 #if 0 /* debug */
365 {
366 float *f = (float *) c;
367 printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3],
368 (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER
369 ? "user" : "immediate"));
370 }
371 #endif
372 OUT_BATCH(*c++);
373 OUT_BATCH(*c++);
374 OUT_BATCH(*c++);
375 OUT_BATCH(*c++);
376 }
377 }
378 }
379
380 /* Fragment program */
381 /* i915->current.program_len dwords, 0 relocs */
382 if (i915->hardware_dirty & I915_HW_PROGRAM)
383 {
384 uint i;
385 /* we should always have, at least, a pass-through program */
386 assert(i915->fs->program_len > 0);
387 for (i = 0; i < i915->fs->program_len; i++) {
388 OUT_BATCH(i915->fs->program[i]);
389 }
390 }
391
392 /* drawing surface size */
393 /* 6 dwords, 0 relocs */
394 {
395 uint w, h;
396 boolean k = framebuffer_size(&i915->framebuffer, &w, &h);
397 (void)k;
398 assert(k);
399
400 OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
401 OUT_BATCH(0);
402 OUT_BATCH(0);
403 OUT_BATCH(((w - 1) & 0xffff) | ((h - 1) << 16));
404 OUT_BATCH(0);
405 OUT_BATCH(0);
406 }
407
408 I915_DBG(DBG_EMIT, "%s: used %d dwords, %d relocs\n", __FUNCTION__,
409 ((uintptr_t)i915->batch->ptr - save_ptr) / 4,
410 i915->batch->relocs - save_relocs);
411
412 i915->hardware_dirty = 0;
413 }