src/gallium/drivers/i915/i915_state_emit.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "i915_reg.h"
  30 #include "i915_context.h"
  31 #include "i915_batch.h"
  32 #include "i915_debug.h"
  33 #include "i915_resource.h"
  34
  35 #include "pipe/p_context.h"
  36 #include "pipe/p_defines.h"
  37
  38 static unsigned translate_format( enum pipe_format format )
  39 {
  40    switch (format) {
  41    case PIPE_FORMAT_B8G8R8A8_UNORM:
  42       return COLOR_BUF_ARGB8888;
  43    case PIPE_FORMAT_B5G6R5_UNORM:
  44       return COLOR_BUF_RGB565;
  45    default:
  46       assert(0);
  47       return 0;
  48    }
  49 }
  50
  51 static unsigned translate_depth_format( enum pipe_format zformat )
  52 {
  53    switch (zformat) {
  54    case PIPE_FORMAT_Z24X8_UNORM:
  55    case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
  56       return DEPTH_FRMT_24_FIXED_8_OTHER;
  57    case PIPE_FORMAT_Z16_UNORM:
  58       return DEPTH_FRMT_16_FIXED;
  59    default:
  60       assert(0);
  61       return 0;
  62    }
  63 }
  64
  65
  66 /**
  67  * Examine framebuffer state to determine width, height.
  68  */
  69 static boolean
  70 framebuffer_size(const struct pipe_framebuffer_state *fb,
  71                  uint *width, uint *height)
  72 {
  73    if (fb->cbufs[0]) {
  74       *width = fb->cbufs[0]->width;
  75       *height = fb->cbufs[0]->height;
  76       return TRUE;
  77    }
  78    else if (fb->zsbuf) {
  79       *width = fb->zsbuf->width;
  80       *height = fb->zsbuf->height;
  81       return TRUE;
  82    }
  83    else {
  84       *width = *height = 0;
  85       return FALSE;
  86    }
  87 }
  88
  89 static inline uint32_t
  90 buf_3d_tiling_bits(enum i915_winsys_buffer_tile tiling)
  91 {
  92          uint32_t tiling_bits = 0;
  93
  94          switch (tiling) {
  95          case I915_TILE_Y:
  96             tiling_bits |= BUF_3D_TILE_WALK_Y;
  97          case I915_TILE_X:
  98             tiling_bits |= BUF_3D_TILED_SURFACE;
  99          case I915_TILE_NONE:
 100             break;
 101          }
 102
 103          return tiling_bits;
 104 }
 105
 106 /* Push the state into the sarea and/or texture memory.
 107  */
 108 void
 109 i915_emit_hardware_state(struct i915_context *i915 )
 110 {
 111    /* XXX: there must be an easier way */
 112    const unsigned dwords = ( 14 +
 113                              7 +
 114                              I915_MAX_DYNAMIC +
 115                              8 +
 116                              2 + I915_TEX_UNITS*3 +
 117                              2 + I915_TEX_UNITS*3 +
 118                              2 + I915_MAX_CONSTANT*4 +
 119 #if 0
 120                              i915->current.program_len +
 121 #else
 122                              i915->fs->program_len +
 123 #endif
 124                              6
 125                            ) * 3/2; /* plus 50% margin */
 126    const unsigned relocs = ( I915_TEX_UNITS +
 127                              3
 128                            ) * 3/2; /* plus 50% margin */
 129
 130    uintptr_t save_ptr;
 131    size_t save_relocs;
 132
 133    if (I915_DBG_ON(DBG_ATOMS))
 134       i915_dump_hardware_dirty(i915, __FUNCTION__);
 135
 136    if(!BEGIN_BATCH(dwords, relocs)) {
 137       FLUSH_BATCH(NULL);
 138       assert(BEGIN_BATCH(dwords, relocs));
 139    }
 140
 141    save_ptr = (uintptr_t)i915->batch->ptr;
 142    save_relocs = i915->batch->relocs;
 143
 144    /* 14 dwords, 0 relocs */
 145    if (i915->hardware_dirty & I915_HW_INVARIANT)
 146    {
 147       OUT_BATCH(_3DSTATE_AA_CMD |
 148                 AA_LINE_ECAAR_WIDTH_ENABLE |
 149                 AA_LINE_ECAAR_WIDTH_1_0 |
 150                 AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
 151
 152       OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
 153       OUT_BATCH(0);
 154
 155       OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
 156       OUT_BATCH(0);
 157
 158       OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
 159       OUT_BATCH(0);
 160
 161       OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
 162                 CSB_TCB(0, 0) |
 163                 CSB_TCB(1, 1) |
 164                 CSB_TCB(2, 2) |
 165                 CSB_TCB(3, 3) |
 166                 CSB_TCB(4, 4) |
 167                 CSB_TCB(5, 5) |
 168                 CSB_TCB(6, 6) |
 169                 CSB_TCB(7, 7));
 170
 171       OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
 172                 ENABLE_POINT_RASTER_RULE |
 173                 OGL_POINT_RASTER_RULE |
 174                 ENABLE_LINE_STRIP_PROVOKE_VRTX |
 175                 ENABLE_TRI_FAN_PROVOKE_VRTX |
 176                 LINE_STRIP_PROVOKE_VRTX(1) |
 177                 TRI_FAN_PROVOKE_VRTX(2) |
 178                 ENABLE_TEXKILL_3D_4D |
 179                 TEXKILL_4D);
 180
 181       /* Need to initialize this to zero.
 182        */
 183       OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0));
 184       OUT_BATCH(0);
 185
 186       OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
 187
 188       /* disable indirect state for now
 189        */
 190       OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);
 191       OUT_BATCH(0);
 192    }
 193
 194    /* 7 dwords, 1 relocs */
 195    if (i915->hardware_dirty & I915_HW_IMMEDIATE)
 196    {
 197       OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 198                 I1_LOAD_S(0) |
 199                 I1_LOAD_S(1) |
 200                 I1_LOAD_S(2) |
 201                 I1_LOAD_S(4) |
 202                 I1_LOAD_S(5) |
 203                 I1_LOAD_S(6) |
 204                 (5));
 205
 206       if(i915->vbo)
 207          OUT_RELOC(i915->vbo,
 208                    I915_USAGE_VERTEX,
 209                    i915->current.immediate[I915_IMMEDIATE_S0]);
 210       else
 211          /* FIXME: we should not do this */
 212          OUT_BATCH(0);
 213       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S1]);
 214       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S2]);
 215       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S4]);
 216       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S5]);
 217       OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S6]);
 218    }
 219
 220 #if 01
 221    /* I915_MAX_DYNAMIC dwords, 0 relocs */
 222    if (i915->hardware_dirty & I915_HW_DYNAMIC)
 223    {
 224       int i;
 225       for (i = 0; i < I915_MAX_DYNAMIC; i++) {
 226          OUT_BATCH(i915->current.dynamic[i]);
 227       }
 228    }
 229 #endif
 230
 231 #if 01
 232    /* 8 dwords, 2 relocs */
 233    if (i915->hardware_dirty & I915_HW_STATIC)
 234    {
 235       struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
 236       struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
 237
 238       if (cbuf_surface) {
 239          struct i915_texture *tex = i915_texture(cbuf_surface->texture);
 240          assert(tex);
 241
 242          OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
 243
 244          OUT_BATCH(BUF_3D_ID_COLOR_BACK |
 245                    BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
 246                    buf_3d_tiling_bits(tex->tiling));
 247
 248          OUT_RELOC(tex->buffer,
 249                    I915_USAGE_RENDER,
 250                    0);
 251       }
 252
 253       /* What happens if no zbuf??
 254        */
 255       if (depth_surface) {
 256          struct i915_texture *tex = i915_texture(depth_surface->texture);
 257          unsigned offset = i915_texture_offset(tex, depth_surface->u.tex.level,
 258                                                depth_surface->u.tex.first_layer);
 259          assert(tex);
 260          assert(offset == 0);
 261
 262          OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
 263
 264          assert(tex);
 265          OUT_BATCH(BUF_3D_ID_DEPTH |
 266                    BUF_3D_PITCH(tex->stride) |  /* pitch in bytes */
 267                    buf_3d_tiling_bits(tex->tiling));
 268
 269          OUT_RELOC(tex->buffer,
 270                    I915_USAGE_RENDER,
 271                    0);
 272       }
 273
 274       {
 275          unsigned cformat, zformat = 0;
 276
 277          if (cbuf_surface)
 278             cformat = cbuf_surface->format;
 279          else
 280             cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
 281          cformat = translate_format(cformat);
 282
 283          if (depth_surface)
 284             zformat = translate_depth_format( i915->framebuffer.zsbuf->format );
 285
 286          OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
 287          OUT_BATCH(DSTORG_HORT_BIAS(0x8) | /* .5 */
 288                    DSTORG_VERT_BIAS(0x8) | /* .5 */
 289                    LOD_PRECLAMP_OGL |
 290                    TEX_DEFAULT_COLOR_OGL |
 291                    cformat |
 292                    zformat );
 293       }
 294    }
 295 #endif
 296
 297 #if 01
 298       /* texture images */
 299       /* 2 + I915_TEX_UNITS*3 dwords, I915_TEX_UNITS relocs */
 300       if (i915->hardware_dirty & (I915_HW_MAP | I915_HW_SAMPLER))
 301       {
 302          const uint nr = i915->current.sampler_enable_nr;
 303          if (nr) {
 304             const uint enabled = i915->current.sampler_enable_flags;
 305             uint unit;
 306             uint count = 0;
 307             OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
 308             OUT_BATCH(enabled);
 309             for (unit = 0; unit < I915_TEX_UNITS; unit++) {
 310                if (enabled & (1 << unit)) {
 311                   struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture);
 312                   struct i915_winsys_buffer *buf = texture->buffer;
 313                   assert(buf);
 314
 315                   count++;
 316
 317                   OUT_RELOC(buf, I915_USAGE_SAMPLER, 0);
 318                   OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
 319                   OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
 320                }
 321             }
 322             assert(count == nr);
 323          }
 324       }
 325 #endif
 326
 327 #if 01
 328    /* samplers */
 329    /* 2 + I915_TEX_UNITS*3 dwords, 0 relocs */
 330    if (i915->hardware_dirty & I915_HW_SAMPLER)
 331    {
 332       if (i915->current.sampler_enable_nr) {
 333          int i;
 334
 335          OUT_BATCH( _3DSTATE_SAMPLER_STATE |
 336                     (3 * i915->current.sampler_enable_nr) );
 337
 338          OUT_BATCH( i915->current.sampler_enable_flags );
 339
 340          for (i = 0; i < I915_TEX_UNITS; i++) {
 341             if (i915->current.sampler_enable_flags & (1<<i)) {
 342                OUT_BATCH( i915->current.sampler[i][0] );
 343                OUT_BATCH( i915->current.sampler[i][1] );
 344                OUT_BATCH( i915->current.sampler[i][2] );
 345             }
 346          }
 347       }
 348    }
 349 #endif
 350
 351 #if 01
 352    /* constants */
 353    /* 2 + I915_MAX_CONSTANT*4 dwords, 0 relocs */
 354    if (i915->hardware_dirty & I915_HW_CONSTANTS)
 355    {
 356       /* Collate the user-defined constants with the fragment shader's
 357        * immediates according to the constant_flags[] array.
 358        */
 359       const uint nr = i915->fs->num_constants;
 360       if (nr) {
 361          uint i;
 362
 363          OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) );
 364          OUT_BATCH( (1 << (nr - 1)) | ((1 << (nr - 1)) - 1) );
 365
 366          for (i = 0; i < nr; i++) {
 367             const uint *c;
 368             if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
 369                /* grab user-defined constant */
 370                c = (uint *) i915->current.constants[PIPE_SHADER_FRAGMENT][i];
 371             }
 372             else {
 373                /* emit program constant */
 374                c = (uint *) i915->fs->constants[i];
 375             }
 376 #if 0 /* debug */
 377             {
 378                float *f = (float *) c;
 379                printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3],
 380                       (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER
 381                        ? "user" : "immediate"));
 382             }
 383 #endif
 384             OUT_BATCH(*c++);
 385             OUT_BATCH(*c++);
 386             OUT_BATCH(*c++);
 387             OUT_BATCH(*c++);
 388          }
 389       }
 390    }
 391 #endif
 392
 393 #if 01
 394    /* Fragment program */
 395    /* i915->current.program_len dwords, 0 relocs */
 396    if (i915->hardware_dirty & I915_HW_PROGRAM)
 397    {
 398       uint i;
 399       /* we should always have, at least, a pass-through program */
 400       assert(i915->fs->program_len > 0);
 401       for (i = 0; i < i915->fs->program_len; i++) {
 402          OUT_BATCH(i915->fs->program[i]);
 403       }
 404    }
 405 #endif
 406
 407 #if 01
 408    /* drawing surface size */
 409    /* 6 dwords, 0 relocs */
 410    if (i915->hardware_dirty & I915_HW_STATIC)
 411    {
 412       uint w, h;
 413       struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
 414       struct i915_texture *tex = i915_texture(cbuf_surface->texture);
 415       unsigned x, y;
 416       int layer;
 417       uint32_t draw_offset;
 418       boolean ret;
 419
 420       ret = framebuffer_size(&i915->framebuffer, &w, &h);
 421       assert(ret);
 422
 423       layer = cbuf_surface->u.tex.first_layer;
 424
 425       x = tex->image_offset[cbuf_surface->u.tex.level][layer].nblocksx;
 426       y = tex->image_offset[cbuf_surface->u.tex.level][layer].nblocksy;
 427
 428       draw_offset = x | (y << 16);
 429
 430       /* XXX flush only required when the draw_offset changes! */
 431       OUT_BATCH(MI_FLUSH | INHIBIT_FLUSH_RENDER_CACHE);
 432       OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
 433       OUT_BATCH(DRAW_RECT_DIS_DEPTH_OFS);
 434       OUT_BATCH(draw_offset);
 435       OUT_BATCH((w - 1 + x) | ((h - 1 + y) << 16));
 436       OUT_BATCH(draw_offset);
 437    }
 438 #endif
 439
 440    I915_DBG(DBG_EMIT, "%s: used %d dwords, %d relocs\n", __FUNCTION__,
 441             ((uintptr_t)i915->batch->ptr - save_ptr) / 4,
 442             i915->batch->relocs - save_relocs);
 443
 444    i915->hardware_dirty = 0;
 445 }