Merge branch 'lp-offset-twoside'
[mesa.git] / src / gallium / drivers / i915 / i915_state_emit.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "i915_reg.h"
30 #include "i915_context.h"
31 #include "i915_batch.h"
32 #include "i915_debug.h"
33 #include "i915_resource.h"
34
35 #include "pipe/p_context.h"
36 #include "pipe/p_defines.h"
37
38 static unsigned translate_format( enum pipe_format format )
39 {
40 switch (format) {
41 case PIPE_FORMAT_B8G8R8A8_UNORM:
42 return COLOR_BUF_ARGB8888;
43 case PIPE_FORMAT_B5G6R5_UNORM:
44 return COLOR_BUF_RGB565;
45 default:
46 assert(0);
47 return 0;
48 }
49 }
50
51 static unsigned translate_depth_format( enum pipe_format zformat )
52 {
53 switch (zformat) {
54 case PIPE_FORMAT_Z24X8_UNORM:
55 case PIPE_FORMAT_Z24_UNORM_S8_USCALED:
56 return DEPTH_FRMT_24_FIXED_8_OTHER;
57 case PIPE_FORMAT_Z16_UNORM:
58 return DEPTH_FRMT_16_FIXED;
59 default:
60 assert(0);
61 return 0;
62 }
63 }
64
65
66 /**
67 * Examine framebuffer state to determine width, height.
68 */
69 static boolean
70 framebuffer_size(const struct pipe_framebuffer_state *fb,
71 uint *width, uint *height)
72 {
73 if (fb->cbufs[0]) {
74 *width = fb->cbufs[0]->width;
75 *height = fb->cbufs[0]->height;
76 return TRUE;
77 }
78 else if (fb->zsbuf) {
79 *width = fb->zsbuf->width;
80 *height = fb->zsbuf->height;
81 return TRUE;
82 }
83 else {
84 *width = *height = 0;
85 return FALSE;
86 }
87 }
88
89
90 /* Push the state into the sarea and/or texture memory.
91 */
92 void
93 i915_emit_hardware_state(struct i915_context *i915 )
94 {
95 /* XXX: there must be an easier way */
96 const unsigned dwords = ( 14 +
97 7 +
98 I915_MAX_DYNAMIC +
99 8 +
100 2 + I915_TEX_UNITS*3 +
101 2 + I915_TEX_UNITS*3 +
102 2 + I915_MAX_CONSTANT*4 +
103 #if 0
104 i915->current.program_len +
105 #else
106 i915->fs->program_len +
107 #endif
108 6
109 ) * 3/2; /* plus 50% margin */
110 const unsigned relocs = ( I915_TEX_UNITS +
111 3
112 ) * 3/2; /* plus 50% margin */
113
114 uintptr_t save_ptr;
115 size_t save_relocs;
116
117 if (I915_DBG_ON(DBG_ATOMS))
118 i915_dump_hardware_dirty(i915, __FUNCTION__);
119
120 if(!BEGIN_BATCH(dwords, relocs)) {
121 FLUSH_BATCH(NULL);
122 assert(BEGIN_BATCH(dwords, relocs));
123 }
124
125 save_ptr = (uintptr_t)i915->batch->ptr;
126 save_relocs = i915->batch->relocs;
127
128 /* 14 dwords, 0 relocs */
129 if (i915->hardware_dirty & I915_HW_INVARIENT)
130 {
131 OUT_BATCH(_3DSTATE_AA_CMD |
132 AA_LINE_ECAAR_WIDTH_ENABLE |
133 AA_LINE_ECAAR_WIDTH_1_0 |
134 AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
135
136 OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
137 OUT_BATCH(0);
138
139 OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
140 OUT_BATCH(0);
141
142 OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
143 OUT_BATCH(0);
144
145 OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
146 CSB_TCB(0, 0) |
147 CSB_TCB(1, 1) |
148 CSB_TCB(2, 2) |
149 CSB_TCB(3, 3) |
150 CSB_TCB(4, 4) |
151 CSB_TCB(5, 5) |
152 CSB_TCB(6, 6) |
153 CSB_TCB(7, 7));
154
155 OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
156 ENABLE_POINT_RASTER_RULE |
157 OGL_POINT_RASTER_RULE |
158 ENABLE_LINE_STRIP_PROVOKE_VRTX |
159 ENABLE_TRI_FAN_PROVOKE_VRTX |
160 LINE_STRIP_PROVOKE_VRTX(1) |
161 TRI_FAN_PROVOKE_VRTX(2) |
162 ENABLE_TEXKILL_3D_4D |
163 TEXKILL_4D);
164
165 /* Need to initialize this to zero.
166 */
167 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0));
168 OUT_BATCH(0);
169
170 OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
171
172 /* disable indirect state for now
173 */
174 OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);
175 OUT_BATCH(0);
176 }
177
178 /* 7 dwords, 1 relocs */
179 if (i915->hardware_dirty & I915_HW_IMMEDIATE)
180 {
181 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
182 I1_LOAD_S(0) |
183 I1_LOAD_S(1) |
184 I1_LOAD_S(2) |
185 I1_LOAD_S(4) |
186 I1_LOAD_S(5) |
187 I1_LOAD_S(6) |
188 (5));
189
190 if(i915->vbo)
191 OUT_RELOC(i915->vbo,
192 I915_USAGE_VERTEX,
193 i915->current.immediate[I915_IMMEDIATE_S0]);
194 else
195 /* FIXME: we should not do this */
196 OUT_BATCH(0);
197 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S1]);
198 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S2]);
199 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S4]);
200 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S5]);
201 OUT_BATCH(i915->current.immediate[I915_IMMEDIATE_S6]);
202 }
203
204 #if 01
205 /* I915_MAX_DYNAMIC dwords, 0 relocs */
206 if (i915->hardware_dirty & I915_HW_DYNAMIC)
207 {
208 int i;
209 for (i = 0; i < I915_MAX_DYNAMIC; i++) {
210 OUT_BATCH(i915->current.dynamic[i]);
211 }
212 }
213 #endif
214
215 #if 01
216 /* 8 dwords, 2 relocs */
217 if (i915->hardware_dirty & I915_HW_STATIC)
218 {
219 struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
220 struct pipe_surface *depth_surface = i915->framebuffer.zsbuf;
221
222 if (cbuf_surface) {
223 unsigned ctile = BUF_3D_USE_FENCE;
224 struct i915_texture *tex = i915_texture(cbuf_surface->texture);
225 assert(tex);
226
227 OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
228
229 OUT_BATCH(BUF_3D_ID_COLOR_BACK |
230 BUF_3D_PITCH(tex->stride) | /* pitch in bytes */
231 ctile);
232
233 OUT_RELOC(tex->buffer,
234 I915_USAGE_RENDER,
235 cbuf_surface->offset);
236 }
237
238 /* What happens if no zbuf??
239 */
240 if (depth_surface) {
241 unsigned ztile = BUF_3D_USE_FENCE;
242 struct i915_texture *tex = i915_texture(depth_surface->texture);
243 assert(tex);
244
245 OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
246
247 assert(tex);
248 OUT_BATCH(BUF_3D_ID_DEPTH |
249 BUF_3D_PITCH(tex->stride) | /* pitch in bytes */
250 ztile);
251
252 OUT_RELOC(tex->buffer,
253 I915_USAGE_RENDER,
254 depth_surface->offset);
255 }
256
257 {
258 unsigned cformat, zformat = 0;
259
260 if (cbuf_surface)
261 cformat = cbuf_surface->format;
262 else
263 cformat = PIPE_FORMAT_B8G8R8A8_UNORM; /* arbitrary */
264 cformat = translate_format(cformat);
265
266 if (depth_surface)
267 zformat = translate_depth_format( i915->framebuffer.zsbuf->format );
268
269 OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
270 OUT_BATCH(DSTORG_HORT_BIAS(0x8) | /* .5 */
271 DSTORG_VERT_BIAS(0x8) | /* .5 */
272 LOD_PRECLAMP_OGL |
273 TEX_DEFAULT_COLOR_OGL |
274 cformat |
275 zformat );
276 }
277 }
278 #endif
279
280 #if 01
281 /* texture images */
282 /* 2 + I915_TEX_UNITS*3 dwords, I915_TEX_UNITS relocs */
283 if (i915->hardware_dirty & (I915_HW_MAP | I915_HW_SAMPLER))
284 {
285 const uint nr = i915->current.sampler_enable_nr;
286 if (nr) {
287 const uint enabled = i915->current.sampler_enable_flags;
288 uint unit;
289 uint count = 0;
290 OUT_BATCH(_3DSTATE_MAP_STATE | (3 * nr));
291 OUT_BATCH(enabled);
292 for (unit = 0; unit < I915_TEX_UNITS; unit++) {
293 if (enabled & (1 << unit)) {
294 struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture);
295 struct i915_winsys_buffer *buf = texture->buffer;
296 uint offset = 0;
297 assert(buf);
298
299 count++;
300
301 OUT_RELOC(buf, I915_USAGE_SAMPLER, offset);
302 OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */
303 OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */
304 }
305 }
306 assert(count == nr);
307 }
308 }
309 #endif
310
311 #if 01
312 /* samplers */
313 /* 2 + I915_TEX_UNITS*3 dwords, 0 relocs */
314 if (i915->hardware_dirty & I915_HW_SAMPLER)
315 {
316 if (i915->current.sampler_enable_nr) {
317 int i;
318
319 OUT_BATCH( _3DSTATE_SAMPLER_STATE |
320 (3 * i915->current.sampler_enable_nr) );
321
322 OUT_BATCH( i915->current.sampler_enable_flags );
323
324 for (i = 0; i < I915_TEX_UNITS; i++) {
325 if (i915->current.sampler_enable_flags & (1<<i)) {
326 OUT_BATCH( i915->current.sampler[i][0] );
327 OUT_BATCH( i915->current.sampler[i][1] );
328 OUT_BATCH( i915->current.sampler[i][2] );
329 }
330 }
331 }
332 }
333 #endif
334
335 #if 01
336 /* constants */
337 /* 2 + I915_MAX_CONSTANT*4 dwords, 0 relocs */
338 if (i915->hardware_dirty & I915_HW_CONSTANTS)
339 {
340 /* Collate the user-defined constants with the fragment shader's
341 * immediates according to the constant_flags[] array.
342 */
343 const uint nr = i915->fs->num_constants;
344 if (nr) {
345 uint i;
346
347 OUT_BATCH( _3DSTATE_PIXEL_SHADER_CONSTANTS | (nr * 4) );
348 OUT_BATCH( (1 << (nr - 1)) | ((1 << (nr - 1)) - 1) );
349
350 for (i = 0; i < nr; i++) {
351 const uint *c;
352 if (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER) {
353 /* grab user-defined constant */
354 c = (uint *) i915->current.constants[PIPE_SHADER_FRAGMENT][i];
355 }
356 else {
357 /* emit program constant */
358 c = (uint *) i915->fs->constants[i];
359 }
360 #if 0 /* debug */
361 {
362 float *f = (float *) c;
363 printf("Const %2d: %f %f %f %f %s\n", i, f[0], f[1], f[2], f[3],
364 (i915->fs->constant_flags[i] == I915_CONSTFLAG_USER
365 ? "user" : "immediate"));
366 }
367 #endif
368 OUT_BATCH(*c++);
369 OUT_BATCH(*c++);
370 OUT_BATCH(*c++);
371 OUT_BATCH(*c++);
372 }
373 }
374 }
375 #endif
376
377 #if 01
378 /* Fragment program */
379 /* i915->current.program_len dwords, 0 relocs */
380 if (i915->hardware_dirty & I915_HW_PROGRAM)
381 {
382 uint i;
383 /* we should always have, at least, a pass-through program */
384 assert(i915->fs->program_len > 0);
385 for (i = 0; i < i915->fs->program_len; i++) {
386 OUT_BATCH(i915->fs->program[i]);
387 }
388 }
389 #endif
390
391 #if 01
392 /* drawing surface size */
393 /* 6 dwords, 0 relocs */
394 {
395 uint w, h;
396 boolean k = framebuffer_size(&i915->framebuffer, &w, &h);
397 (void)k;
398 assert(k);
399
400 OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
401 OUT_BATCH(0);
402 OUT_BATCH(0);
403 OUT_BATCH(((w - 1) & 0xffff) | ((h - 1) << 16));
404 OUT_BATCH(0);
405 OUT_BATCH(0);
406 }
407 #endif
408
409 I915_DBG(DBG_EMIT, "%s: used %d dwords, %d relocs\n", __FUNCTION__,
410 ((uintptr_t)i915->batch->ptr - save_ptr) / 4,
411 i915->batch->relocs - save_relocs);
412
413 i915->hardware_dirty = 0;
414 }